dwapb_gpio.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2015 Marek Vasut <marex@denx.de>
  4. *
  5. * DesignWare APB GPIO driver
  6. */
  7. #include <common.h>
  8. #include <log.h>
  9. #include <malloc.h>
  10. #include <asm/arch/gpio.h>
  11. #include <asm/gpio.h>
  12. #include <asm/io.h>
  13. #include <dm.h>
  14. #include <dm/device-internal.h>
  15. #include <dm/device_compat.h>
  16. #include <dm/devres.h>
  17. #include <dm/lists.h>
  18. #include <dm/root.h>
  19. #include <errno.h>
  20. #include <reset.h>
  21. #include <linux/bitops.h>
  22. #define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc)
  23. #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc)
  24. #define GPIO_INTEN 0x30
  25. #define GPIO_INTMASK 0x34
  26. #define GPIO_INTTYPE_LEVEL 0x38
  27. #define GPIO_INT_POLARITY 0x3c
  28. #define GPIO_INTSTATUS 0x40
  29. #define GPIO_PORTA_DEBOUNCE 0x48
  30. #define GPIO_PORTA_EOI 0x4c
  31. #define GPIO_EXT_PORT(p) (0x50 + (p) * 4)
  32. struct gpio_dwapb_priv {
  33. struct reset_ctl_bulk resets;
  34. };
  35. struct gpio_dwapb_platdata {
  36. const char *name;
  37. int bank;
  38. int pins;
  39. fdt_addr_t base;
  40. };
  41. static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
  42. {
  43. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  44. clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
  45. return 0;
  46. }
  47. static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
  48. int val)
  49. {
  50. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  51. setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
  52. if (val)
  53. setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  54. else
  55. clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  56. return 0;
  57. }
  58. static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
  59. {
  60. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  61. return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin));
  62. }
  63. static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
  64. {
  65. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  66. if (val)
  67. setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  68. else
  69. clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  70. return 0;
  71. }
  72. static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset)
  73. {
  74. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  75. u32 gpio;
  76. gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank));
  77. if (gpio & BIT(offset))
  78. return GPIOF_OUTPUT;
  79. else
  80. return GPIOF_INPUT;
  81. }
  82. static const struct dm_gpio_ops gpio_dwapb_ops = {
  83. .direction_input = dwapb_gpio_direction_input,
  84. .direction_output = dwapb_gpio_direction_output,
  85. .get_value = dwapb_gpio_get_value,
  86. .set_value = dwapb_gpio_set_value,
  87. .get_function = dwapb_gpio_get_function,
  88. };
  89. static int gpio_dwapb_reset(struct udevice *dev)
  90. {
  91. int ret;
  92. struct gpio_dwapb_priv *priv = dev_get_priv(dev);
  93. ret = reset_get_bulk(dev, &priv->resets);
  94. if (ret) {
  95. /* Return 0 if error due to !CONFIG_DM_RESET and reset
  96. * DT property is not present.
  97. */
  98. if (ret == -ENOENT || ret == -ENOTSUPP)
  99. return 0;
  100. dev_warn(dev, "Can't get reset: %d\n", ret);
  101. return ret;
  102. }
  103. ret = reset_deassert_bulk(&priv->resets);
  104. if (ret) {
  105. reset_release_bulk(&priv->resets);
  106. dev_err(dev, "Failed to reset: %d\n", ret);
  107. return ret;
  108. }
  109. return 0;
  110. }
  111. static int gpio_dwapb_probe(struct udevice *dev)
  112. {
  113. struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
  114. struct gpio_dwapb_platdata *plat = dev->platdata;
  115. if (!plat) {
  116. /* Reset on parent device only */
  117. return gpio_dwapb_reset(dev);
  118. }
  119. priv->gpio_count = plat->pins;
  120. priv->bank_name = plat->name;
  121. return 0;
  122. }
  123. static int gpio_dwapb_bind(struct udevice *dev)
  124. {
  125. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  126. struct udevice *subdev;
  127. fdt_addr_t base;
  128. int ret, bank = 0;
  129. ofnode node;
  130. /* If this is a child device, there is nothing to do here */
  131. if (plat)
  132. return 0;
  133. base = dev_read_addr(dev);
  134. if (base == FDT_ADDR_T_NONE) {
  135. debug("Can't get the GPIO register base address\n");
  136. return -ENXIO;
  137. }
  138. for (node = dev_read_first_subnode(dev); ofnode_valid(node);
  139. node = dev_read_next_subnode(node)) {
  140. if (!ofnode_read_bool(node, "gpio-controller"))
  141. continue;
  142. plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL);
  143. if (!plat)
  144. return -ENOMEM;
  145. plat->base = base;
  146. plat->bank = bank;
  147. plat->pins = ofnode_read_u32_default(node, "snps,nr-gpios", 0);
  148. if (ofnode_read_string_index(node, "bank-name", 0,
  149. &plat->name)) {
  150. /*
  151. * Fall back to node name. This means accessing pins
  152. * via bank name won't work.
  153. */
  154. plat->name = ofnode_get_name(node);
  155. }
  156. ret = device_bind_ofnode(dev, dev->driver, plat->name,
  157. plat, node, &subdev);
  158. if (ret)
  159. return ret;
  160. bank++;
  161. }
  162. return 0;
  163. }
  164. static int gpio_dwapb_remove(struct udevice *dev)
  165. {
  166. struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
  167. struct gpio_dwapb_priv *priv = dev_get_priv(dev);
  168. if (!plat && priv)
  169. return reset_release_bulk(&priv->resets);
  170. return 0;
  171. }
  172. static const struct udevice_id gpio_dwapb_ids[] = {
  173. { .compatible = "snps,dw-apb-gpio" },
  174. { }
  175. };
  176. U_BOOT_DRIVER(gpio_dwapb) = {
  177. .name = "gpio-dwapb",
  178. .id = UCLASS_GPIO,
  179. .of_match = gpio_dwapb_ids,
  180. .ops = &gpio_dwapb_ops,
  181. .bind = gpio_dwapb_bind,
  182. .probe = gpio_dwapb_probe,
  183. .remove = gpio_dwapb_remove,
  184. .priv_auto_alloc_size = sizeof(struct gpio_dwapb_priv),
  185. };