clk_a10.c 2.4 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2018 Amarula Solutions.
  4. * Author: Jagan Teki <jagan@amarulasolutions.com>
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <asm/arch/ccu.h>
  11. #include <dt-bindings/clock/sun4i-a10-ccu.h>
  12. #include <dt-bindings/reset/sun4i-a10-ccu.h>
  13. #include <linux/bitops.h>
  14. static struct ccu_clk_gate a10_gates[] = {
  15. [CLK_AHB_OTG] = GATE(0x060, BIT(0)),
  16. [CLK_AHB_EHCI0] = GATE(0x060, BIT(1)),
  17. [CLK_AHB_OHCI0] = GATE(0x060, BIT(2)),
  18. [CLK_AHB_EHCI1] = GATE(0x060, BIT(3)),
  19. [CLK_AHB_OHCI1] = GATE(0x060, BIT(4)),
  20. [CLK_AHB_MMC0] = GATE(0x060, BIT(8)),
  21. [CLK_AHB_MMC1] = GATE(0x060, BIT(9)),
  22. [CLK_AHB_MMC2] = GATE(0x060, BIT(10)),
  23. [CLK_AHB_MMC3] = GATE(0x060, BIT(11)),
  24. [CLK_AHB_EMAC] = GATE(0x060, BIT(17)),
  25. [CLK_AHB_SPI0] = GATE(0x060, BIT(20)),
  26. [CLK_AHB_SPI1] = GATE(0x060, BIT(21)),
  27. [CLK_AHB_SPI2] = GATE(0x060, BIT(22)),
  28. [CLK_AHB_SPI3] = GATE(0x060, BIT(23)),
  29. [CLK_AHB_GMAC] = GATE(0x064, BIT(17)),
  30. [CLK_APB1_UART0] = GATE(0x06c, BIT(16)),
  31. [CLK_APB1_UART1] = GATE(0x06c, BIT(17)),
  32. [CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
  33. [CLK_APB1_UART3] = GATE(0x06c, BIT(19)),
  34. [CLK_APB1_UART4] = GATE(0x06c, BIT(20)),
  35. [CLK_APB1_UART5] = GATE(0x06c, BIT(21)),
  36. [CLK_APB1_UART6] = GATE(0x06c, BIT(22)),
  37. [CLK_APB1_UART7] = GATE(0x06c, BIT(23)),
  38. [CLK_SPI0] = GATE(0x0a0, BIT(31)),
  39. [CLK_SPI1] = GATE(0x0a4, BIT(31)),
  40. [CLK_SPI2] = GATE(0x0a8, BIT(31)),
  41. [CLK_USB_OHCI0] = GATE(0x0cc, BIT(6)),
  42. [CLK_USB_OHCI1] = GATE(0x0cc, BIT(7)),
  43. [CLK_USB_PHY] = GATE(0x0cc, BIT(8)),
  44. [CLK_SPI3] = GATE(0x0d4, BIT(31)),
  45. };
  46. static struct ccu_reset a10_resets[] = {
  47. [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
  48. [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
  49. [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
  50. };
  51. static const struct ccu_desc a10_ccu_desc = {
  52. .gates = a10_gates,
  53. .resets = a10_resets,
  54. };
  55. static int a10_clk_bind(struct udevice *dev)
  56. {
  57. return sunxi_reset_bind(dev, ARRAY_SIZE(a10_resets));
  58. }
  59. static const struct udevice_id a10_ccu_ids[] = {
  60. { .compatible = "allwinner,sun4i-a10-ccu",
  61. .data = (ulong)&a10_ccu_desc },
  62. { .compatible = "allwinner,sun7i-a20-ccu",
  63. .data = (ulong)&a10_ccu_desc },
  64. { }
  65. };
  66. U_BOOT_DRIVER(clk_sun4i_a10) = {
  67. .name = "sun4i_a10_ccu",
  68. .id = UCLASS_CLK,
  69. .of_match = a10_ccu_ids,
  70. .priv_auto_alloc_size = sizeof(struct ccu_priv),
  71. .ops = &sunxi_clk_ops,
  72. .probe = sunxi_clk_probe,
  73. .bind = a10_clk_bind,
  74. };