spi-zynq-qspi.txt 829 B

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  1. Xilinx Zynq QSPI controller Device Tree Bindings
  2. -------------------------------------------------
  3. Required properties:
  4. - compatible : Should be "xlnx,zynq-qspi-1.0".
  5. - reg : Physical base address and size of QSPI registers map.
  6. - interrupts : Property with a value describing the interrupt
  7. number.
  8. - interrupt-parent : Must be core interrupt controller
  9. - clock-names : List of input clock names - "ref_clk", "pclk"
  10. (See clock bindings for details).
  11. - clocks : Clock phandles (see clock bindings for details).
  12. Optional properties:
  13. - num-cs : Number of chip selects used.
  14. Example:
  15. qspi@e000d000 {
  16. compatible = "xlnx,zynq-qspi-1.0";
  17. clock-names = "ref_clk", "pclk";
  18. clocks = <&clkc 10>, <&clkc 43>;
  19. interrupt-parent = <&intc>;
  20. interrupts = <0 19 4>;
  21. num-cs = <1>;
  22. reg = <0xe000d000 0x1000>;
  23. } ;