actl_nand.c 1.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2008 Extreme Engineering Solutions, Inc.
  4. *
  5. * This driver support NAND devices which have address lines
  6. * connected as ALE and CLE inputs.
  7. */
  8. #include <common.h>
  9. #include <nand.h>
  10. #include <asm/io.h>
  11. /*
  12. * Hardware specific access to control-lines
  13. */
  14. static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
  15. {
  16. struct nand_chip *this = mtd_to_nand(mtd);
  17. ulong IO_ADDR_W;
  18. if (ctrl & NAND_CTRL_CHANGE) {
  19. IO_ADDR_W = (ulong)this->IO_ADDR_W;
  20. IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE |
  21. CONFIG_SYS_NAND_ACTL_ALE |
  22. CONFIG_SYS_NAND_ACTL_NCE);
  23. if (ctrl & NAND_CLE)
  24. IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE;
  25. if (ctrl & NAND_ALE)
  26. IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE;
  27. if (ctrl & NAND_NCE)
  28. IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE;
  29. this->IO_ADDR_W = (void *)IO_ADDR_W;
  30. }
  31. if (cmd != NAND_CMD_NONE)
  32. writeb(cmd, this->IO_ADDR_W);
  33. }
  34. int board_nand_init(struct nand_chip *nand)
  35. {
  36. nand->ecc.mode = NAND_ECC_SOFT;
  37. nand->cmd_ctrl = nand_addr_hwcontrol;
  38. nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY;
  39. return 0;
  40. }