work_92105.c 1.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * WORK Microwave work_92105 board support
  4. *
  5. * (C) Copyright 2014 DENX Software Engineering GmbH
  6. * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
  7. */
  8. #include <common.h>
  9. #include <init.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/sys_proto.h>
  12. #include <asm/arch/cpu.h>
  13. #include <asm/arch/clk.h>
  14. #include <asm/arch/emc.h>
  15. #include <asm/arch/wdt.h>
  16. #include <asm/gpio.h>
  17. #include <spl.h>
  18. #include <linux/delay.h>
  19. #include "work_92105_display.h"
  20. DECLARE_GLOBAL_DATA_PTR;
  21. static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
  22. static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
  23. void reset_periph(void)
  24. {
  25. setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
  26. writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);
  27. udelay(150);
  28. writel(0, &wdt->mctrl);
  29. clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
  30. }
  31. int board_early_init_f(void)
  32. {
  33. /* initialize serial port for console */
  34. lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
  35. /* enable I2C, SSP, MAC, NAND */
  36. lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */
  37. lpc32xx_ssp_init();
  38. lpc32xx_mac_init();
  39. lpc32xx_mlc_nand_init();
  40. /* Display must wait until after relocation and devices init */
  41. return 0;
  42. }
  43. #define GPO_19 115
  44. int board_early_init_r(void)
  45. {
  46. /* Set NAND !WP to 1 through GPO_19 */
  47. gpio_request(GPO_19, "NAND_nWP");
  48. gpio_direction_output(GPO_19, 1);
  49. #ifdef CONFIG_DEPRECATED
  50. /* initialize display */
  51. work_92105_display_init();
  52. #endif
  53. return 0;
  54. }
  55. int board_init(void)
  56. {
  57. reset_periph();
  58. /* adress of boot parameters */
  59. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  60. return 0;
  61. }
  62. int dram_init(void)
  63. {
  64. gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  65. CONFIG_SYS_SDRAM_SIZE);
  66. return 0;
  67. }