mux.c 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * mux.c
  4. *
  5. * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  6. */
  7. #include <common.h>
  8. #include <asm/arch/sys_proto.h>
  9. #include <asm/arch/hardware.h>
  10. #include <asm/arch/mux.h>
  11. #include <asm/io.h>
  12. #include <i2c.h>
  13. #include "board.h"
  14. static struct module_pin_mux uart0_pin_mux[] = {
  15. {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
  16. {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
  17. {-1},
  18. };
  19. static struct module_pin_mux uart1_pin_mux[] = {
  20. {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
  21. {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
  22. {-1},
  23. };
  24. static struct module_pin_mux uart2_pin_mux[] = {
  25. {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
  26. {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
  27. {-1},
  28. };
  29. static struct module_pin_mux uart3_pin_mux[] = {
  30. {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
  31. {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
  32. {-1},
  33. };
  34. static struct module_pin_mux uart4_pin_mux[] = {
  35. {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
  36. {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
  37. {-1},
  38. };
  39. static struct module_pin_mux uart5_pin_mux[] = {
  40. {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
  41. {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
  42. {-1},
  43. };
  44. static struct module_pin_mux mmc0_pin_mux[] = {
  45. {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
  46. {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
  47. {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
  48. {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
  49. {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
  50. {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
  51. {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
  52. {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
  53. {-1},
  54. };
  55. static struct module_pin_mux mmc1_pin_mux[] = {
  56. {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
  57. {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
  58. {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
  59. {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */
  60. {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
  61. {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
  62. {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
  63. {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_CD */
  64. {-1},
  65. };
  66. static struct module_pin_mux i2c0_pin_mux[] = {
  67. {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
  68. PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
  69. {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
  70. PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
  71. {-1},
  72. };
  73. static struct module_pin_mux i2c1_pin_mux[] = {
  74. {OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
  75. PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
  76. {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
  77. PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
  78. {-1},
  79. };
  80. static struct module_pin_mux mii1_pin_mux[] = {
  81. {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
  82. {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
  83. {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
  84. {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
  85. {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
  86. {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
  87. {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
  88. {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
  89. {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
  90. {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
  91. {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
  92. {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
  93. {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
  94. {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
  95. {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
  96. {-1},
  97. };
  98. void enable_uart0_pin_mux(void)
  99. {
  100. configure_module_pin_mux(uart0_pin_mux);
  101. }
  102. void enable_uart1_pin_mux(void)
  103. {
  104. configure_module_pin_mux(uart1_pin_mux);
  105. }
  106. void enable_uart2_pin_mux(void)
  107. {
  108. configure_module_pin_mux(uart2_pin_mux);
  109. }
  110. void enable_uart3_pin_mux(void)
  111. {
  112. configure_module_pin_mux(uart3_pin_mux);
  113. }
  114. void enable_uart4_pin_mux(void)
  115. {
  116. configure_module_pin_mux(uart4_pin_mux);
  117. }
  118. void enable_uart5_pin_mux(void)
  119. {
  120. configure_module_pin_mux(uart5_pin_mux);
  121. }
  122. void enable_i2c0_pin_mux(void)
  123. {
  124. configure_module_pin_mux(i2c0_pin_mux);
  125. }
  126. void enable_board_pin_mux(void)
  127. {
  128. configure_module_pin_mux(i2c1_pin_mux);
  129. configure_module_pin_mux(mii1_pin_mux);
  130. configure_module_pin_mux(mmc0_pin_mux);
  131. configure_module_pin_mux(mmc1_pin_mux);
  132. }