sdram.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2008
  4. * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
  5. */
  6. #include <common.h>
  7. #include <init.h>
  8. #include <asm/processor.h>
  9. #include <asm/immap_85xx.h>
  10. #include <fsl_ddr_sdram.h>
  11. #include <asm/processor.h>
  12. #include <asm/mmu.h>
  13. #include <spd_sdram.h>
  14. #include <linux/delay.h>
  15. #if !defined(CONFIG_SPD_EEPROM)
  16. /*
  17. * Autodetect onboard DDR SDRAM on 85xx platforms
  18. *
  19. * NOTE: Some of the hardcoded values are hardware dependant,
  20. * so this should be extended for other future boards
  21. * using this routine!
  22. */
  23. phys_size_t fixed_sdram(void)
  24. {
  25. struct ccsr_ddr __iomem *ddr =
  26. (struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
  27. /*
  28. * Disable memory controller.
  29. */
  30. ddr->cs0_config = 0;
  31. ddr->sdram_cfg = 0;
  32. ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;
  33. ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
  34. ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
  35. ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
  36. ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
  37. ddr->sdram_mode = CONFIG_SYS_DDR_MODE;
  38. ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL;
  39. ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONFIG_2;
  40. ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CONTROL;
  41. asm ("sync;isync;msync");
  42. udelay(1000);
  43. ddr->sdram_cfg = CONFIG_SYS_DDR_CONFIG;
  44. asm ("sync; isync; msync");
  45. udelay(1000);
  46. if (get_ram_size(0, CONFIG_SYS_SDRAM_SIZE<<20) == CONFIG_SYS_SDRAM_SIZE<<20) {
  47. /*
  48. * OK, size detected -> all done
  49. */
  50. return CONFIG_SYS_SDRAM_SIZE<<20;
  51. }
  52. return 0; /* nothing found ! */
  53. }
  54. #endif
  55. #if defined(CONFIG_SYS_DRAM_TEST)
  56. int testdram(void)
  57. {
  58. uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
  59. uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
  60. uint *p;
  61. printf ("SDRAM test phase 1:\n");
  62. for (p = pstart; p < pend; p++)
  63. *p = 0xaaaaaaaa;
  64. for (p = pstart; p < pend; p++) {
  65. if (*p != 0xaaaaaaaa) {
  66. printf ("SDRAM test fails at: %08x\n", (uint) p);
  67. return 1;
  68. }
  69. }
  70. printf ("SDRAM test phase 2:\n");
  71. for (p = pstart; p < pend; p++)
  72. *p = 0x55555555;
  73. for (p = pstart; p < pend; p++) {
  74. if (*p != 0x55555555) {
  75. printf ("SDRAM test fails at: %08x\n", (uint) p);
  76. return 1;
  77. }
  78. }
  79. printf ("SDRAM test passed.\n");
  80. return 0;
  81. }
  82. #endif