qos.c 49 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * board/renesas/koelsch/qos.c
  4. *
  5. * Copyright (C) 2013,2014 Renesas Electronics Corporation
  6. *
  7. */
  8. #include <common.h>
  9. #include <asm/processor.h>
  10. #include <asm/mach-types.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/rmobile.h>
  13. /* QoS version 0.240 for ES1 and version 0.411 for ES2 */
  14. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
  15. enum {
  16. DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
  17. DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
  18. DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
  19. DBSC3_15,
  20. DBSC3_NR,
  21. };
  22. static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
  23. [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
  24. [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
  25. [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
  26. [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
  27. [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
  28. [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
  29. [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
  30. [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
  31. [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
  32. [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
  33. [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
  34. [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
  35. [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
  36. [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
  37. [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
  38. [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
  39. };
  40. static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
  41. [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
  42. [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
  43. [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
  44. [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
  45. [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
  46. [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
  47. [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
  48. [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
  49. [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
  50. [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
  51. [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
  52. [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
  53. [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
  54. [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
  55. [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
  56. [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
  57. };
  58. static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {
  59. [DBSC3_00] = DBSC3_1_QOS_R0_BASE,
  60. [DBSC3_01] = DBSC3_1_QOS_R1_BASE,
  61. [DBSC3_02] = DBSC3_1_QOS_R2_BASE,
  62. [DBSC3_03] = DBSC3_1_QOS_R3_BASE,
  63. [DBSC3_04] = DBSC3_1_QOS_R4_BASE,
  64. [DBSC3_05] = DBSC3_1_QOS_R5_BASE,
  65. [DBSC3_06] = DBSC3_1_QOS_R6_BASE,
  66. [DBSC3_07] = DBSC3_1_QOS_R7_BASE,
  67. [DBSC3_08] = DBSC3_1_QOS_R8_BASE,
  68. [DBSC3_09] = DBSC3_1_QOS_R9_BASE,
  69. [DBSC3_10] = DBSC3_1_QOS_R10_BASE,
  70. [DBSC3_11] = DBSC3_1_QOS_R11_BASE,
  71. [DBSC3_12] = DBSC3_1_QOS_R12_BASE,
  72. [DBSC3_13] = DBSC3_1_QOS_R13_BASE,
  73. [DBSC3_14] = DBSC3_1_QOS_R14_BASE,
  74. [DBSC3_15] = DBSC3_1_QOS_R15_BASE,
  75. };
  76. static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {
  77. [DBSC3_00] = DBSC3_1_QOS_W0_BASE,
  78. [DBSC3_01] = DBSC3_1_QOS_W1_BASE,
  79. [DBSC3_02] = DBSC3_1_QOS_W2_BASE,
  80. [DBSC3_03] = DBSC3_1_QOS_W3_BASE,
  81. [DBSC3_04] = DBSC3_1_QOS_W4_BASE,
  82. [DBSC3_05] = DBSC3_1_QOS_W5_BASE,
  83. [DBSC3_06] = DBSC3_1_QOS_W6_BASE,
  84. [DBSC3_07] = DBSC3_1_QOS_W7_BASE,
  85. [DBSC3_08] = DBSC3_1_QOS_W8_BASE,
  86. [DBSC3_09] = DBSC3_1_QOS_W9_BASE,
  87. [DBSC3_10] = DBSC3_1_QOS_W10_BASE,
  88. [DBSC3_11] = DBSC3_1_QOS_W11_BASE,
  89. [DBSC3_12] = DBSC3_1_QOS_W12_BASE,
  90. [DBSC3_13] = DBSC3_1_QOS_W13_BASE,
  91. [DBSC3_14] = DBSC3_1_QOS_W14_BASE,
  92. [DBSC3_15] = DBSC3_1_QOS_W15_BASE,
  93. };
  94. #if defined(CONFIG_QOS_PRI_MEDIA)
  95. #define is_qos_pri_media() 1
  96. #else
  97. #define is_qos_pri_media() 0
  98. #endif
  99. #if defined(CONFIG_QOS_PRI_NORMAL)
  100. #define is_qos_pri_normal() 1
  101. #else
  102. #define is_qos_pri_normal() 0
  103. #endif
  104. #if defined(CONFIG_QOS_PRI_GFX)
  105. #define is_qos_pri_gfx() 1
  106. #else
  107. #define is_qos_pri_gfx() 0
  108. #endif
  109. void qos_init(void)
  110. {
  111. int i;
  112. struct rcar_s3c *s3c;
  113. struct rcar_s3c_qos *s3c_qos;
  114. struct rcar_dbsc3_qos *qos_addr;
  115. struct rcar_mxi *mxi;
  116. struct rcar_mxi_qos *mxi_qos;
  117. struct rcar_axi_qos *axi_qos;
  118. /* DBSC DBADJ2 */
  119. writel(0x20042004, DBSC3_0_DBADJ2);
  120. writel(0x20042004, DBSC3_1_DBADJ2);
  121. /* S3C -QoS */
  122. s3c = (struct rcar_s3c *)S3C_BASE;
  123. if (IS_R8A7791_ES2()) {
  124. /* Linear All mode */
  125. /* writel(0x00000000, &s3c->s3cadsplcr); */
  126. /* Linear Linear 0x7000 to 0x7800 mode */
  127. writel(0x00BF1B0C, &s3c->s3cadsplcr);
  128. /* Split Linear 0x6800 t 0x7000 mode */
  129. /* writel(0x00DF1B0C, &s3c->s3cadsplcr); */
  130. /* Ssplit All mode */
  131. /* writel(0x00FF1B0C, &s3c->s3cadsplcr); */
  132. if (is_qos_pri_media()) {
  133. writel(0x1F0B0604, &s3c->s3crorr);
  134. writel(0x1F0E0705, &s3c->s3cworr);
  135. } else if (is_qos_pri_normal()) {
  136. writel(0x1F0B0908, &s3c->s3crorr);
  137. writel(0x1F0E0A08, &s3c->s3cworr);
  138. } else if (is_qos_pri_gfx()) {
  139. writel(0x1F0B0B0B, &s3c->s3crorr);
  140. writel(0x1F0E0C0C, &s3c->s3cworr);
  141. }
  142. } else {
  143. writel(0x00FF1B1D, &s3c->s3cadsplcr);
  144. writel(0x1F0D0C0C, &s3c->s3crorr);
  145. writel(0x1F0D0C0A, &s3c->s3cworr);
  146. }
  147. /* QoS Control Registers */
  148. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
  149. writel(0x00890089, &s3c_qos->s3cqos0);
  150. writel(0x20960010, &s3c_qos->s3cqos1);
  151. writel(0x20302030, &s3c_qos->s3cqos2);
  152. if (IS_R8A7791_ES2()) {
  153. if (is_qos_pri_media())
  154. writel(0x20AA2300, &s3c_qos->s3cqos3);
  155. else if (is_qos_pri_normal())
  156. writel(0x20AA2200, &s3c_qos->s3cqos3);
  157. else if (is_qos_pri_gfx())
  158. writel(0x20AA2100, &s3c_qos->s3cqos3);
  159. } else {
  160. writel(0x20AA2200, &s3c_qos->s3cqos3);
  161. }
  162. writel(0x00002032, &s3c_qos->s3cqos4);
  163. writel(0x20960010, &s3c_qos->s3cqos5);
  164. writel(0x20302030, &s3c_qos->s3cqos6);
  165. if (IS_R8A7791_ES2()) {
  166. if (is_qos_pri_media())
  167. writel(0x20AA2300, &s3c_qos->s3cqos7);
  168. else if (is_qos_pri_normal())
  169. writel(0x20AA2200, &s3c_qos->s3cqos7);
  170. else if (is_qos_pri_gfx())
  171. writel(0x20AA2100, &s3c_qos->s3cqos7);
  172. } else {
  173. writel(0x20AA2200, &s3c_qos->s3cqos7);
  174. }
  175. writel(0x00002032, &s3c_qos->s3cqos8);
  176. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
  177. writel(0x00890089, &s3c_qos->s3cqos0);
  178. writel(0x20960010, &s3c_qos->s3cqos1);
  179. writel(0x20302030, &s3c_qos->s3cqos2);
  180. if (IS_R8A7791_ES2()) {
  181. if (is_qos_pri_media())
  182. writel(0x20AA2300, &s3c_qos->s3cqos3);
  183. else if (is_qos_pri_normal())
  184. writel(0x20AA2200, &s3c_qos->s3cqos3);
  185. else if (is_qos_pri_gfx())
  186. writel(0x20AA2100, &s3c_qos->s3cqos3);
  187. } else {
  188. writel(0x20AA2200, &s3c_qos->s3cqos3);
  189. }
  190. writel(0x00002032, &s3c_qos->s3cqos4);
  191. writel(0x20960010, &s3c_qos->s3cqos5);
  192. writel(0x20302030, &s3c_qos->s3cqos6);
  193. if (IS_R8A7791_ES2()) {
  194. if (is_qos_pri_media())
  195. writel(0x20AA2300, &s3c_qos->s3cqos7);
  196. else if (is_qos_pri_normal())
  197. writel(0x20AA2200, &s3c_qos->s3cqos7);
  198. else if (is_qos_pri_gfx())
  199. writel(0x20AA2100, &s3c_qos->s3cqos7);
  200. } else {
  201. writel(0x20AA2200, &s3c_qos->s3cqos7);
  202. }
  203. writel(0x00002032, &s3c_qos->s3cqos8);
  204. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
  205. if (IS_R8A7791_ES2())
  206. writel(0x80928092, &s3c_qos->s3cqos0);
  207. else
  208. writel(0x00820082, &s3c_qos->s3cqos0);
  209. writel(0x20960020, &s3c_qos->s3cqos1);
  210. writel(0x20302030, &s3c_qos->s3cqos2);
  211. writel(0x20AA20DC, &s3c_qos->s3cqos3);
  212. writel(0x00002032, &s3c_qos->s3cqos4);
  213. writel(0x20960020, &s3c_qos->s3cqos5);
  214. writel(0x20302030, &s3c_qos->s3cqos6);
  215. writel(0x20AA20DC, &s3c_qos->s3cqos7);
  216. writel(0x00002032, &s3c_qos->s3cqos8);
  217. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
  218. if (IS_R8A7791_ES2())
  219. writel(0x80928092, &s3c_qos->s3cqos0);
  220. else
  221. writel(0x00820082, &s3c_qos->s3cqos0);
  222. writel(0x20960020, &s3c_qos->s3cqos1);
  223. writel(0x20302030, &s3c_qos->s3cqos2);
  224. writel(0x20AA20FA, &s3c_qos->s3cqos3);
  225. writel(0x00002032, &s3c_qos->s3cqos4);
  226. writel(0x20960020, &s3c_qos->s3cqos5);
  227. writel(0x20302030, &s3c_qos->s3cqos6);
  228. writel(0x20AA20FA, &s3c_qos->s3cqos7);
  229. writel(0x00002032, &s3c_qos->s3cqos8);
  230. /* DBSC -QoS */
  231. /* DBSC0 - Read */
  232. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  233. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
  234. writel(0x00000002, &qos_addr->dblgcnt);
  235. writel(0x00002096, &qos_addr->dbtmval0);
  236. writel(0x00002064, &qos_addr->dbtmval1);
  237. writel(0x00002032, &qos_addr->dbtmval2);
  238. writel(0x00001FB0, &qos_addr->dbtmval3);
  239. writel(0x00000001, &qos_addr->dbrqctr);
  240. writel(0x00002078, &qos_addr->dbthres0);
  241. writel(0x0000204B, &qos_addr->dbthres1);
  242. writel(0x0000201E, &qos_addr->dbthres2);
  243. writel(0x00000001, &qos_addr->dblgqon);
  244. }
  245. /* DBSC0 - Write */
  246. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  247. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
  248. writel(0x00000002, &qos_addr->dblgcnt);
  249. writel(0x00002096, &qos_addr->dbtmval0);
  250. writel(0x00002064, &qos_addr->dbtmval1);
  251. writel(0x00002050, &qos_addr->dbtmval2);
  252. writel(0x0000203A, &qos_addr->dbtmval3);
  253. writel(0x00000001, &qos_addr->dbrqctr);
  254. writel(0x00002078, &qos_addr->dbthres0);
  255. writel(0x0000204B, &qos_addr->dbthres1);
  256. writel(0x0000203C, &qos_addr->dbthres2);
  257. writel(0x00000001, &qos_addr->dblgqon);
  258. }
  259. /* DBSC1 - Read */
  260. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  261. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i];
  262. writel(0x00000002, &qos_addr->dblgcnt);
  263. writel(0x00002096, &qos_addr->dbtmval0);
  264. writel(0x00002064, &qos_addr->dbtmval1);
  265. writel(0x00002032, &qos_addr->dbtmval2);
  266. writel(0x00001FB0, &qos_addr->dbtmval3);
  267. writel(0x00000001, &qos_addr->dbrqctr);
  268. writel(0x00002078, &qos_addr->dbthres0);
  269. writel(0x0000204B, &qos_addr->dbthres1);
  270. writel(0x0000201E, &qos_addr->dbthres2);
  271. writel(0x00000001, &qos_addr->dblgqon);
  272. }
  273. /* DBSC1 - Write */
  274. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  275. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i];
  276. writel(0x00000002, &qos_addr->dblgcnt);
  277. writel(0x00002096, &qos_addr->dbtmval0);
  278. writel(0x00002064, &qos_addr->dbtmval1);
  279. writel(0x00002050, &qos_addr->dbtmval2);
  280. writel(0x0000203A, &qos_addr->dbtmval3);
  281. writel(0x00000001, &qos_addr->dbrqctr);
  282. writel(0x00002078, &qos_addr->dbthres0);
  283. writel(0x0000204B, &qos_addr->dbthres1);
  284. writel(0x0000203C, &qos_addr->dbthres2);
  285. writel(0x00000001, &qos_addr->dblgqon);
  286. }
  287. /* CCI-400 -QoS */
  288. writel(0x20001000, CCI_400_MAXOT_1);
  289. writel(0x20001000, CCI_400_MAXOT_2);
  290. writel(0x0000000C, CCI_400_QOSCNTL_1);
  291. writel(0x0000000C, CCI_400_QOSCNTL_2);
  292. /* MXI -QoS */
  293. /* Transaction Control (MXI) */
  294. mxi = (struct rcar_mxi *)XI_BASE;
  295. writel(0x00000013, &mxi->mxrtcr);
  296. if (IS_R8A7791_ES2()) {
  297. writel(0x00000016, &mxi->mxwtcr);
  298. writel(0x00780080, &mxi->mxsaar0);
  299. writel(0x02000800, &mxi->mxsaar1);
  300. } else {
  301. writel(0x00000013, &mxi->mxwtcr);
  302. }
  303. /* QoS Control (MXI) */
  304. mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
  305. writel(0x0000000C, &mxi_qos->vspdu0);
  306. writel(0x0000000C, &mxi_qos->vspdu1);
  307. writel(0x0000000E, &mxi_qos->du0);
  308. writel(0x0000000D, &mxi_qos->du1);
  309. /* AXI -QoS */
  310. /* Transaction Control (MXI) */
  311. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
  312. writel(0x00000002, &axi_qos->qosconf);
  313. writel(0x00002245, &axi_qos->qosctset0);
  314. writel(0x00002096, &axi_qos->qosctset1);
  315. writel(0x00002030, &axi_qos->qosctset2);
  316. writel(0x00002030, &axi_qos->qosctset3);
  317. writel(0x00000001, &axi_qos->qosreqctr);
  318. writel(0x00002064, &axi_qos->qosthres0);
  319. writel(0x00002004, &axi_qos->qosthres1);
  320. writel(0x00000000, &axi_qos->qosthres2);
  321. writel(0x00000001, &axi_qos->qosqon);
  322. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
  323. writel(0x00000000, &axi_qos->qosconf);
  324. writel(0x000020A6, &axi_qos->qosctset0);
  325. writel(0x00000001, &axi_qos->qosreqctr);
  326. writel(0x00002064, &axi_qos->qosthres0);
  327. writel(0x00002004, &axi_qos->qosthres1);
  328. writel(0x00000000, &axi_qos->qosthres2);
  329. writel(0x00000001, &axi_qos->qosqon);
  330. axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
  331. writel(0x00000000, &axi_qos->qosconf);
  332. writel(0x000020A6, &axi_qos->qosctset0);
  333. writel(0x00000001, &axi_qos->qosreqctr);
  334. writel(0x00002064, &axi_qos->qosthres0);
  335. writel(0x00002004, &axi_qos->qosthres1);
  336. writel(0x00000000, &axi_qos->qosthres2);
  337. writel(0x00000001, &axi_qos->qosqon);
  338. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
  339. writel(0x00000000, &axi_qos->qosconf);
  340. writel(0x00002021, &axi_qos->qosctset0);
  341. writel(0x00000001, &axi_qos->qosreqctr);
  342. writel(0x00002064, &axi_qos->qosthres0);
  343. writel(0x00002004, &axi_qos->qosthres1);
  344. writel(0x00000000, &axi_qos->qosthres2);
  345. writel(0x00000001, &axi_qos->qosqon);
  346. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
  347. writel(0x00000000, &axi_qos->qosconf);
  348. writel(0x00002037, &axi_qos->qosctset0);
  349. writel(0x00000001, &axi_qos->qosreqctr);
  350. writel(0x00002064, &axi_qos->qosthres0);
  351. writel(0x00002004, &axi_qos->qosthres1);
  352. writel(0x00000000, &axi_qos->qosthres2);
  353. writel(0x00000001, &axi_qos->qosqon);
  354. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
  355. writel(0x00000002, &axi_qos->qosconf);
  356. writel(0x00002245, &axi_qos->qosctset0);
  357. writel(0x00002096, &axi_qos->qosctset1);
  358. writel(0x00002030, &axi_qos->qosctset2);
  359. writel(0x00002030, &axi_qos->qosctset3);
  360. writel(0x00000001, &axi_qos->qosreqctr);
  361. writel(0x00002064, &axi_qos->qosthres0);
  362. writel(0x00002004, &axi_qos->qosthres1);
  363. writel(0x00000000, &axi_qos->qosthres2);
  364. writel(0x00000001, &axi_qos->qosqon);
  365. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
  366. writel(0x00000002, &axi_qos->qosconf);
  367. writel(0x00002245, &axi_qos->qosctset0);
  368. writel(0x00002096, &axi_qos->qosctset1);
  369. writel(0x00002030, &axi_qos->qosctset2);
  370. writel(0x00002030, &axi_qos->qosctset3);
  371. writel(0x00000001, &axi_qos->qosreqctr);
  372. writel(0x00002064, &axi_qos->qosthres0);
  373. writel(0x00002004, &axi_qos->qosthres1);
  374. writel(0x00000000, &axi_qos->qosthres2);
  375. writel(0x00000001, &axi_qos->qosqon);
  376. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
  377. writel(0x00000002, &axi_qos->qosconf);
  378. writel(0x00002245, &axi_qos->qosctset0);
  379. writel(0x00002096, &axi_qos->qosctset1);
  380. writel(0x00002030, &axi_qos->qosctset2);
  381. writel(0x00002030, &axi_qos->qosctset3);
  382. writel(0x00000001, &axi_qos->qosreqctr);
  383. writel(0x00002064, &axi_qos->qosthres0);
  384. writel(0x00002004, &axi_qos->qosthres1);
  385. writel(0x00000000, &axi_qos->qosthres2);
  386. writel(0x00000001, &axi_qos->qosqon);
  387. axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
  388. writel(0x00000000, &axi_qos->qosconf);
  389. writel(0x0000214C, &axi_qos->qosctset0);
  390. writel(0x00000001, &axi_qos->qosreqctr);
  391. writel(0x00002064, &axi_qos->qosthres0);
  392. writel(0x00002004, &axi_qos->qosthres1);
  393. writel(0x00000000, &axi_qos->qosthres2);
  394. writel(0x00000001, &axi_qos->qosqon);
  395. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
  396. writel(0x00000001, &axi_qos->qosconf);
  397. writel(0x00002004, &axi_qos->qosctset0);
  398. writel(0x00002096, &axi_qos->qosctset1);
  399. writel(0x00002030, &axi_qos->qosctset2);
  400. writel(0x00002030, &axi_qos->qosctset3);
  401. writel(0x00000001, &axi_qos->qosreqctr);
  402. writel(0x00002064, &axi_qos->qosthres0);
  403. writel(0x00002004, &axi_qos->qosthres1);
  404. writel(0x00000000, &axi_qos->qosthres2);
  405. writel(0x00000001, &axi_qos->qosqon);
  406. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
  407. writel(0x00000001, &axi_qos->qosconf);
  408. writel(0x00002004, &axi_qos->qosctset0);
  409. writel(0x00002096, &axi_qos->qosctset1);
  410. writel(0x00002030, &axi_qos->qosctset2);
  411. writel(0x00002030, &axi_qos->qosctset3);
  412. writel(0x00000001, &axi_qos->qosreqctr);
  413. writel(0x00002064, &axi_qos->qosthres0);
  414. writel(0x00002004, &axi_qos->qosthres1);
  415. writel(0x00000000, &axi_qos->qosthres2);
  416. writel(0x00000001, &axi_qos->qosqon);
  417. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
  418. writel(0x00000001, &axi_qos->qosconf);
  419. writel(0x00002004, &axi_qos->qosctset0);
  420. writel(0x00002096, &axi_qos->qosctset1);
  421. writel(0x00002030, &axi_qos->qosctset2);
  422. writel(0x00002030, &axi_qos->qosctset3);
  423. writel(0x00000001, &axi_qos->qosreqctr);
  424. writel(0x00002064, &axi_qos->qosthres0);
  425. writel(0x00002004, &axi_qos->qosthres1);
  426. writel(0x00000000, &axi_qos->qosthres2);
  427. writel(0x00000001, &axi_qos->qosqon);
  428. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
  429. writel(0x00000001, &axi_qos->qosconf);
  430. writel(0x00002004, &axi_qos->qosctset0);
  431. writel(0x00002096, &axi_qos->qosctset1);
  432. writel(0x00002030, &axi_qos->qosctset2);
  433. writel(0x00002030, &axi_qos->qosctset3);
  434. writel(0x00000001, &axi_qos->qosreqctr);
  435. writel(0x00002064, &axi_qos->qosthres0);
  436. writel(0x00002004, &axi_qos->qosthres1);
  437. writel(0x00000000, &axi_qos->qosthres2);
  438. writel(0x00000001, &axi_qos->qosqon);
  439. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
  440. writel(0x00000001, &axi_qos->qosconf);
  441. writel(0x00002004, &axi_qos->qosctset0);
  442. writel(0x00002096, &axi_qos->qosctset1);
  443. writel(0x00002030, &axi_qos->qosctset2);
  444. writel(0x00002030, &axi_qos->qosctset3);
  445. writel(0x00000001, &axi_qos->qosreqctr);
  446. writel(0x00002064, &axi_qos->qosthres0);
  447. writel(0x00002004, &axi_qos->qosthres1);
  448. writel(0x00000000, &axi_qos->qosthres2);
  449. writel(0x00000001, &axi_qos->qosqon);
  450. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
  451. writel(0x00000000, &axi_qos->qosconf);
  452. writel(0x00002021, &axi_qos->qosctset0);
  453. writel(0x00000001, &axi_qos->qosreqctr);
  454. writel(0x00002064, &axi_qos->qosthres0);
  455. writel(0x00002004, &axi_qos->qosthres1);
  456. writel(0x00000000, &axi_qos->qosthres2);
  457. writel(0x00000001, &axi_qos->qosqon);
  458. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
  459. writel(0x00000000, &axi_qos->qosconf);
  460. writel(0x00002021, &axi_qos->qosctset0);
  461. writel(0x00000001, &axi_qos->qosreqctr);
  462. writel(0x00002064, &axi_qos->qosthres0);
  463. writel(0x00002004, &axi_qos->qosthres1);
  464. writel(0x00000000, &axi_qos->qosthres2);
  465. writel(0x00000001, &axi_qos->qosqon);
  466. axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
  467. writel(0x00000000, &axi_qos->qosconf);
  468. writel(0x0000214C, &axi_qos->qosctset0);
  469. writel(0x00000001, &axi_qos->qosreqctr);
  470. writel(0x00002064, &axi_qos->qosthres0);
  471. writel(0x00002004, &axi_qos->qosthres1);
  472. writel(0x00000000, &axi_qos->qosthres2);
  473. writel(0x00000001, &axi_qos->qosqon);
  474. axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
  475. writel(0x00000002, &axi_qos->qosconf);
  476. writel(0x00002245, &axi_qos->qosctset0);
  477. writel(0x00002096, &axi_qos->qosctset1);
  478. writel(0x00002030, &axi_qos->qosctset2);
  479. writel(0x00002030, &axi_qos->qosctset3);
  480. writel(0x00000001, &axi_qos->qosreqctr);
  481. writel(0x00002064, &axi_qos->qosthres0);
  482. writel(0x00002004, &axi_qos->qosthres1);
  483. writel(0x00000000, &axi_qos->qosthres2);
  484. writel(0x00000001, &axi_qos->qosqon);
  485. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
  486. writel(0x00000000, &axi_qos->qosconf);
  487. writel(0x000020A6, &axi_qos->qosctset0);
  488. writel(0x00000001, &axi_qos->qosreqctr);
  489. writel(0x00002064, &axi_qos->qosthres0);
  490. writel(0x00002004, &axi_qos->qosthres1);
  491. writel(0x00000000, &axi_qos->qosthres2);
  492. writel(0x00000001, &axi_qos->qosqon);
  493. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
  494. writel(0x00000000, &axi_qos->qosconf);
  495. writel(0x000020A6, &axi_qos->qosctset0);
  496. writel(0x00000001, &axi_qos->qosreqctr);
  497. writel(0x00002064, &axi_qos->qosthres0);
  498. writel(0x00002004, &axi_qos->qosthres1);
  499. writel(0x00000000, &axi_qos->qosthres2);
  500. writel(0x00000001, &axi_qos->qosqon);
  501. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
  502. writel(0x00000000, &axi_qos->qosconf);
  503. writel(0x00002053, &axi_qos->qosctset0);
  504. writel(0x00000001, &axi_qos->qosreqctr);
  505. writel(0x00002064, &axi_qos->qosthres0);
  506. writel(0x00002004, &axi_qos->qosthres1);
  507. writel(0x00000000, &axi_qos->qosthres2);
  508. writel(0x00000001, &axi_qos->qosqon);
  509. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
  510. writel(0x00000000, &axi_qos->qosconf);
  511. writel(0x00002053, &axi_qos->qosctset0);
  512. writel(0x00000001, &axi_qos->qosreqctr);
  513. writel(0x00002064, &axi_qos->qosthres0);
  514. writel(0x00002004, &axi_qos->qosthres1);
  515. writel(0x00000000, &axi_qos->qosthres2);
  516. writel(0x00000001, &axi_qos->qosqon);
  517. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
  518. writel(0x00000000, &axi_qos->qosconf);
  519. writel(0x00002053, &axi_qos->qosctset0);
  520. writel(0x00000001, &axi_qos->qosreqctr);
  521. writel(0x00002064, &axi_qos->qosthres0);
  522. writel(0x00002004, &axi_qos->qosthres1);
  523. writel(0x00000000, &axi_qos->qosthres2);
  524. writel(0x00000001, &axi_qos->qosqon);
  525. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
  526. writel(0x00000000, &axi_qos->qosconf);
  527. writel(0x0000214C, &axi_qos->qosctset0);
  528. writel(0x00000001, &axi_qos->qosreqctr);
  529. writel(0x00002064, &axi_qos->qosthres0);
  530. writel(0x00002004, &axi_qos->qosthres1);
  531. writel(0x00000000, &axi_qos->qosthres2);
  532. writel(0x00000001, &axi_qos->qosqon);
  533. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
  534. writel(0x00000002, &axi_qos->qosconf);
  535. writel(0x00002245, &axi_qos->qosctset0);
  536. writel(0x00000001, &axi_qos->qosreqctr);
  537. writel(0x00002064, &axi_qos->qosthres0);
  538. writel(0x00002004, &axi_qos->qosthres1);
  539. writel(0x00000000, &axi_qos->qosthres2);
  540. writel(0x00000001, &axi_qos->qosqon);
  541. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
  542. writel(0x00000000, &axi_qos->qosconf);
  543. writel(0x00002029, &axi_qos->qosctset0);
  544. writel(0x00000001, &axi_qos->qosreqctr);
  545. writel(0x00002064, &axi_qos->qosthres0);
  546. writel(0x00002004, &axi_qos->qosthres1);
  547. writel(0x00000000, &axi_qos->qosthres2);
  548. writel(0x00000001, &axi_qos->qosqon);
  549. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
  550. writel(0x00000002, &axi_qos->qosconf);
  551. writel(0x00002245, &axi_qos->qosctset0);
  552. writel(0x00000001, &axi_qos->qosreqctr);
  553. writel(0x00002064, &axi_qos->qosthres0);
  554. writel(0x00002004, &axi_qos->qosthres1);
  555. writel(0x00000000, &axi_qos->qosthres2);
  556. writel(0x00000001, &axi_qos->qosqon);
  557. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
  558. writel(0x00000000, &axi_qos->qosconf);
  559. writel(0x00002053, &axi_qos->qosctset0);
  560. writel(0x00000001, &axi_qos->qosreqctr);
  561. writel(0x00002064, &axi_qos->qosthres0);
  562. writel(0x00002004, &axi_qos->qosthres1);
  563. writel(0x00000000, &axi_qos->qosthres2);
  564. writel(0x00000001, &axi_qos->qosqon);
  565. axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
  566. writel(0x00000000, &axi_qos->qosconf);
  567. writel(0x000020A6, &axi_qos->qosctset0);
  568. writel(0x00000001, &axi_qos->qosreqctr);
  569. writel(0x00002064, &axi_qos->qosthres0);
  570. writel(0x00002004, &axi_qos->qosthres1);
  571. writel(0x00000000, &axi_qos->qosthres2);
  572. writel(0x00000001, &axi_qos->qosqon);
  573. axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
  574. writel(0x00000000, &axi_qos->qosconf);
  575. writel(0x00002053, &axi_qos->qosctset0);
  576. writel(0x00000001, &axi_qos->qosreqctr);
  577. writel(0x00002064, &axi_qos->qosthres0);
  578. writel(0x00002004, &axi_qos->qosthres1);
  579. writel(0x00000000, &axi_qos->qosthres2);
  580. writel(0x00000001, &axi_qos->qosqon);
  581. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
  582. writel(0x00000002, &axi_qos->qosconf);
  583. writel(0x00002245, &axi_qos->qosctset0);
  584. writel(0x00000001, &axi_qos->qosreqctr);
  585. writel(0x00002064, &axi_qos->qosthres0);
  586. writel(0x00002004, &axi_qos->qosthres1);
  587. writel(0x00000000, &axi_qos->qosthres2);
  588. writel(0x00000001, &axi_qos->qosqon);
  589. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
  590. writel(0x00000000, &axi_qos->qosconf);
  591. writel(0x00002053, &axi_qos->qosctset0);
  592. writel(0x00000001, &axi_qos->qosreqctr);
  593. writel(0x00002064, &axi_qos->qosthres0);
  594. writel(0x00002004, &axi_qos->qosthres1);
  595. writel(0x00000000, &axi_qos->qosthres2);
  596. writel(0x00000001, &axi_qos->qosqon);
  597. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
  598. writel(0x00000000, &axi_qos->qosconf);
  599. writel(0x00002053, &axi_qos->qosctset0);
  600. writel(0x00000001, &axi_qos->qosreqctr);
  601. writel(0x00002064, &axi_qos->qosthres0);
  602. writel(0x00002004, &axi_qos->qosthres1);
  603. writel(0x00000000, &axi_qos->qosthres2);
  604. writel(0x00000001, &axi_qos->qosqon);
  605. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
  606. writel(0x00000000, &axi_qos->qosconf);
  607. writel(0x0000214C, &axi_qos->qosctset0);
  608. writel(0x00000001, &axi_qos->qosreqctr);
  609. writel(0x00002064, &axi_qos->qosthres0);
  610. writel(0x00002004, &axi_qos->qosthres1);
  611. writel(0x00000000, &axi_qos->qosthres2);
  612. writel(0x00000001, &axi_qos->qosqon);
  613. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
  614. writel(0x00000000, &axi_qos->qosconf);
  615. writel(0x0000214C, &axi_qos->qosctset0);
  616. writel(0x00000001, &axi_qos->qosreqctr);
  617. writel(0x00002064, &axi_qos->qosthres0);
  618. writel(0x00002004, &axi_qos->qosthres1);
  619. writel(0x00000000, &axi_qos->qosthres2);
  620. writel(0x00000001, &axi_qos->qosqon);
  621. axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
  622. writel(0x00000000, &axi_qos->qosconf);
  623. writel(0x000020A6, &axi_qos->qosctset0);
  624. writel(0x00000001, &axi_qos->qosreqctr);
  625. writel(0x00002064, &axi_qos->qosthres0);
  626. writel(0x00002004, &axi_qos->qosthres1);
  627. writel(0x00000000, &axi_qos->qosthres2);
  628. writel(0x00000001, &axi_qos->qosqon);
  629. axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
  630. writel(0x00000000, &axi_qos->qosconf);
  631. writel(0x00002053, &axi_qos->qosctset0);
  632. writel(0x00000001, &axi_qos->qosreqctr);
  633. writel(0x00002064, &axi_qos->qosthres0);
  634. writel(0x00002004, &axi_qos->qosthres1);
  635. writel(0x00000000, &axi_qos->qosthres2);
  636. writel(0x00000001, &axi_qos->qosqon);
  637. axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
  638. writel(0x00000000, &axi_qos->qosconf);
  639. writel(0x00002053, &axi_qos->qosctset0);
  640. writel(0x00000001, &axi_qos->qosreqctr);
  641. writel(0x00002064, &axi_qos->qosthres0);
  642. writel(0x00002004, &axi_qos->qosthres1);
  643. writel(0x00000000, &axi_qos->qosthres2);
  644. writel(0x00000001, &axi_qos->qosqon);
  645. /* QoS Register (RT-AXI) */
  646. axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
  647. if (IS_R8A7791_ES2())
  648. writel(0x00000001, &axi_qos->qosconf);
  649. else
  650. writel(0x00000000, &axi_qos->qosconf);
  651. writel(0x00002053, &axi_qos->qosctset0);
  652. writel(0x00002096, &axi_qos->qosctset1);
  653. writel(0x00002030, &axi_qos->qosctset2);
  654. writel(0x00002030, &axi_qos->qosctset3);
  655. writel(0x00000001, &axi_qos->qosreqctr);
  656. writel(0x00002064, &axi_qos->qosthres0);
  657. writel(0x00002004, &axi_qos->qosthres1);
  658. writel(0x00000000, &axi_qos->qosthres2);
  659. writel(0x00000001, &axi_qos->qosqon);
  660. axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
  661. writel(0x00000000, &axi_qos->qosconf);
  662. writel(0x00002053, &axi_qos->qosctset0);
  663. writel(0x00002096, &axi_qos->qosctset1);
  664. writel(0x00002030, &axi_qos->qosctset2);
  665. writel(0x00002030, &axi_qos->qosctset3);
  666. writel(0x00000001, &axi_qos->qosreqctr);
  667. writel(0x00002064, &axi_qos->qosthres0);
  668. writel(0x00002004, &axi_qos->qosthres1);
  669. writel(0x00000000, &axi_qos->qosthres2);
  670. writel(0x00000001, &axi_qos->qosqon);
  671. axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
  672. writel(0x00000000, &axi_qos->qosconf);
  673. writel(0x00002299, &axi_qos->qosctset0);
  674. writel(0x00000001, &axi_qos->qosreqctr);
  675. writel(0x00002064, &axi_qos->qosthres0);
  676. writel(0x00002004, &axi_qos->qosthres1);
  677. writel(0x00000000, &axi_qos->qosthres2);
  678. writel(0x00000001, &axi_qos->qosqon);
  679. axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
  680. writel(0x00000000, &axi_qos->qosconf);
  681. writel(0x00002029, &axi_qos->qosctset0);
  682. writel(0x00000001, &axi_qos->qosreqctr);
  683. writel(0x00002064, &axi_qos->qosthres0);
  684. writel(0x00002004, &axi_qos->qosthres1);
  685. writel(0x00000000, &axi_qos->qosthres2);
  686. writel(0x00000001, &axi_qos->qosqon);
  687. axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
  688. writel(0x00000002, &axi_qos->qosconf);
  689. writel(0x00002245, &axi_qos->qosctset0);
  690. writel(0x00002096, &axi_qos->qosctset1);
  691. writel(0x00002030, &axi_qos->qosctset2);
  692. writel(0x00002030, &axi_qos->qosctset3);
  693. writel(0x00000001, &axi_qos->qosreqctr);
  694. writel(0x00002064, &axi_qos->qosthres0);
  695. writel(0x00002004, &axi_qos->qosthres1);
  696. writel(0x00000000, &axi_qos->qosthres2);
  697. writel(0x00000001, &axi_qos->qosqon);
  698. axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
  699. writel(0x00000000, &axi_qos->qosconf);
  700. writel(0x00002029, &axi_qos->qosctset0);
  701. writel(0x00002096, &axi_qos->qosctset1);
  702. writel(0x00002030, &axi_qos->qosctset2);
  703. writel(0x00002030, &axi_qos->qosctset3);
  704. writel(0x00000001, &axi_qos->qosreqctr);
  705. writel(0x00002064, &axi_qos->qosthres0);
  706. writel(0x00002004, &axi_qos->qosthres1);
  707. writel(0x00000000, &axi_qos->qosthres2);
  708. writel(0x00000001, &axi_qos->qosqon);
  709. axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
  710. writel(0x00000002, &axi_qos->qosconf);
  711. writel(0x00002245, &axi_qos->qosctset0);
  712. writel(0x00000001, &axi_qos->qosreqctr);
  713. writel(0x00002064, &axi_qos->qosthres0);
  714. writel(0x00002004, &axi_qos->qosthres1);
  715. writel(0x00000000, &axi_qos->qosthres2);
  716. writel(0x00000001, &axi_qos->qosqon);
  717. /* QoS Register (MP-AXI) */
  718. axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
  719. writel(0x00000000, &axi_qos->qosconf);
  720. writel(0x00002037, &axi_qos->qosctset0);
  721. writel(0x00000001, &axi_qos->qosreqctr);
  722. writel(0x00002064, &axi_qos->qosthres0);
  723. writel(0x00002004, &axi_qos->qosthres1);
  724. writel(0x00000000, &axi_qos->qosthres2);
  725. writel(0x00000001, &axi_qos->qosqon);
  726. axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
  727. writel(0x00000001, &axi_qos->qosconf);
  728. writel(0x00002014, &axi_qos->qosctset0);
  729. writel(0x00000040, &axi_qos->qosreqctr);
  730. writel(0x00002064, &axi_qos->qosthres0);
  731. writel(0x00002004, &axi_qos->qosthres1);
  732. writel(0x00000000, &axi_qos->qosthres2);
  733. writel(0x00000001, &axi_qos->qosqon);
  734. axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
  735. writel(0x00000001, &axi_qos->qosconf);
  736. writel(0x00002014, &axi_qos->qosctset0);
  737. writel(0x00000040, &axi_qos->qosreqctr);
  738. writel(0x00002064, &axi_qos->qosthres0);
  739. writel(0x00002004, &axi_qos->qosthres1);
  740. writel(0x00000000, &axi_qos->qosthres2);
  741. writel(0x00000001, &axi_qos->qosqon);
  742. axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
  743. writel(0x00000001, &axi_qos->qosconf);
  744. writel(0x00001FF0, &axi_qos->qosctset0);
  745. writel(0x00000020, &axi_qos->qosreqctr);
  746. writel(0x00002064, &axi_qos->qosthres0);
  747. writel(0x00002004, &axi_qos->qosthres1);
  748. writel(0x00002001, &axi_qos->qosthres2);
  749. writel(0x00000001, &axi_qos->qosqon);
  750. axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
  751. writel(0x00000001, &axi_qos->qosconf);
  752. writel(0x00002004, &axi_qos->qosctset0);
  753. writel(0x00002096, &axi_qos->qosctset1);
  754. writel(0x00002030, &axi_qos->qosctset2);
  755. writel(0x00002030, &axi_qos->qosctset3);
  756. writel(0x00000001, &axi_qos->qosreqctr);
  757. writel(0x00002064, &axi_qos->qosthres0);
  758. writel(0x00002004, &axi_qos->qosthres1);
  759. writel(0x00000000, &axi_qos->qosthres2);
  760. writel(0x00000001, &axi_qos->qosqon);
  761. axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
  762. writel(0x00000000, &axi_qos->qosconf);
  763. writel(0x00002053, &axi_qos->qosctset0);
  764. writel(0x00000001, &axi_qos->qosreqctr);
  765. writel(0x00002064, &axi_qos->qosthres0);
  766. writel(0x00002004, &axi_qos->qosthres1);
  767. writel(0x00000000, &axi_qos->qosthres2);
  768. writel(0x00000001, &axi_qos->qosqon);
  769. axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
  770. writel(0x00000000, &axi_qos->qosconf);
  771. writel(0x0000206E, &axi_qos->qosctset0);
  772. writel(0x00000001, &axi_qos->qosreqctr);
  773. writel(0x00002064, &axi_qos->qosthres0);
  774. writel(0x00002004, &axi_qos->qosthres1);
  775. writel(0x00000000, &axi_qos->qosthres2);
  776. writel(0x00000001, &axi_qos->qosqon);
  777. /* QoS Register (SYS-AXI256) */
  778. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
  779. writel(0x00000002, &axi_qos->qosconf);
  780. if (IS_R8A7791_ES2())
  781. writel(0x000020EB, &axi_qos->qosctset0);
  782. else
  783. writel(0x00002245, &axi_qos->qosctset0);
  784. writel(0x00002096, &axi_qos->qosctset1);
  785. writel(0x00002030, &axi_qos->qosctset2);
  786. writel(0x00002030, &axi_qos->qosctset3);
  787. writel(0x00000001, &axi_qos->qosreqctr);
  788. writel(0x00002064, &axi_qos->qosthres0);
  789. writel(0x00002004, &axi_qos->qosthres1);
  790. writel(0x00000000, &axi_qos->qosthres2);
  791. writel(0x00000001, &axi_qos->qosqon);
  792. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
  793. writel(0x00000002, &axi_qos->qosconf);
  794. if (IS_R8A7791_ES2())
  795. writel(0x000020EB, &axi_qos->qosctset0);
  796. else
  797. writel(0x00002245, &axi_qos->qosctset0);
  798. writel(0x00002096, &axi_qos->qosctset1);
  799. writel(0x00002030, &axi_qos->qosctset2);
  800. writel(0x00002030, &axi_qos->qosctset3);
  801. writel(0x00000001, &axi_qos->qosreqctr);
  802. writel(0x00002064, &axi_qos->qosthres0);
  803. writel(0x00002004, &axi_qos->qosthres1);
  804. writel(0x00000000, &axi_qos->qosthres2);
  805. writel(0x00000001, &axi_qos->qosqon);
  806. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
  807. writel(0x00000002, &axi_qos->qosconf);
  808. if (IS_R8A7791_ES2())
  809. writel(0x000020EB, &axi_qos->qosctset0);
  810. else
  811. writel(0x00002245, &axi_qos->qosctset0);
  812. writel(0x00002096, &axi_qos->qosctset1);
  813. writel(0x00002030, &axi_qos->qosctset2);
  814. writel(0x00002030, &axi_qos->qosctset3);
  815. writel(0x00000001, &axi_qos->qosreqctr);
  816. writel(0x00002064, &axi_qos->qosthres0);
  817. writel(0x00002004, &axi_qos->qosthres1);
  818. writel(0x00000000, &axi_qos->qosthres2);
  819. writel(0x00000001, &axi_qos->qosqon);
  820. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
  821. writel(0x00000002, &axi_qos->qosconf);
  822. writel(0x00002245, &axi_qos->qosctset0);
  823. writel(0x00002096, &axi_qos->qosctset1);
  824. writel(0x00002030, &axi_qos->qosctset2);
  825. writel(0x00002030, &axi_qos->qosctset3);
  826. writel(0x00000001, &axi_qos->qosreqctr);
  827. writel(0x00002064, &axi_qos->qosthres0);
  828. writel(0x00002004, &axi_qos->qosthres1);
  829. writel(0x00000000, &axi_qos->qosthres2);
  830. writel(0x00000001, &axi_qos->qosqon);
  831. /* QoS Register (CCI-AXI) */
  832. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
  833. writel(0x00000001, &axi_qos->qosconf);
  834. writel(0x00002004, &axi_qos->qosctset0);
  835. writel(0x00002096, &axi_qos->qosctset1);
  836. writel(0x00002030, &axi_qos->qosctset2);
  837. writel(0x00002030, &axi_qos->qosctset3);
  838. writel(0x00000001, &axi_qos->qosreqctr);
  839. writel(0x00002064, &axi_qos->qosthres0);
  840. writel(0x00002004, &axi_qos->qosthres1);
  841. writel(0x00000000, &axi_qos->qosthres2);
  842. writel(0x00000001, &axi_qos->qosqon);
  843. axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
  844. writel(0x00000002, &axi_qos->qosconf);
  845. writel(0x00002245, &axi_qos->qosctset0);
  846. writel(0x00002096, &axi_qos->qosctset1);
  847. writel(0x00002030, &axi_qos->qosctset2);
  848. writel(0x00002030, &axi_qos->qosctset3);
  849. writel(0x00000001, &axi_qos->qosreqctr);
  850. writel(0x00002064, &axi_qos->qosthres0);
  851. writel(0x00002004, &axi_qos->qosthres1);
  852. writel(0x00000000, &axi_qos->qosthres2);
  853. writel(0x00000001, &axi_qos->qosqon);
  854. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
  855. writel(0x00000001, &axi_qos->qosconf);
  856. writel(0x00002004, &axi_qos->qosctset0);
  857. writel(0x00002096, &axi_qos->qosctset1);
  858. writel(0x00002030, &axi_qos->qosctset2);
  859. writel(0x00002030, &axi_qos->qosctset3);
  860. writel(0x00000001, &axi_qos->qosreqctr);
  861. writel(0x00002064, &axi_qos->qosthres0);
  862. writel(0x00002004, &axi_qos->qosthres1);
  863. writel(0x00000000, &axi_qos->qosthres2);
  864. writel(0x00000001, &axi_qos->qosqon);
  865. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
  866. writel(0x00000001, &axi_qos->qosconf);
  867. writel(0x00002004, &axi_qos->qosctset0);
  868. writel(0x00002096, &axi_qos->qosctset1);
  869. writel(0x00002030, &axi_qos->qosctset2);
  870. writel(0x00002030, &axi_qos->qosctset3);
  871. writel(0x00000001, &axi_qos->qosreqctr);
  872. writel(0x00002064, &axi_qos->qosthres0);
  873. writel(0x00002004, &axi_qos->qosthres1);
  874. writel(0x00000000, &axi_qos->qosthres2);
  875. writel(0x00000001, &axi_qos->qosqon);
  876. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
  877. writel(0x00000001, &axi_qos->qosconf);
  878. writel(0x00002004, &axi_qos->qosctset0);
  879. writel(0x00002096, &axi_qos->qosctset1);
  880. writel(0x00002030, &axi_qos->qosctset2);
  881. writel(0x00002030, &axi_qos->qosctset3);
  882. writel(0x00000001, &axi_qos->qosreqctr);
  883. writel(0x00002064, &axi_qos->qosthres0);
  884. writel(0x00002004, &axi_qos->qosthres1);
  885. writel(0x00000000, &axi_qos->qosthres2);
  886. writel(0x00000001, &axi_qos->qosqon);
  887. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
  888. writel(0x00000002, &axi_qos->qosconf);
  889. writel(0x00002245, &axi_qos->qosctset0);
  890. writel(0x00002096, &axi_qos->qosctset1);
  891. writel(0x00002030, &axi_qos->qosctset2);
  892. writel(0x00002030, &axi_qos->qosctset3);
  893. writel(0x00000001, &axi_qos->qosreqctr);
  894. writel(0x00002064, &axi_qos->qosthres0);
  895. writel(0x00002004, &axi_qos->qosthres1);
  896. writel(0x00000000, &axi_qos->qosthres2);
  897. writel(0x00000001, &axi_qos->qosqon);
  898. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
  899. writel(0x00000001, &axi_qos->qosconf);
  900. writel(0x00002004, &axi_qos->qosctset0);
  901. writel(0x00002096, &axi_qos->qosctset1);
  902. writel(0x00002030, &axi_qos->qosctset2);
  903. writel(0x00002030, &axi_qos->qosctset3);
  904. writel(0x00000001, &axi_qos->qosreqctr);
  905. writel(0x00002064, &axi_qos->qosthres0);
  906. writel(0x00002004, &axi_qos->qosthres1);
  907. writel(0x00000000, &axi_qos->qosthres2);
  908. writel(0x00000001, &axi_qos->qosqon);
  909. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
  910. writel(0x00000001, &axi_qos->qosconf);
  911. writel(0x00002004, &axi_qos->qosctset0);
  912. writel(0x00002096, &axi_qos->qosctset1);
  913. writel(0x00002030, &axi_qos->qosctset2);
  914. writel(0x00002030, &axi_qos->qosctset3);
  915. writel(0x00000001, &axi_qos->qosreqctr);
  916. writel(0x00002064, &axi_qos->qosthres0);
  917. writel(0x00002004, &axi_qos->qosthres1);
  918. writel(0x00000000, &axi_qos->qosthres2);
  919. writel(0x00000001, &axi_qos->qosqon);
  920. /* QoS Register (Media-AXI) */
  921. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
  922. writel(0x00000002, &axi_qos->qosconf);
  923. writel(0x000020DC, &axi_qos->qosctset0);
  924. writel(0x00002096, &axi_qos->qosctset1);
  925. writel(0x00002030, &axi_qos->qosctset2);
  926. writel(0x00002030, &axi_qos->qosctset3);
  927. writel(0x00000020, &axi_qos->qosreqctr);
  928. writel(0x000020AA, &axi_qos->qosthres0);
  929. writel(0x00002032, &axi_qos->qosthres1);
  930. writel(0x00000001, &axi_qos->qosthres2);
  931. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
  932. writel(0x00000002, &axi_qos->qosconf);
  933. writel(0x000020DC, &axi_qos->qosctset0);
  934. writel(0x00002096, &axi_qos->qosctset1);
  935. writel(0x00002030, &axi_qos->qosctset2);
  936. writel(0x00002030, &axi_qos->qosctset3);
  937. writel(0x00000020, &axi_qos->qosreqctr);
  938. writel(0x000020AA, &axi_qos->qosthres0);
  939. writel(0x00002032, &axi_qos->qosthres1);
  940. writel(0x00000001, &axi_qos->qosthres2);
  941. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
  942. writel(0x00000001, &axi_qos->qosconf);
  943. writel(0x00002190, &axi_qos->qosctset0);
  944. writel(0x00000020, &axi_qos->qosreqctr);
  945. writel(0x00002064, &axi_qos->qosthres0);
  946. writel(0x00002004, &axi_qos->qosthres1);
  947. writel(0x00000001, &axi_qos->qosthres2);
  948. writel(0x00000001, &axi_qos->qosqon);
  949. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
  950. writel(0x00000001, &axi_qos->qosconf);
  951. writel(0x00002190, &axi_qos->qosctset0);
  952. writel(0x00000020, &axi_qos->qosreqctr);
  953. if (IS_R8A7791_ES2()) {
  954. writel(0x00000001, &axi_qos->qosthres0);
  955. writel(0x00000001, &axi_qos->qosthres1);
  956. } else {
  957. writel(0x00002064, &axi_qos->qosthres0);
  958. writel(0x00002004, &axi_qos->qosthres1);
  959. }
  960. writel(0x00000001, &axi_qos->qosthres2);
  961. writel(0x00000001, &axi_qos->qosqon);
  962. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
  963. writel(0x00000001, &axi_qos->qosconf);
  964. writel(0x00002190, &axi_qos->qosctset0);
  965. writel(0x00000020, &axi_qos->qosreqctr);
  966. writel(0x00002064, &axi_qos->qosthres0);
  967. writel(0x00002004, &axi_qos->qosthres1);
  968. writel(0x00000001, &axi_qos->qosthres2);
  969. writel(0x00000001, &axi_qos->qosqon);
  970. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
  971. writel(0x00000001, &axi_qos->qosconf);
  972. writel(0x00002190, &axi_qos->qosctset0);
  973. writel(0x00000020, &axi_qos->qosreqctr);
  974. writel(0x00002064, &axi_qos->qosthres0);
  975. writel(0x00002004, &axi_qos->qosthres1);
  976. writel(0x00000001, &axi_qos->qosthres2);
  977. writel(0x00000001, &axi_qos->qosqon);
  978. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
  979. writel(0x00000001, &axi_qos->qosconf);
  980. writel(0x00002190, &axi_qos->qosctset0);
  981. writel(0x00000020, &axi_qos->qosreqctr);
  982. writel(0x00002064, &axi_qos->qosthres0);
  983. writel(0x00002004, &axi_qos->qosthres1);
  984. writel(0x00000001, &axi_qos->qosthres2);
  985. writel(0x00000001, &axi_qos->qosqon);
  986. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
  987. writel(0x00000001, &axi_qos->qosconf);
  988. writel(0x00002190, &axi_qos->qosctset0);
  989. writel(0x00000020, &axi_qos->qosreqctr);
  990. if (IS_R8A7791_ES2()) {
  991. writel(0x00000001, &axi_qos->qosthres0);
  992. writel(0x00000001, &axi_qos->qosthres1);
  993. } else {
  994. writel(0x00002064, &axi_qos->qosthres0);
  995. writel(0x00002004, &axi_qos->qosthres1);
  996. }
  997. writel(0x00000001, &axi_qos->qosthres2);
  998. writel(0x00000001, &axi_qos->qosqon);
  999. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
  1000. writel(0x00000001, &axi_qos->qosconf);
  1001. writel(0x00002190, &axi_qos->qosctset0);
  1002. writel(0x00000020, &axi_qos->qosreqctr);
  1003. writel(0x00002064, &axi_qos->qosthres0);
  1004. writel(0x00002004, &axi_qos->qosthres1);
  1005. writel(0x00000001, &axi_qos->qosthres2);
  1006. writel(0x00000001, &axi_qos->qosqon);
  1007. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
  1008. writel(0x00000001, &axi_qos->qosconf);
  1009. writel(0x00002190, &axi_qos->qosctset0);
  1010. writel(0x00000020, &axi_qos->qosreqctr);
  1011. if (IS_R8A7791_ES2()) {
  1012. writel(0x00000001, &axi_qos->qosthres0);
  1013. writel(0x00000001, &axi_qos->qosthres1);
  1014. } else {
  1015. writel(0x00002064, &axi_qos->qosthres0);
  1016. writel(0x00002004, &axi_qos->qosthres1);
  1017. }
  1018. writel(0x00000001, &axi_qos->qosthres2);
  1019. writel(0x00000001, &axi_qos->qosqon);
  1020. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
  1021. writel(0x00000001, &axi_qos->qosconf);
  1022. writel(0x00002190, &axi_qos->qosctset0);
  1023. writel(0x00000020, &axi_qos->qosreqctr);
  1024. writel(0x00002064, &axi_qos->qosthres0);
  1025. writel(0x00002004, &axi_qos->qosthres1);
  1026. writel(0x00000001, &axi_qos->qosthres2);
  1027. writel(0x00000001, &axi_qos->qosqon);
  1028. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
  1029. writel(0x00000001, &axi_qos->qosconf);
  1030. writel(0x00002190, &axi_qos->qosctset0);
  1031. writel(0x00000020, &axi_qos->qosreqctr);
  1032. if (IS_R8A7791_ES2()) {
  1033. writel(0x00000001, &axi_qos->qosthres0);
  1034. writel(0x00000001, &axi_qos->qosthres1);
  1035. } else {
  1036. writel(0x00002064, &axi_qos->qosthres0);
  1037. writel(0x00002004, &axi_qos->qosthres1);
  1038. }
  1039. writel(0x00000001, &axi_qos->qosthres2);
  1040. writel(0x00000001, &axi_qos->qosqon);
  1041. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
  1042. writel(0x00000001, &axi_qos->qosconf);
  1043. if (IS_R8A7791_ES2())
  1044. writel(0x00001FF0, &axi_qos->qosctset0);
  1045. else
  1046. writel(0x000020C8, &axi_qos->qosctset0);
  1047. writel(0x00000020, &axi_qos->qosreqctr);
  1048. writel(0x00002064, &axi_qos->qosthres0);
  1049. writel(0x00002004, &axi_qos->qosthres1);
  1050. if (IS_R8A7791_ES2())
  1051. writel(0x00002001, &axi_qos->qosthres2);
  1052. else
  1053. writel(0x00000001, &axi_qos->qosthres2);
  1054. writel(0x00000001, &axi_qos->qosqon);
  1055. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
  1056. writel(0x00000001, &axi_qos->qosconf);
  1057. writel(0x000020C8, &axi_qos->qosctset0);
  1058. writel(0x00000020, &axi_qos->qosreqctr);
  1059. writel(0x00002064, &axi_qos->qosthres0);
  1060. writel(0x00002004, &axi_qos->qosthres1);
  1061. writel(0x00000001, &axi_qos->qosthres2);
  1062. writel(0x00000001, &axi_qos->qosqon);
  1063. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
  1064. writel(0x00000001, &axi_qos->qosconf);
  1065. writel(0x000020C8, &axi_qos->qosctset0);
  1066. writel(0x00000020, &axi_qos->qosreqctr);
  1067. if (IS_R8A7791_ES2()) {
  1068. writel(0x00000001, &axi_qos->qosthres0);
  1069. writel(0x00000001, &axi_qos->qosthres1);
  1070. } else {
  1071. writel(0x00002064, &axi_qos->qosthres0);
  1072. writel(0x00002004, &axi_qos->qosthres1);
  1073. }
  1074. writel(0x00000001, &axi_qos->qosthres2);
  1075. writel(0x00000001, &axi_qos->qosqon);
  1076. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
  1077. writel(0x00000001, &axi_qos->qosconf);
  1078. writel(0x000020C8, &axi_qos->qosctset0);
  1079. writel(0x00000020, &axi_qos->qosreqctr);
  1080. writel(0x00002064, &axi_qos->qosthres0);
  1081. writel(0x00002004, &axi_qos->qosthres1);
  1082. writel(0x00000001, &axi_qos->qosthres2);
  1083. writel(0x00000001, &axi_qos->qosqon);
  1084. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
  1085. writel(0x00000001, &axi_qos->qosconf);
  1086. writel(0x000020C8, &axi_qos->qosctset0);
  1087. writel(0x00000020, &axi_qos->qosreqctr);
  1088. writel(0x00002064, &axi_qos->qosthres0);
  1089. writel(0x00002004, &axi_qos->qosthres1);
  1090. writel(0x00000001, &axi_qos->qosthres2);
  1091. writel(0x00000001, &axi_qos->qosqon);
  1092. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
  1093. writel(0x00000001, &axi_qos->qosconf);
  1094. writel(0x000020C8, &axi_qos->qosctset0);
  1095. writel(0x00000020, &axi_qos->qosreqctr);
  1096. writel(0x00002064, &axi_qos->qosthres0);
  1097. writel(0x00002004, &axi_qos->qosthres1);
  1098. writel(0x00000001, &axi_qos->qosthres2);
  1099. writel(0x00000001, &axi_qos->qosqon);
  1100. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
  1101. writel(0x00000001, &axi_qos->qosconf);
  1102. writel(0x000020C8, &axi_qos->qosctset0);
  1103. writel(0x00000020, &axi_qos->qosreqctr);
  1104. if (IS_R8A7791_ES2()) {
  1105. writel(0x00000001, &axi_qos->qosthres0);
  1106. writel(0x00000001, &axi_qos->qosthres1);
  1107. } else {
  1108. writel(0x00002064, &axi_qos->qosthres0);
  1109. writel(0x00002004, &axi_qos->qosthres1);
  1110. }
  1111. writel(0x00000001, &axi_qos->qosthres2);
  1112. writel(0x00000001, &axi_qos->qosqon);
  1113. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
  1114. writel(0x00000001, &axi_qos->qosconf);
  1115. writel(0x000020C8, &axi_qos->qosctset0);
  1116. writel(0x00000020, &axi_qos->qosreqctr);
  1117. writel(0x00002064, &axi_qos->qosthres0);
  1118. writel(0x00002004, &axi_qos->qosthres1);
  1119. writel(0x00000001, &axi_qos->qosthres2);
  1120. writel(0x00000001, &axi_qos->qosqon);
  1121. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
  1122. writel(0x00000001, &axi_qos->qosconf);
  1123. writel(0x000020C8, &axi_qos->qosctset0);
  1124. writel(0x00000020, &axi_qos->qosreqctr);
  1125. if (IS_R8A7791_ES2()) {
  1126. writel(0x00000001, &axi_qos->qosthres0);
  1127. writel(0x00000001, &axi_qos->qosthres1);
  1128. } else {
  1129. writel(0x00002064, &axi_qos->qosthres0);
  1130. writel(0x00002004, &axi_qos->qosthres1);
  1131. }
  1132. writel(0x00000001, &axi_qos->qosthres2);
  1133. writel(0x00000001, &axi_qos->qosqon);
  1134. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
  1135. writel(0x00000001, &axi_qos->qosconf);
  1136. writel(0x000020C8, &axi_qos->qosctset0);
  1137. writel(0x00000020, &axi_qos->qosreqctr);
  1138. writel(0x00002064, &axi_qos->qosthres0);
  1139. writel(0x00002004, &axi_qos->qosthres1);
  1140. writel(0x00000001, &axi_qos->qosthres2);
  1141. writel(0x00000001, &axi_qos->qosqon);
  1142. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
  1143. writel(0x00000001, &axi_qos->qosconf);
  1144. writel(0x000020C8, &axi_qos->qosctset0);
  1145. writel(0x00000020, &axi_qos->qosreqctr);
  1146. writel(0x00002064, &axi_qos->qosthres0);
  1147. writel(0x00002004, &axi_qos->qosthres1);
  1148. writel(0x00000001, &axi_qos->qosthres2);
  1149. writel(0x00000001, &axi_qos->qosqon);
  1150. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
  1151. if (IS_R8A7791_ES2())
  1152. writel(0x00000003, &axi_qos->qosconf);
  1153. else
  1154. writel(0x00000000, &axi_qos->qosconf);
  1155. writel(0x000020C8, &axi_qos->qosctset0);
  1156. writel(0x00002064, &axi_qos->qosthres0);
  1157. writel(0x00002004, &axi_qos->qosthres1);
  1158. writel(0x00000001, &axi_qos->qosthres2);
  1159. writel(0x00000001, &axi_qos->qosqon);
  1160. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
  1161. if (IS_R8A7791_ES2())
  1162. writel(0x00000003, &axi_qos->qosconf);
  1163. else
  1164. writel(0x00000000, &axi_qos->qosconf);
  1165. writel(0x000020C8, &axi_qos->qosctset0);
  1166. writel(0x00002064, &axi_qos->qosthres0);
  1167. writel(0x00002004, &axi_qos->qosthres1);
  1168. writel(0x00000001, &axi_qos->qosthres2);
  1169. writel(0x00000001, &axi_qos->qosqon);
  1170. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
  1171. if (IS_R8A7791_ES2())
  1172. writel(0x00000003, &axi_qos->qosconf);
  1173. else
  1174. writel(0x00000000, &axi_qos->qosconf);
  1175. writel(0x000020C8, &axi_qos->qosctset0);
  1176. writel(0x00002064, &axi_qos->qosthres0);
  1177. writel(0x00002004, &axi_qos->qosthres1);
  1178. writel(0x00000001, &axi_qos->qosthres2);
  1179. writel(0x00000001, &axi_qos->qosqon);
  1180. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
  1181. if (IS_R8A7791_ES2())
  1182. writel(0x00000003, &axi_qos->qosconf);
  1183. else
  1184. writel(0x00000000, &axi_qos->qosconf);
  1185. writel(0x000020C8, &axi_qos->qosctset0);
  1186. writel(0x00002064, &axi_qos->qosthres0);
  1187. writel(0x00002004, &axi_qos->qosthres1);
  1188. writel(0x00000001, &axi_qos->qosthres2);
  1189. writel(0x00000001, &axi_qos->qosqon);
  1190. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
  1191. if (IS_R8A7791_ES2())
  1192. writel(0x00000003, &axi_qos->qosconf);
  1193. else
  1194. writel(0x00000000, &axi_qos->qosconf);
  1195. writel(0x00002063, &axi_qos->qosctset0);
  1196. writel(0x00000001, &axi_qos->qosreqctr);
  1197. writel(0x00002064, &axi_qos->qosthres0);
  1198. writel(0x00002004, &axi_qos->qosthres1);
  1199. writel(0x00000001, &axi_qos->qosthres2);
  1200. writel(0x00000001, &axi_qos->qosqon);
  1201. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
  1202. if (IS_R8A7791_ES2())
  1203. writel(0x00000000, &axi_qos->qosconf);
  1204. else
  1205. writel(0x00000000, &axi_qos->qosconf);
  1206. writel(0x00002063, &axi_qos->qosctset0);
  1207. writel(0x00000001, &axi_qos->qosreqctr);
  1208. writel(0x00002064, &axi_qos->qosthres0);
  1209. writel(0x00002004, &axi_qos->qosthres1);
  1210. writel(0x00000001, &axi_qos->qosthres2);
  1211. writel(0x00000001, &axi_qos->qosqon);
  1212. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
  1213. writel(0x00000001, &axi_qos->qosconf);
  1214. writel(0x00002073, &axi_qos->qosctset0);
  1215. writel(0x00000020, &axi_qos->qosreqctr);
  1216. writel(0x00002064, &axi_qos->qosthres0);
  1217. writel(0x00002004, &axi_qos->qosthres1);
  1218. writel(0x00000001, &axi_qos->qosthres2);
  1219. writel(0x00000001, &axi_qos->qosqon);
  1220. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
  1221. writel(0x00000001, &axi_qos->qosconf);
  1222. writel(0x00002073, &axi_qos->qosctset0);
  1223. writel(0x00000020, &axi_qos->qosreqctr);
  1224. if (IS_R8A7791_ES2()) {
  1225. writel(0x00000001, &axi_qos->qosthres0);
  1226. writel(0x00000001, &axi_qos->qosthres1);
  1227. } else {
  1228. writel(0x00002064, &axi_qos->qosthres0);
  1229. writel(0x00002004, &axi_qos->qosthres1);
  1230. }
  1231. writel(0x00000001, &axi_qos->qosthres2);
  1232. writel(0x00000001, &axi_qos->qosqon);
  1233. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
  1234. writel(0x00000001, &axi_qos->qosconf);
  1235. writel(0x00002073, &axi_qos->qosctset0);
  1236. writel(0x00000020, &axi_qos->qosreqctr);
  1237. writel(0x00002064, &axi_qos->qosthres0);
  1238. writel(0x00002004, &axi_qos->qosthres1);
  1239. writel(0x00000001, &axi_qos->qosthres2);
  1240. writel(0x00000001, &axi_qos->qosqon);
  1241. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
  1242. writel(0x00000001, &axi_qos->qosconf);
  1243. writel(0x00002073, &axi_qos->qosctset0);
  1244. writel(0x00000020, &axi_qos->qosreqctr);
  1245. if (IS_R8A7791_ES2()) {
  1246. writel(0x00000001, &axi_qos->qosthres0);
  1247. writel(0x00000001, &axi_qos->qosthres1);
  1248. } else {
  1249. writel(0x00002064, &axi_qos->qosthres0);
  1250. writel(0x00002004, &axi_qos->qosthres1);
  1251. }
  1252. writel(0x00000001, &axi_qos->qosthres2);
  1253. writel(0x00000001, &axi_qos->qosqon);
  1254. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
  1255. writel(0x00000001, &axi_qos->qosconf);
  1256. writel(0x00002073, &axi_qos->qosctset0);
  1257. writel(0x00000020, &axi_qos->qosreqctr);
  1258. writel(0x00002064, &axi_qos->qosthres0);
  1259. writel(0x00002004, &axi_qos->qosthres1);
  1260. writel(0x00000001, &axi_qos->qosthres2);
  1261. writel(0x00000001, &axi_qos->qosqon);
  1262. }
  1263. #else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
  1264. void qos_init(void)
  1265. {
  1266. }
  1267. #endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */