meerkat96.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019 Linaro Ltd.
  4. * Copyright (C) 2016 NXP Semiconductors
  5. */
  6. #include <init.h>
  7. #include <asm/arch/clock.h>
  8. #include <asm/arch/imx-regs.h>
  9. #include <asm/arch/mx7-pins.h>
  10. #include <asm/arch/sys_proto.h>
  11. #include <asm/mach-imx/iomux-v3.h>
  12. #include <asm/io.h>
  13. #include <common.h>
  14. #include <linux/sizes.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \
  17. PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
  18. static iomux_v3_cfg_t const meerkat96_pads[] = {
  19. /* UART6 as debug serial */
  20. MX7D_PAD_SD1_CD_B__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  21. MX7D_PAD_SD1_WP__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  22. /* WDOG1 for reset */
  23. MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
  24. };
  25. int dram_init(void)
  26. {
  27. gd->ram_size = PHYS_SDRAM_SIZE;
  28. return 0;
  29. }
  30. int board_early_init_f(void)
  31. {
  32. imx_iomux_v3_setup_multiple_pads(meerkat96_pads,
  33. ARRAY_SIZE(meerkat96_pads));
  34. return 0;
  35. }
  36. int board_init(void)
  37. {
  38. /* address of boot parameters */
  39. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  40. return 0;
  41. }
  42. int checkboard(void)
  43. {
  44. char *mode;
  45. if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
  46. mode = "secure";
  47. else
  48. mode = "non-secure";
  49. printf("Board: i.MX7D Meerkat96 in %s mode\n", mode);
  50. return 0;
  51. }
  52. int board_late_init(void)
  53. {
  54. set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR);
  55. return 0;
  56. }