cougarcanyon2.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <init.h>
  9. #include <pci.h>
  10. #include <smsc_sio1007.h>
  11. #include <asm/ibmpc.h>
  12. #include <asm/lpc_common.h>
  13. #include <asm/pci.h>
  14. #include <asm/arch/pch.h>
  15. #define SIO1007_RUNTIME_IOPORT 0x180
  16. int board_early_init_f(void)
  17. {
  18. struct udevice *pch;
  19. int ret;
  20. ret = uclass_first_device(UCLASS_PCH, &pch);
  21. if (ret)
  22. return ret;
  23. if (!pch)
  24. return -ENODEV;
  25. /* Initialize LPC interface to turn on superio chipset decode range */
  26. dm_pci_write_config16(pch, LPC_IO_DEC, COMA_DEC_RANGE | COMB_DEC_RANGE);
  27. dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | COMA_LPC_EN);
  28. dm_pci_write_config32(pch, LPC_GEN1_DEC, GEN_DEC_RANGE_256B |
  29. (SIO1007_IOPORT3 & 0xff00) | GEN_DEC_RANGE_EN);
  30. dm_pci_write_config32(pch, LPC_GEN2_DEC, GEN_DEC_RANGE_16B |
  31. SIO1007_RUNTIME_IOPORT | GEN_DEC_RANGE_EN);
  32. /* Enable legacy serial port at 0x3f8 */
  33. sio1007_enable_serial(SIO1007_IOPORT3, 0, UART0_BASE, UART0_IRQ);
  34. /* Enable SIO1007 runtime I/O port at 0x180 */
  35. sio1007_enable_runtime(SIO1007_IOPORT3, SIO1007_RUNTIME_IOPORT);
  36. /*
  37. * On Cougar Canyon 2 board, the RS232 transiver connected to serial
  38. * port 0 (0x3f8) is controlled by a GPIO pin (GPIO10) on the SIO1007.
  39. * Set the pin value to 1 to enable the RS232 transiver.
  40. */
  41. sio1007_gpio_config(SIO1007_IOPORT3, 0, GPIO_DIR_OUTPUT,
  42. GPIO_POL_NO_INVERT, GPIO_TYPE_PUSH_PULL);
  43. sio1007_gpio_set_value(SIO1007_RUNTIME_IOPORT, 0, 1);
  44. return 0;
  45. }