ls1043aqds_qixis.h 900 B

1234567891011121314151617181920212223242526272829303132333435363738
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2015 Freescale Semiconductor, Inc.
  4. */
  5. #ifndef __LS1043AQDS_QIXIS_H__
  6. #define __LS1043AQDS_QIXIS_H__
  7. /* Definitions of QIXIS Registers for LS1043AQDS */
  8. /* BRDCFG4[4:7] select EC1 and EC2 as a pair */
  9. #define BRDCFG4_EMISEL_MASK 0xe0
  10. #define BRDCFG4_EMISEL_SHIFT 5
  11. /* SYSCLK */
  12. #define QIXIS_SYSCLK_66 0x0
  13. #define QIXIS_SYSCLK_83 0x1
  14. #define QIXIS_SYSCLK_100 0x2
  15. #define QIXIS_SYSCLK_125 0x3
  16. #define QIXIS_SYSCLK_133 0x4
  17. #define QIXIS_SYSCLK_150 0x5
  18. #define QIXIS_SYSCLK_160 0x6
  19. #define QIXIS_SYSCLK_166 0x7
  20. #define QIXIS_SYSCLK_64 0x8
  21. /* DDRCLK */
  22. #define QIXIS_DDRCLK_66 0x0
  23. #define QIXIS_DDRCLK_100 0x1
  24. #define QIXIS_DDRCLK_125 0x2
  25. #define QIXIS_DDRCLK_133 0x3
  26. /* BRDCFG2 - SD clock*/
  27. #define QIXIS_SDCLK1_100 0x0
  28. #define QIXIS_SDCLK1_125 0x1
  29. #define QIXIS_SDCLK1_165 0x2
  30. #define QIXIS_SDCLK1_100_SP 0x3
  31. #endif