ls1012afrdm.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017-2018 NXP
  4. */
  5. #include <common.h>
  6. #include <fdt_support.h>
  7. #include <i2c.h>
  8. #include <asm/cache.h>
  9. #include <init.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/clock.h>
  12. #include <asm/arch/fsl_serdes.h>
  13. #ifdef CONFIG_FSL_LS_PPA
  14. #include <asm/arch/ppa.h>
  15. #endif
  16. #include <asm/arch/mmu.h>
  17. #include <asm/arch/soc.h>
  18. #include <fsl_esdhc.h>
  19. #include <hwconfig.h>
  20. #include <env_internal.h>
  21. #include <fsl_mmdc.h>
  22. #include <netdev.h>
  23. #include <fsl_sec.h>
  24. DECLARE_GLOBAL_DATA_PTR;
  25. static inline int get_board_version(void)
  26. {
  27. uint32_t val;
  28. #ifdef CONFIG_TARGET_LS1012AFRDM
  29. val = 0;
  30. #else
  31. struct ccsr_gpio *pgpio = (void *)(GPIO2_BASE_ADDR);
  32. val = in_be32(&pgpio->gpdat) & BOARD_REV_MASK;/*Get GPIO2 11,12,14*/
  33. #endif
  34. return val;
  35. }
  36. int checkboard(void)
  37. {
  38. #ifdef CONFIG_TARGET_LS1012AFRDM
  39. puts("Board: LS1012AFRDM ");
  40. #else
  41. int rev;
  42. rev = get_board_version();
  43. puts("Board: FRWY-LS1012A ");
  44. puts("Version");
  45. switch (rev) {
  46. case BOARD_REV_A_B:
  47. puts(": RevA/B ");
  48. break;
  49. case BOARD_REV_C:
  50. puts(": RevC ");
  51. break;
  52. default:
  53. puts(": unknown");
  54. break;
  55. }
  56. #endif
  57. return 0;
  58. }
  59. #ifdef CONFIG_TARGET_LS1012AFRWY
  60. int esdhc_status_fixup(void *blob, const char *compat)
  61. {
  62. char esdhc0_path[] = "/soc/esdhc@1560000";
  63. char esdhc1_path[] = "/soc/esdhc@1580000";
  64. do_fixup_by_path(blob, esdhc0_path, "status", "okay",
  65. sizeof("okay"), 1);
  66. do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
  67. sizeof("disabled"), 1);
  68. return 0;
  69. }
  70. #endif
  71. #ifdef CONFIG_TFABOOT
  72. int dram_init(void)
  73. {
  74. #ifdef CONFIG_TARGET_LS1012AFRWY
  75. int board_rev;
  76. #endif
  77. gd->ram_size = tfa_get_dram_size();
  78. if (!gd->ram_size) {
  79. #ifdef CONFIG_TARGET_LS1012AFRWY
  80. board_rev = get_board_version();
  81. if (board_rev & BOARD_REV_C)
  82. gd->ram_size = SYS_SDRAM_SIZE_1024;
  83. else
  84. gd->ram_size = SYS_SDRAM_SIZE_512;
  85. #else
  86. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  87. #endif
  88. }
  89. return 0;
  90. }
  91. #else
  92. int dram_init(void)
  93. {
  94. #ifdef CONFIG_TARGET_LS1012AFRWY
  95. int board_rev;
  96. #endif
  97. struct fsl_mmdc_info mparam = {
  98. 0x04180000, /* mdctl */
  99. 0x00030035, /* mdpdc */
  100. 0x12554000, /* mdotc */
  101. 0xbabf7954, /* mdcfg0 */
  102. 0xdb328f64, /* mdcfg1 */
  103. 0x01ff00db, /* mdcfg2 */
  104. 0x00001680, /* mdmisc */
  105. 0x0f3c8000, /* mdref */
  106. 0x00002000, /* mdrwd */
  107. 0x00bf1023, /* mdor */
  108. 0x0000003f, /* mdasp */
  109. 0x0000022a, /* mpodtctrl */
  110. 0xa1390003, /* mpzqhwctrl */
  111. };
  112. #ifdef CONFIG_TARGET_LS1012AFRWY
  113. board_rev = get_board_version();
  114. if (board_rev == BOARD_REV_C) {
  115. mparam.mdctl = 0x05180000;
  116. gd->ram_size = SYS_SDRAM_SIZE_1024;
  117. } else {
  118. gd->ram_size = SYS_SDRAM_SIZE_512;
  119. }
  120. #else
  121. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  122. #endif
  123. mmdc_init(&mparam);
  124. #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
  125. /* This will break-before-make MMU for DDR */
  126. update_early_mmu_table();
  127. #endif
  128. return 0;
  129. }
  130. #endif
  131. int board_early_init_f(void)
  132. {
  133. fsl_lsch2_early_init_f();
  134. return 0;
  135. }
  136. int board_init(void)
  137. {
  138. struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
  139. CONFIG_SYS_CCI400_OFFSET);
  140. /*
  141. * Set CCI-400 control override register to enable barrier
  142. * transaction
  143. */
  144. if (current_el() == 3)
  145. out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
  146. #ifdef CONFIG_ENV_IS_NOWHERE
  147. gd->env_addr = (ulong)&default_environment[0];
  148. #endif
  149. #ifdef CONFIG_FSL_CAAM
  150. sec_init();
  151. #endif
  152. #ifdef CONFIG_FSL_LS_PPA
  153. ppa_init();
  154. #endif
  155. return 0;
  156. }
  157. int ft_board_setup(void *blob, struct bd_info *bd)
  158. {
  159. arch_fixup_fdt(blob);
  160. ft_cpu_setup(blob, bd);
  161. return 0;
  162. }