mpc85xx_sleep.c 1.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <log.h>
  7. #include <asm/immap_85xx.h>
  8. #include "sleep.h"
  9. #ifdef CONFIG_U_QE
  10. #include <fsl_qe.h>
  11. #endif
  12. DECLARE_GLOBAL_DATA_PTR;
  13. void __weak board_mem_sleep_setup(void)
  14. {
  15. }
  16. void __weak board_sleep_prepare(void)
  17. {
  18. }
  19. bool is_warm_boot(void)
  20. {
  21. struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  22. if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
  23. return 1;
  24. return 0;
  25. }
  26. void fsl_dp_disable_console(void)
  27. {
  28. gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
  29. }
  30. /*
  31. * When wakeup from deep sleep, the first 128 bytes space
  32. * will be used to do DDR training which corrupts the data
  33. * in there. This function will restore them.
  34. */
  35. static void dp_ddr_restore(void)
  36. {
  37. u64 *src, *dst;
  38. int i;
  39. struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
  40. /* get the address of ddr date from SPARECR3 */
  41. src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
  42. dst = (u64 *)(CONFIG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
  43. for (i = 0; i < DDR_BUFF_LEN / 8; i++)
  44. *dst-- = *src--;
  45. flush_dcache();
  46. }
  47. static void dp_resume_prepare(void)
  48. {
  49. dp_ddr_restore();
  50. board_sleep_prepare();
  51. l2cache_init();
  52. #if defined(CONFIG_RAMBOOT_PBL)
  53. disable_cpc_sram();
  54. #endif
  55. enable_cpc();
  56. #ifdef CONFIG_U_QE
  57. u_qe_resume();
  58. #endif
  59. }
  60. int fsl_dp_resume(void)
  61. {
  62. u32 start_addr;
  63. void (*kernel_resume)(void);
  64. struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
  65. if (!is_warm_boot())
  66. return 0;
  67. dp_resume_prepare();
  68. /* Get the entry address and jump to kernel */
  69. start_addr = in_be32(&scfg->sparecr[1]);
  70. debug("Entry address is 0x%08x\n", start_addr);
  71. kernel_resume = (void (*)(void))start_addr;
  72. kernel_resume();
  73. return 0;
  74. }