sbx81lifxcat.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010, 2018
  4. * Allied Telesis <www.alliedtelesis.com>
  5. */
  6. #include <common.h>
  7. #include <init.h>
  8. #include <miiphy.h>
  9. #include <net.h>
  10. #include <netdev.h>
  11. #include <led.h>
  12. #include <linux/bitops.h>
  13. #include <linux/io.h>
  14. #include <asm/arch/cpu.h>
  15. #include <asm/arch/soc.h>
  16. #include <asm/arch/mpp.h>
  17. #include <asm/arch/gpio.h>
  18. #define SBX81LIFXCAT_OE_LOW (~0)
  19. #define SBX81LIFXCAT_OE_HIGH (~BIT(11))
  20. #define SBX81LIFXCAT_OE_VAL_LOW (0)
  21. #define SBX81LIFXCAT_OE_VAL_HIGH (BIT(11))
  22. DECLARE_GLOBAL_DATA_PTR;
  23. int board_early_init_f(void)
  24. {
  25. /*
  26. * default gpio configuration
  27. * There are maximum 64 gpios controlled through 2 sets of registers
  28. * the below configuration configures mainly initial LED status
  29. */
  30. mvebu_config_gpio(SBX81LIFXCAT_OE_VAL_LOW,
  31. SBX81LIFXCAT_OE_VAL_HIGH,
  32. SBX81LIFXCAT_OE_LOW, SBX81LIFXCAT_OE_HIGH);
  33. /* Multi-Purpose Pins Functionality configuration */
  34. static const u32 kwmpp_config[] = {
  35. MPP0_SPI_SCn,
  36. MPP1_SPI_MOSI,
  37. MPP2_SPI_SCK,
  38. MPP3_SPI_MISO,
  39. MPP4_NF_IO6,
  40. MPP5_NF_IO7,
  41. MPP6_SYSRST_OUTn,
  42. MPP7_GPO,
  43. MPP8_TW_SDA,
  44. MPP9_TW_SCK,
  45. MPP10_UART0_TXD,
  46. MPP11_UART0_RXD,
  47. MPP12_GPO,
  48. MPP13_UART1_TXD,
  49. MPP14_UART1_RXD,
  50. MPP15_GPIO,
  51. MPP16_GPIO,
  52. MPP17_GPIO,
  53. MPP18_NF_IO0,
  54. MPP19_NF_IO1,
  55. MPP20_GE1_0,
  56. MPP21_GE1_1,
  57. MPP22_GE1_2,
  58. MPP23_GE1_3,
  59. MPP24_GE1_4,
  60. MPP25_GE1_5,
  61. MPP26_GE1_6,
  62. MPP27_GE1_7,
  63. MPP28_GE1_8,
  64. MPP29_GE1_9,
  65. MPP30_GE1_10,
  66. MPP31_GE1_11,
  67. MPP32_GE1_12,
  68. MPP33_GE1_13,
  69. MPP34_GPIO,
  70. MPP35_GPIO,
  71. MPP36_GPIO,
  72. MPP37_GPIO,
  73. MPP38_GPIO,
  74. MPP39_GPIO,
  75. MPP40_GPIO,
  76. MPP41_GPIO,
  77. MPP42_GPIO,
  78. MPP43_GPIO,
  79. MPP44_GPIO,
  80. MPP45_GPIO,
  81. MPP46_GPIO,
  82. MPP47_GPIO,
  83. MPP48_GPIO,
  84. MPP49_GPIO,
  85. 0
  86. };
  87. kirkwood_mpp_conf(kwmpp_config, NULL);
  88. return 0;
  89. }
  90. int board_init(void)
  91. {
  92. /* address of boot parameters */
  93. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  94. return 0;
  95. }
  96. #ifdef CONFIG_RESET_PHY_R
  97. /* automatically defined by kirkwood config.h */
  98. void reset_phy(void)
  99. {
  100. }
  101. #endif
  102. #ifdef CONFIG_MV88E61XX_SWITCH
  103. int mv88e61xx_hw_reset(struct phy_device *phydev)
  104. {
  105. phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  106. return 0;
  107. }
  108. #endif
  109. #ifdef CONFIG_MISC_INIT_R
  110. int misc_init_r(void)
  111. {
  112. struct udevice *dev;
  113. int ret;
  114. ret = led_get_by_label("status:ledp", &dev);
  115. if (!ret)
  116. led_set_state(dev, LEDST_ON);
  117. ret = led_get_by_label("status:ledn", &dev);
  118. if (!ret)
  119. led_set_state(dev, LEDST_OFF);
  120. return 0;
  121. }
  122. #endif