pinebook-pro-rk3399.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  4. * (C) Copyright 2020 Peter Robinson <pbrobinson at gmail.com>
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <syscon.h>
  9. #include <asm/io.h>
  10. #include <asm/arch-rockchip/clock.h>
  11. #include <asm/arch-rockchip/grf_rk3399.h>
  12. #include <asm/arch-rockchip/hardware.h>
  13. #include <asm/arch-rockchip/misc.h>
  14. #include <power/regulator.h>
  15. #define GRF_IO_VSEL_BT565_SHIFT 0
  16. #define PMUGRF_CON0_VSEL_SHIFT 8
  17. #ifndef CONFIG_SPL_BUILD
  18. int board_early_init_f(void)
  19. {
  20. struct udevice *regulator;
  21. int ret;
  22. ret = regulator_get_by_platname("vcc5v0_usb", &regulator);
  23. if (ret) {
  24. pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
  25. goto out;
  26. }
  27. ret = regulator_set_enable(regulator, true);
  28. if (ret)
  29. pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret);
  30. out:
  31. return 0;
  32. }
  33. #endif
  34. #ifdef CONFIG_MISC_INIT_R
  35. static void setup_iodomain(void)
  36. {
  37. struct rk3399_grf_regs *grf =
  38. syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  39. struct rk3399_pmugrf_regs *pmugrf =
  40. syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
  41. /* BT565 is in 1.8v domain */
  42. rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
  43. /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
  44. rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
  45. }
  46. int misc_init_r(void)
  47. {
  48. const u32 cpuid_offset = 0x7;
  49. const u32 cpuid_length = 0x10;
  50. u8 cpuid[cpuid_length];
  51. int ret;
  52. setup_iodomain();
  53. ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
  54. if (ret)
  55. return ret;
  56. ret = rockchip_cpuid_set(cpuid, cpuid_length);
  57. if (ret)
  58. return ret;
  59. return ret;
  60. }
  61. #endif