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- // SPDX-License-Identifier: GPL-2.0+
- /*
- * Copyright 2018 NXP
- */
- #include <common.h>
- #include <env.h>
- #include <malloc.h>
- #include <errno.h>
- #include <asm/io.h>
- #include <miiphy.h>
- #include <netdev.h>
- #include <asm/mach-imx/iomux-v3.h>
- #include <asm-generic/gpio.h>
- #include <fsl_esdhc_imx.h>
- #include <mmc.h>
- #include <asm/arch/imx8mq_pins.h>
- #include <asm/arch/sys_proto.h>
- #include <asm/mach-imx/gpio.h>
- #include <asm/mach-imx/mxc_i2c.h>
- #include <asm/arch/clock.h>
- #include <spl.h>
- #include <power/pmic.h>
- #include <power/pfuze100_pmic.h>
- #include "../common/pfuze.h"
- DECLARE_GLOBAL_DATA_PTR;
- #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
- #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
- static iomux_v3_cfg_t const wdog_pads[] = {
- IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
- };
- static iomux_v3_cfg_t const uart_pads[] = {
- IMX8MQ_PAD_UART1_RXD__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MQ_PAD_UART1_TXD__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
- };
- int board_early_init_f(void)
- {
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
- imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
- set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
- return 0;
- }
- int dram_init(void)
- {
- /* rom_pointer[1] contains the size of TEE occupies */
- if (rom_pointer[1])
- gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
- else
- gd->ram_size = PHYS_SDRAM_SIZE;
- return 0;
- }
- #ifdef CONFIG_FEC_MXC
- #define FEC_RST_PAD IMX_GPIO_NR(1, 9)
- static iomux_v3_cfg_t const fec1_rst_pads[] = {
- IMX8MQ_PAD_GPIO1_IO09__GPIO1_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL),
- };
- static void setup_iomux_fec(void)
- {
- imx_iomux_v3_setup_multiple_pads(fec1_rst_pads,
- ARRAY_SIZE(fec1_rst_pads));
- gpio_request(IMX_GPIO_NR(1, 9), "fec1_rst");
- gpio_direction_output(IMX_GPIO_NR(1, 9), 0);
- udelay(500);
- gpio_direction_output(IMX_GPIO_NR(1, 9), 1);
- }
- static int setup_fec(void)
- {
- struct iomuxc_gpr_base_regs *gpr =
- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
- setup_iomux_fec();
- /* Use 125M anatop REF_CLK1 for ENET1, not from external */
- clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0);
- return set_clk_enet(ENET_125MHZ);
- }
- int board_phy_config(struct phy_device *phydev)
- {
- /* enable rgmii rxc skew and phy mode select to RGMII copper */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
- if (phydev->drv->config)
- phydev->drv->config(phydev);
- return 0;
- }
- #endif
- int board_init(void)
- {
- #ifdef CONFIG_FEC_MXC
- setup_fec();
- #endif
- return 0;
- }
- int board_mmc_get_env_dev(int devno)
- {
- return devno;
- }
- int board_late_init(void)
- {
- #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- env_set("board_name", "EVK");
- env_set("board_rev", "iMX8MQ");
- #endif
- return 0;
- }
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