spr_misc.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <command.h>
  8. #include <env.h>
  9. #include <environment.h>
  10. #include <i2c.h>
  11. #include <net.h>
  12. #include <linux/mtd/st_smi.h>
  13. #include <asm/io.h>
  14. #include <asm/arch/hardware.h>
  15. #include <asm/arch/spr_emi.h>
  16. #include <asm/arch/spr_defs.h>
  17. #define CPU 0
  18. #define DDR 1
  19. #define SRAM_REL 0xD2801000
  20. DECLARE_GLOBAL_DATA_PTR;
  21. #if defined(CONFIG_CMD_NET)
  22. static int i2c_read_mac(uchar *buffer);
  23. #endif
  24. int dram_init(void)
  25. {
  26. /* Store complete RAM size and return */
  27. gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE);
  28. return 0;
  29. }
  30. int dram_init_banksize(void)
  31. {
  32. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  33. gd->bd->bi_dram[0].size = gd->ram_size;
  34. return 0;
  35. }
  36. int board_early_init_f()
  37. {
  38. #if defined(CONFIG_ST_SMI)
  39. smi_init();
  40. #endif
  41. return 0;
  42. }
  43. int misc_init_r(void)
  44. {
  45. #if defined(CONFIG_CMD_NET)
  46. uchar mac_id[6];
  47. if (!eth_env_get_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
  48. eth_env_set_enetaddr("ethaddr", mac_id);
  49. #endif
  50. env_set("verify", "n");
  51. #if defined(CONFIG_SPEAR_USBTTY)
  52. env_set("stdin", "usbtty");
  53. env_set("stdout", "usbtty");
  54. env_set("stderr", "usbtty");
  55. #ifndef CONFIG_SYS_NO_DCACHE
  56. dcache_enable();
  57. #endif
  58. #endif
  59. return 0;
  60. }
  61. #ifdef CONFIG_SPEAR_EMI
  62. struct cust_emi_para {
  63. unsigned int tap;
  64. unsigned int tsdp;
  65. unsigned int tdpw;
  66. unsigned int tdpr;
  67. unsigned int tdcs;
  68. };
  69. /* EMI timing setting of m28w640hc of linux kernel */
  70. const struct cust_emi_para emi_timing_m28w640hc = {
  71. .tap = 0x10,
  72. .tsdp = 0x05,
  73. .tdpw = 0x0a,
  74. .tdpr = 0x0a,
  75. .tdcs = 0x05,
  76. };
  77. /* EMI timing setting of bootrom */
  78. const struct cust_emi_para emi_timing_bootrom = {
  79. .tap = 0xf,
  80. .tsdp = 0x0,
  81. .tdpw = 0xff,
  82. .tdpr = 0x111,
  83. .tdcs = 0x02,
  84. };
  85. void spear_emi_init(void)
  86. {
  87. const struct cust_emi_para *p = &emi_timing_m28w640hc;
  88. struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
  89. unsigned int cs;
  90. unsigned int val, tmp;
  91. val = readl(CONFIG_SPEAR_RASBASE);
  92. if (val & EMI_ACKMSK)
  93. tmp = 0x3f;
  94. else
  95. tmp = 0x0;
  96. writel(tmp, &emi_regs_p->ack);
  97. for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
  98. writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
  99. writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
  100. writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
  101. writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
  102. writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
  103. writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
  104. &emi_regs_p->bank_regs[cs].control);
  105. }
  106. }
  107. #endif
  108. int spear_board_init(ulong mach_type)
  109. {
  110. gd->bd->bi_arch_number = mach_type;
  111. /* adress of boot parameters */
  112. gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
  113. #ifdef CONFIG_SPEAR_EMI
  114. spear_emi_init();
  115. #endif
  116. return 0;
  117. }
  118. #if defined(CONFIG_CMD_NET)
  119. static int i2c_read_mac(uchar *buffer)
  120. {
  121. u8 buf[2];
  122. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  123. /* Check if mac in i2c memory is valid */
  124. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  125. /* Valid mac address is saved in i2c eeprom */
  126. i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
  127. return 0;
  128. }
  129. return -1;
  130. }
  131. static int write_mac(uchar *mac)
  132. {
  133. u8 buf[2];
  134. buf[0] = (u8)MAGIC_BYTE0;
  135. buf[1] = (u8)MAGIC_BYTE1;
  136. i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  137. buf[0] = (u8)~MAGIC_BYTE0;
  138. buf[1] = (u8)~MAGIC_BYTE1;
  139. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  140. /* check if valid MAC address is saved in I2C EEPROM or not? */
  141. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  142. i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
  143. puts("I2C EEPROM written with mac address \n");
  144. return 0;
  145. }
  146. puts("I2C EEPROM writing failed\n");
  147. return -1;
  148. }
  149. #endif
  150. int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  151. {
  152. void (*sram_setfreq) (unsigned int, unsigned int);
  153. unsigned int frequency;
  154. #if defined(CONFIG_CMD_NET)
  155. unsigned char mac[6];
  156. #endif
  157. if ((argc > 3) || (argc < 2))
  158. return cmd_usage(cmdtp);
  159. if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
  160. frequency = simple_strtoul(argv[2], NULL, 0);
  161. if (frequency > 333) {
  162. printf("Frequency is limited to 333MHz\n");
  163. return 1;
  164. }
  165. sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
  166. if (!strcmp(argv[1], "cpufreq")) {
  167. sram_setfreq(CPU, frequency);
  168. printf("CPU frequency changed to %u\n", frequency);
  169. } else {
  170. sram_setfreq(DDR, frequency);
  171. printf("DDR frequency changed to %u\n", frequency);
  172. }
  173. return 0;
  174. #if defined(CONFIG_CMD_NET)
  175. } else if (!strcmp(argv[1], "ethaddr")) {
  176. u32 reg;
  177. char *e, *s = argv[2];
  178. for (reg = 0; reg < 6; ++reg) {
  179. mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
  180. if (s)
  181. s = (*e) ? e + 1 : e;
  182. }
  183. write_mac(mac);
  184. return 0;
  185. #endif
  186. } else if (!strcmp(argv[1], "print")) {
  187. #if defined(CONFIG_CMD_NET)
  188. if (!i2c_read_mac(mac)) {
  189. printf("Ethaddr (from i2c mem) = %pM\n", mac);
  190. } else {
  191. printf("Ethaddr (from i2c mem) = Not set\n");
  192. }
  193. #endif
  194. return 0;
  195. }
  196. return cmd_usage(cmdtp);
  197. }
  198. U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
  199. "configure chip",
  200. "chip_config cpufreq/ddrfreq frequency\n"
  201. #if defined(CONFIG_CMD_NET)
  202. "chip_config ethaddr XX:XX:XX:XX:XX:XX\n"
  203. #endif
  204. "chip_config print");