test.dts 20 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. / {
  5. model = "sandbox";
  6. compatible = "sandbox";
  7. #address-cells = <1>;
  8. #size-cells = <1>;
  9. aliases {
  10. console = &uart0;
  11. eth0 = "/eth@10002000";
  12. eth3 = &eth_3;
  13. eth5 = &eth_5;
  14. gpio1 = &gpio_a;
  15. gpio2 = &gpio_b;
  16. gpio3 = &gpio_c;
  17. i2c0 = "/i2c@0";
  18. mmc0 = "/mmc0";
  19. mmc1 = "/mmc1";
  20. pci0 = &pci0;
  21. pci1 = &pci1;
  22. pci2 = &pci2;
  23. remoteproc0 = &rproc_1;
  24. remoteproc1 = &rproc_2;
  25. rtc0 = &rtc_0;
  26. rtc1 = &rtc_1;
  27. spi0 = "/spi@0";
  28. testfdt6 = "/e-test";
  29. testbus3 = "/some-bus";
  30. testfdt0 = "/some-bus/c-test@0";
  31. testfdt1 = "/some-bus/c-test@1";
  32. testfdt3 = "/b-test";
  33. testfdt5 = "/some-bus/c-test@5";
  34. testfdt8 = "/a-test";
  35. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  36. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  37. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  38. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  39. usb0 = &usb_0;
  40. usb1 = &usb_1;
  41. usb2 = &usb_2;
  42. axi0 = &axi;
  43. osd0 = "/osd";
  44. };
  45. audio: audio-codec {
  46. compatible = "sandbox,audio-codec";
  47. #sound-dai-cells = <1>;
  48. };
  49. buttons {
  50. compatible = "gpio-keys";
  51. summer {
  52. gpios = <&gpio_a 3 0>;
  53. label = "summer";
  54. };
  55. christmas {
  56. gpios = <&gpio_a 4 0>;
  57. label = "christmas";
  58. };
  59. };
  60. cros_ec: cros-ec {
  61. reg = <0 0>;
  62. compatible = "google,cros-ec-sandbox";
  63. /*
  64. * This describes the flash memory within the EC. Note
  65. * that the STM32L flash erases to 0, not 0xff.
  66. */
  67. flash {
  68. image-pos = <0x08000000>;
  69. size = <0x20000>;
  70. erase-value = <0>;
  71. /* Information for sandbox */
  72. ro {
  73. image-pos = <0>;
  74. size = <0xf000>;
  75. };
  76. wp-ro {
  77. image-pos = <0xf000>;
  78. size = <0x1000>;
  79. };
  80. rw {
  81. image-pos = <0x10000>;
  82. size = <0x10000>;
  83. };
  84. };
  85. };
  86. dsi_host: dsi_host {
  87. compatible = "sandbox,dsi-host";
  88. };
  89. a-test {
  90. reg = <0 1>;
  91. compatible = "denx,u-boot-fdt-test";
  92. ping-expect = <0>;
  93. ping-add = <0>;
  94. u-boot,dm-pre-reloc;
  95. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  96. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  97. <0>, <&gpio_a 12>;
  98. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  99. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  100. <&gpio_b 7 GPIO_IN 3 2 1>,
  101. <&gpio_b 8 GPIO_OUT 3 2 1>,
  102. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  103. test3-gpios =
  104. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  105. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  106. <&gpio_c 2 GPIO_OUT>,
  107. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  108. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  109. <&gpio_c 5 GPIO_IN>,
  110. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  111. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  112. int-value = <1234>;
  113. uint-value = <(-1234)>;
  114. int64-value = /bits/ 64 <0x1111222233334444>;
  115. int-array = <5678 9123 4567>;
  116. str-value = "test string";
  117. interrupts-extended = <&irq 3 0>;
  118. acpi,name = "GHIJ";
  119. };
  120. junk {
  121. reg = <1 1>;
  122. compatible = "not,compatible";
  123. };
  124. no-compatible {
  125. reg = <2 1>;
  126. };
  127. backlight: backlight {
  128. compatible = "pwm-backlight";
  129. enable-gpios = <&gpio_a 1>;
  130. power-supply = <&ldo_1>;
  131. pwms = <&pwm 0 1000>;
  132. default-brightness-level = <5>;
  133. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  134. };
  135. bind-test {
  136. compatible = "simple-bus";
  137. bind-test-child1 {
  138. compatible = "sandbox,phy";
  139. #phy-cells = <1>;
  140. };
  141. bind-test-child2 {
  142. compatible = "simple-bus";
  143. };
  144. };
  145. b-test {
  146. reg = <3 1>;
  147. compatible = "denx,u-boot-fdt-test";
  148. ping-expect = <3>;
  149. ping-add = <3>;
  150. };
  151. phy_provider0: gen_phy@0 {
  152. compatible = "sandbox,phy";
  153. #phy-cells = <1>;
  154. };
  155. phy_provider1: gen_phy@1 {
  156. compatible = "sandbox,phy";
  157. #phy-cells = <0>;
  158. broken;
  159. };
  160. phy_provider2: gen_phy@2 {
  161. compatible = "sandbox,phy";
  162. #phy-cells = <0>;
  163. };
  164. gen_phy_user: gen_phy_user {
  165. compatible = "simple-bus";
  166. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  167. phy-names = "phy1", "phy2", "phy3";
  168. };
  169. gen_phy_user1: gen_phy_user1 {
  170. compatible = "simple-bus";
  171. phys = <&phy_provider0 0>, <&phy_provider2>;
  172. phy-names = "phy1", "phy2";
  173. };
  174. some-bus {
  175. #address-cells = <1>;
  176. #size-cells = <0>;
  177. compatible = "denx,u-boot-test-bus";
  178. reg = <3 1>;
  179. ping-expect = <4>;
  180. ping-add = <4>;
  181. c-test@5 {
  182. compatible = "denx,u-boot-fdt-test";
  183. reg = <5>;
  184. ping-expect = <5>;
  185. ping-add = <5>;
  186. };
  187. c-test@0 {
  188. compatible = "denx,u-boot-fdt-test";
  189. reg = <0>;
  190. ping-expect = <6>;
  191. ping-add = <6>;
  192. };
  193. c-test@1 {
  194. compatible = "denx,u-boot-fdt-test";
  195. reg = <1>;
  196. ping-expect = <7>;
  197. ping-add = <7>;
  198. };
  199. };
  200. d-test {
  201. reg = <3 1>;
  202. ping-expect = <6>;
  203. ping-add = <6>;
  204. compatible = "google,another-fdt-test";
  205. };
  206. e-test {
  207. reg = <3 1>;
  208. ping-expect = <6>;
  209. ping-add = <6>;
  210. compatible = "google,another-fdt-test";
  211. };
  212. f-test {
  213. compatible = "denx,u-boot-fdt-test";
  214. };
  215. g-test {
  216. compatible = "denx,u-boot-fdt-test";
  217. };
  218. h-test {
  219. compatible = "denx,u-boot-fdt-test1";
  220. };
  221. i-test {
  222. compatible = "mediatek,u-boot-fdt-test";
  223. #address-cells = <1>;
  224. #size-cells = <0>;
  225. subnode@0 {
  226. reg = <0>;
  227. };
  228. subnode@1 {
  229. reg = <1>;
  230. };
  231. subnode@2 {
  232. reg = <2>;
  233. };
  234. };
  235. devres-test {
  236. compatible = "denx,u-boot-devres-test";
  237. };
  238. acpi_test1: acpi-test {
  239. compatible = "denx,u-boot-acpi-test";
  240. acpi-ssdt-test-data = "ab";
  241. acpi-dsdt-test-data = "hi";
  242. child {
  243. compatible = "denx,u-boot-acpi-test";
  244. };
  245. };
  246. acpi_test2: acpi-test2 {
  247. compatible = "denx,u-boot-acpi-test";
  248. acpi-ssdt-test-data = "cd";
  249. acpi-dsdt-test-data = "jk";
  250. };
  251. clocks {
  252. clk_fixed: clk-fixed {
  253. compatible = "fixed-clock";
  254. #clock-cells = <0>;
  255. clock-frequency = <1234>;
  256. };
  257. clk_fixed_factor: clk-fixed-factor {
  258. compatible = "fixed-factor-clock";
  259. #clock-cells = <0>;
  260. clock-div = <3>;
  261. clock-mult = <2>;
  262. clocks = <&clk_fixed>;
  263. };
  264. osc {
  265. compatible = "fixed-clock";
  266. #clock-cells = <0>;
  267. clock-frequency = <20000000>;
  268. };
  269. };
  270. clk_sandbox: clk-sbox {
  271. compatible = "sandbox,clk";
  272. #clock-cells = <1>;
  273. assigned-clocks = <&clk_sandbox 3>;
  274. assigned-clock-rates = <321>;
  275. };
  276. clk-test {
  277. compatible = "sandbox,clk-test";
  278. clocks = <&clk_fixed>,
  279. <&clk_sandbox 1>,
  280. <&clk_sandbox 0>,
  281. <&clk_sandbox 3>,
  282. <&clk_sandbox 2>;
  283. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  284. };
  285. ccf: clk-ccf {
  286. compatible = "sandbox,clk-ccf";
  287. };
  288. eth@10002000 {
  289. compatible = "sandbox,eth";
  290. reg = <0x10002000 0x1000>;
  291. fake-host-hwaddr = [00 00 66 44 22 00];
  292. };
  293. eth_5: eth@10003000 {
  294. compatible = "sandbox,eth";
  295. reg = <0x10003000 0x1000>;
  296. fake-host-hwaddr = [00 00 66 44 22 11];
  297. };
  298. eth_3: sbe5 {
  299. compatible = "sandbox,eth";
  300. reg = <0x10005000 0x1000>;
  301. fake-host-hwaddr = [00 00 66 44 22 33];
  302. };
  303. eth@10004000 {
  304. compatible = "sandbox,eth";
  305. reg = <0x10004000 0x1000>;
  306. fake-host-hwaddr = [00 00 66 44 22 22];
  307. };
  308. firmware {
  309. sandbox_firmware: sandbox-firmware {
  310. compatible = "sandbox,firmware";
  311. };
  312. };
  313. pinctrl-gpio {
  314. compatible = "sandbox,pinctrl-gpio";
  315. gpio_a: base-gpios {
  316. compatible = "sandbox,gpio";
  317. gpio-controller;
  318. #gpio-cells = <1>;
  319. gpio-bank-name = "a";
  320. sandbox,gpio-count = <20>;
  321. hog_input_active_low {
  322. gpio-hog;
  323. input;
  324. gpios = <10 GPIO_ACTIVE_LOW>;
  325. };
  326. hog_input_active_high {
  327. gpio-hog;
  328. input;
  329. gpios = <11 GPIO_ACTIVE_HIGH>;
  330. };
  331. hog_output_low {
  332. gpio-hog;
  333. output-low;
  334. gpios = <12 GPIO_ACTIVE_HIGH>;
  335. };
  336. hog_output_high {
  337. gpio-hog;
  338. output-high;
  339. gpios = <13 GPIO_ACTIVE_HIGH>;
  340. };
  341. };
  342. gpio_b: extra-gpios {
  343. compatible = "sandbox,gpio";
  344. gpio-controller;
  345. #gpio-cells = <5>;
  346. gpio-bank-name = "b";
  347. sandbox,gpio-count = <10>;
  348. };
  349. gpio_c: pinmux-gpios {
  350. compatible = "sandbox,gpio";
  351. gpio-controller;
  352. #gpio-cells = <2>;
  353. gpio-bank-name = "c";
  354. sandbox,gpio-count = <10>;
  355. };
  356. };
  357. i2c@0 {
  358. #address-cells = <1>;
  359. #size-cells = <0>;
  360. reg = <0 1>;
  361. compatible = "sandbox,i2c";
  362. clock-frequency = <100000>;
  363. eeprom@2c {
  364. reg = <0x2c>;
  365. compatible = "i2c-eeprom";
  366. sandbox,emul = <&emul_eeprom>;
  367. partitions {
  368. compatible = "fixed-partitions";
  369. #address-cells = <1>;
  370. #size-cells = <1>;
  371. bootcount_i2c: bootcount@10 {
  372. reg = <10 2>;
  373. };
  374. };
  375. };
  376. rtc_0: rtc@43 {
  377. reg = <0x43>;
  378. compatible = "sandbox-rtc";
  379. sandbox,emul = <&emul0>;
  380. };
  381. rtc_1: rtc@61 {
  382. reg = <0x61>;
  383. compatible = "sandbox-rtc";
  384. sandbox,emul = <&emul1>;
  385. };
  386. i2c_emul: emul {
  387. reg = <0xff>;
  388. compatible = "sandbox,i2c-emul-parent";
  389. emul_eeprom: emul-eeprom {
  390. compatible = "sandbox,i2c-eeprom";
  391. sandbox,filename = "i2c.bin";
  392. sandbox,size = <256>;
  393. };
  394. emul0: emul0 {
  395. compatible = "sandbox,i2c-rtc";
  396. };
  397. emul1: emull {
  398. compatible = "sandbox,i2c-rtc";
  399. };
  400. };
  401. sandbox_pmic: sandbox_pmic {
  402. reg = <0x40>;
  403. sandbox,emul = <&emul_pmic0>;
  404. };
  405. mc34708: pmic@41 {
  406. reg = <0x41>;
  407. sandbox,emul = <&emul_pmic1>;
  408. };
  409. };
  410. bootcount@0 {
  411. compatible = "u-boot,bootcount-rtc";
  412. rtc = <&rtc_1>;
  413. offset = <0x13>;
  414. };
  415. bootcount {
  416. compatible = "u-boot,bootcount-i2c-eeprom";
  417. i2c-eeprom = <&bootcount_i2c>;
  418. };
  419. adc@0 {
  420. compatible = "sandbox,adc";
  421. vdd-supply = <&buck2>;
  422. vss-microvolts = <0>;
  423. };
  424. irq: irq {
  425. compatible = "sandbox,irq";
  426. interrupt-controller;
  427. #interrupt-cells = <2>;
  428. };
  429. lcd {
  430. u-boot,dm-pre-reloc;
  431. compatible = "sandbox,lcd-sdl";
  432. xres = <1366>;
  433. yres = <768>;
  434. };
  435. leds {
  436. compatible = "gpio-leds";
  437. iracibble {
  438. gpios = <&gpio_a 1 0>;
  439. label = "sandbox:red";
  440. };
  441. martinet {
  442. gpios = <&gpio_a 2 0>;
  443. label = "sandbox:green";
  444. };
  445. default_on {
  446. gpios = <&gpio_a 5 0>;
  447. label = "sandbox:default_on";
  448. default-state = "on";
  449. };
  450. default_off {
  451. gpios = <&gpio_a 6 0>;
  452. label = "sandbox:default_off";
  453. default-state = "off";
  454. };
  455. };
  456. mbox: mbox {
  457. compatible = "sandbox,mbox";
  458. #mbox-cells = <1>;
  459. };
  460. mbox-test {
  461. compatible = "sandbox,mbox-test";
  462. mboxes = <&mbox 100>, <&mbox 1>;
  463. mbox-names = "other", "test";
  464. };
  465. cpus {
  466. cpu-test1 {
  467. compatible = "sandbox,cpu_sandbox";
  468. u-boot,dm-pre-reloc;
  469. };
  470. cpu-test2 {
  471. compatible = "sandbox,cpu_sandbox";
  472. u-boot,dm-pre-reloc;
  473. };
  474. cpu-test3 {
  475. compatible = "sandbox,cpu_sandbox";
  476. u-boot,dm-pre-reloc;
  477. };
  478. };
  479. chipid: chipid {
  480. compatible = "sandbox,soc";
  481. };
  482. i2s: i2s {
  483. compatible = "sandbox,i2s";
  484. #sound-dai-cells = <1>;
  485. sandbox,silent; /* Don't emit sounds while testing */
  486. };
  487. nop-test_0 {
  488. compatible = "sandbox,nop_sandbox1";
  489. nop-test_1 {
  490. compatible = "sandbox,nop_sandbox2";
  491. bind = "True";
  492. };
  493. nop-test_2 {
  494. compatible = "sandbox,nop_sandbox2";
  495. bind = "False";
  496. };
  497. };
  498. misc-test {
  499. compatible = "sandbox,misc_sandbox";
  500. };
  501. mmc2 {
  502. compatible = "sandbox,mmc";
  503. };
  504. mmc1 {
  505. compatible = "sandbox,mmc";
  506. };
  507. mmc0 {
  508. compatible = "sandbox,mmc";
  509. };
  510. pch {
  511. compatible = "sandbox,pch";
  512. };
  513. pci0: pci@0 {
  514. compatible = "sandbox,pci";
  515. device_type = "pci";
  516. bus-range = <0x00 0xff>;
  517. #address-cells = <3>;
  518. #size-cells = <2>;
  519. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  520. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  521. pci@0,0 {
  522. compatible = "pci-generic";
  523. reg = <0x0000 0 0 0 0>;
  524. sandbox,emul = <&swap_case_emul0_0>;
  525. };
  526. pci@1,0 {
  527. compatible = "pci-generic";
  528. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  529. reg = <0x02000814 0 0 0 0
  530. 0x01000810 0 0 0 0>;
  531. sandbox,emul = <&swap_case_emul0_1>;
  532. };
  533. p2sb-pci@2,0 {
  534. compatible = "sandbox,p2sb";
  535. reg = <0x02001010 0 0 0 0>;
  536. sandbox,emul = <&p2sb_emul>;
  537. adder {
  538. intel,p2sb-port-id = <3>;
  539. compatible = "sandbox,adder";
  540. };
  541. };
  542. pci@1e,0 {
  543. compatible = "sandbox,pmc";
  544. reg = <0xf000 0 0 0 0>;
  545. sandbox,emul = <&pmc_emul1e>;
  546. acpi-base = <0x400>;
  547. gpe0-dwx-mask = <0xf>;
  548. gpe0-dwx-shift-base = <4>;
  549. gpe0-dw = <6 7 9>;
  550. gpe0-sts = <0x20>;
  551. gpe0-en = <0x30>;
  552. };
  553. pci@1f,0 {
  554. compatible = "pci-generic";
  555. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  556. reg = <0x0100f810 0 0 0 0>;
  557. sandbox,emul = <&swap_case_emul0_1f>;
  558. };
  559. };
  560. pci-emul0 {
  561. compatible = "sandbox,pci-emul-parent";
  562. swap_case_emul0_0: emul0@0,0 {
  563. compatible = "sandbox,swap-case";
  564. };
  565. swap_case_emul0_1: emul0@1,0 {
  566. compatible = "sandbox,swap-case";
  567. use-ea;
  568. };
  569. swap_case_emul0_1f: emul0@1f,0 {
  570. compatible = "sandbox,swap-case";
  571. };
  572. p2sb_emul: emul@2,0 {
  573. compatible = "sandbox,p2sb-emul";
  574. };
  575. pmc_emul1e: emul@1e,0 {
  576. compatible = "sandbox,pmc-emul";
  577. };
  578. };
  579. pci1: pci@1 {
  580. compatible = "sandbox,pci";
  581. device_type = "pci";
  582. bus-range = <0x00 0xff>;
  583. #address-cells = <3>;
  584. #size-cells = <2>;
  585. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
  586. 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
  587. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  588. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  589. 0x0c 0x00 0x1234 0x5678
  590. 0x10 0x00 0x1234 0x5678>;
  591. pci@10,0 {
  592. reg = <0x8000 0 0 0 0>;
  593. };
  594. };
  595. pci2: pci@2 {
  596. compatible = "sandbox,pci";
  597. device_type = "pci";
  598. bus-range = <0x00 0xff>;
  599. #address-cells = <3>;
  600. #size-cells = <2>;
  601. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  602. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  603. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  604. pci@1f,0 {
  605. compatible = "pci-generic";
  606. reg = <0xf800 0 0 0 0>;
  607. sandbox,emul = <&swap_case_emul2_1f>;
  608. };
  609. };
  610. pci-emul2 {
  611. compatible = "sandbox,pci-emul-parent";
  612. swap_case_emul2_1f: emul2@1f,0 {
  613. compatible = "sandbox,swap-case";
  614. };
  615. };
  616. pci_ep: pci_ep {
  617. compatible = "sandbox,pci_ep";
  618. };
  619. probing {
  620. compatible = "simple-bus";
  621. test1 {
  622. compatible = "denx,u-boot-probe-test";
  623. };
  624. test2 {
  625. compatible = "denx,u-boot-probe-test";
  626. };
  627. test3 {
  628. compatible = "denx,u-boot-probe-test";
  629. };
  630. test4 {
  631. compatible = "denx,u-boot-probe-test";
  632. first-syscon = <&syscon0>;
  633. second-sys-ctrl = <&another_system_controller>;
  634. third-syscon = <&syscon2>;
  635. };
  636. };
  637. pwrdom: power-domain {
  638. compatible = "sandbox,power-domain";
  639. #power-domain-cells = <1>;
  640. };
  641. power-domain-test {
  642. compatible = "sandbox,power-domain-test";
  643. power-domains = <&pwrdom 2>;
  644. };
  645. pwm: pwm {
  646. compatible = "sandbox,pwm";
  647. #pwm-cells = <2>;
  648. };
  649. pwm2 {
  650. compatible = "sandbox,pwm";
  651. #pwm-cells = <2>;
  652. };
  653. ram {
  654. compatible = "sandbox,ram";
  655. };
  656. reset@0 {
  657. compatible = "sandbox,warm-reset";
  658. };
  659. reset@1 {
  660. compatible = "sandbox,reset";
  661. };
  662. resetc: reset-ctl {
  663. compatible = "sandbox,reset-ctl";
  664. #reset-cells = <1>;
  665. };
  666. reset-ctl-test {
  667. compatible = "sandbox,reset-ctl-test";
  668. resets = <&resetc 100>, <&resetc 2>;
  669. reset-names = "other", "test";
  670. };
  671. rng {
  672. compatible = "sandbox,sandbox-rng";
  673. };
  674. rproc_1: rproc@1 {
  675. compatible = "sandbox,test-processor";
  676. remoteproc-name = "remoteproc-test-dev1";
  677. };
  678. rproc_2: rproc@2 {
  679. compatible = "sandbox,test-processor";
  680. internal-memory-mapped;
  681. remoteproc-name = "remoteproc-test-dev2";
  682. };
  683. panel {
  684. compatible = "simple-panel";
  685. backlight = <&backlight 0 100>;
  686. };
  687. smem@0 {
  688. compatible = "sandbox,smem";
  689. };
  690. sound {
  691. compatible = "sandbox,sound";
  692. cpu {
  693. sound-dai = <&i2s 0>;
  694. };
  695. codec {
  696. sound-dai = <&audio 0>;
  697. };
  698. };
  699. spi@0 {
  700. #address-cells = <1>;
  701. #size-cells = <0>;
  702. reg = <0 1>;
  703. compatible = "sandbox,spi";
  704. cs-gpios = <0>, <&gpio_a 0>;
  705. spi.bin@0 {
  706. reg = <0>;
  707. compatible = "spansion,m25p16", "jedec,spi-nor";
  708. spi-max-frequency = <40000000>;
  709. sandbox,filename = "spi.bin";
  710. };
  711. };
  712. syscon0: syscon@0 {
  713. compatible = "sandbox,syscon0";
  714. reg = <0x10 16>;
  715. };
  716. another_system_controller: syscon@1 {
  717. compatible = "sandbox,syscon1";
  718. reg = <0x20 5
  719. 0x28 6
  720. 0x30 7
  721. 0x38 8>;
  722. };
  723. syscon2: syscon@2 {
  724. compatible = "simple-mfd", "syscon";
  725. reg = <0x40 5
  726. 0x48 6
  727. 0x50 7
  728. 0x58 8>;
  729. };
  730. timer {
  731. compatible = "sandbox,timer";
  732. clock-frequency = <1000000>;
  733. };
  734. tpm2 {
  735. compatible = "sandbox,tpm2";
  736. };
  737. uart0: serial {
  738. compatible = "sandbox,serial";
  739. u-boot,dm-pre-reloc;
  740. };
  741. usb_0: usb@0 {
  742. compatible = "sandbox,usb";
  743. status = "disabled";
  744. hub {
  745. compatible = "sandbox,usb-hub";
  746. #address-cells = <1>;
  747. #size-cells = <0>;
  748. flash-stick {
  749. reg = <0>;
  750. compatible = "sandbox,usb-flash";
  751. };
  752. };
  753. };
  754. usb_1: usb@1 {
  755. compatible = "sandbox,usb";
  756. hub {
  757. compatible = "usb-hub";
  758. usb,device-class = <9>;
  759. #address-cells = <1>;
  760. #size-cells = <0>;
  761. hub-emul {
  762. compatible = "sandbox,usb-hub";
  763. #address-cells = <1>;
  764. #size-cells = <0>;
  765. flash-stick@0 {
  766. reg = <0>;
  767. compatible = "sandbox,usb-flash";
  768. sandbox,filepath = "testflash.bin";
  769. };
  770. flash-stick@1 {
  771. reg = <1>;
  772. compatible = "sandbox,usb-flash";
  773. sandbox,filepath = "testflash1.bin";
  774. };
  775. flash-stick@2 {
  776. reg = <2>;
  777. compatible = "sandbox,usb-flash";
  778. sandbox,filepath = "testflash2.bin";
  779. };
  780. keyb@3 {
  781. reg = <3>;
  782. compatible = "sandbox,usb-keyb";
  783. };
  784. };
  785. usbstor@1 {
  786. reg = <1>;
  787. };
  788. usbstor@3 {
  789. reg = <3>;
  790. };
  791. };
  792. };
  793. usb_2: usb@2 {
  794. compatible = "sandbox,usb";
  795. status = "disabled";
  796. };
  797. spmi: spmi@0 {
  798. compatible = "sandbox,spmi";
  799. #address-cells = <0x1>;
  800. #size-cells = <0x1>;
  801. ranges;
  802. pm8916@0 {
  803. compatible = "qcom,spmi-pmic";
  804. reg = <0x0 0x1>;
  805. #address-cells = <0x1>;
  806. #size-cells = <0x1>;
  807. ranges;
  808. spmi_gpios: gpios@c000 {
  809. compatible = "qcom,pm8916-gpio";
  810. reg = <0xc000 0x400>;
  811. gpio-controller;
  812. gpio-count = <4>;
  813. #gpio-cells = <2>;
  814. gpio-bank-name="spmi";
  815. };
  816. };
  817. };
  818. wdt0: wdt@0 {
  819. compatible = "sandbox,wdt";
  820. };
  821. axi: axi@0 {
  822. compatible = "sandbox,axi";
  823. #address-cells = <0x1>;
  824. #size-cells = <0x1>;
  825. store@0 {
  826. compatible = "sandbox,sandbox_store";
  827. reg = <0x0 0x400>;
  828. };
  829. };
  830. chosen {
  831. #address-cells = <1>;
  832. #size-cells = <1>;
  833. setting = "sunrise ohoka";
  834. other-node = "/some-bus/c-test@5";
  835. int-values = <0x1937 72993>;
  836. u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
  837. chosen-test {
  838. compatible = "denx,u-boot-fdt-test";
  839. reg = <9 1>;
  840. };
  841. };
  842. translation-test@8000 {
  843. compatible = "simple-bus";
  844. reg = <0x8000 0x4000>;
  845. #address-cells = <0x2>;
  846. #size-cells = <0x1>;
  847. ranges = <0 0x0 0x8000 0x1000
  848. 1 0x100 0x9000 0x1000
  849. 2 0x200 0xA000 0x1000
  850. 3 0x300 0xB000 0x1000
  851. >;
  852. dma-ranges = <0 0x000 0x10000000 0x1000
  853. 1 0x100 0x20000000 0x1000
  854. >;
  855. dev@0,0 {
  856. compatible = "denx,u-boot-fdt-dummy";
  857. reg = <0 0x0 0x1000>;
  858. reg-names = "sandbox-dummy-0";
  859. };
  860. dev@1,100 {
  861. compatible = "denx,u-boot-fdt-dummy";
  862. reg = <1 0x100 0x1000>;
  863. };
  864. dev@2,200 {
  865. compatible = "denx,u-boot-fdt-dummy";
  866. reg = <2 0x200 0x1000>;
  867. };
  868. noxlatebus@3,300 {
  869. compatible = "simple-bus";
  870. reg = <3 0x300 0x1000>;
  871. #address-cells = <0x1>;
  872. #size-cells = <0x0>;
  873. dev@42 {
  874. compatible = "denx,u-boot-fdt-dummy";
  875. reg = <0x42>;
  876. };
  877. };
  878. };
  879. osd {
  880. compatible = "sandbox,sandbox_osd";
  881. };
  882. board {
  883. compatible = "sandbox,board_sandbox";
  884. };
  885. sandbox_tee {
  886. compatible = "sandbox,tee";
  887. };
  888. sandbox_virtio1 {
  889. compatible = "sandbox,virtio1";
  890. };
  891. sandbox_virtio2 {
  892. compatible = "sandbox,virtio2";
  893. };
  894. pinctrl {
  895. compatible = "sandbox,pinctrl";
  896. pinctrl-names = "default";
  897. pinctrl-0 = <&gpios>;
  898. gpios: gpios {
  899. gpio0 {
  900. pins = "GPIO0";
  901. bias-pull-up;
  902. input-disable;
  903. };
  904. gpio1 {
  905. pins = "GPIO1";
  906. output-high;
  907. drive-open-drain;
  908. };
  909. gpio2 {
  910. pins = "GPIO2";
  911. bias-pull-down;
  912. input-enable;
  913. };
  914. gpio3 {
  915. pins = "GPIO3";
  916. bias-disable;
  917. };
  918. };
  919. };
  920. hwspinlock@0 {
  921. compatible = "sandbox,hwspinlock";
  922. };
  923. dma: dma {
  924. compatible = "sandbox,dma";
  925. #dma-cells = <1>;
  926. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  927. dma-names = "m2m", "tx0", "rx0";
  928. };
  929. /*
  930. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  931. * end of the test. If parent mdio is removed first, clean-up of the
  932. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  933. * active at the end of the test. That it turn doesn't allow the mdio
  934. * class to be destroyed, triggering an error.
  935. */
  936. mdio-mux-test {
  937. compatible = "sandbox,mdio-mux";
  938. #address-cells = <1>;
  939. #size-cells = <0>;
  940. mdio-parent-bus = <&mdio>;
  941. mdio-ch-test@0 {
  942. reg = <0>;
  943. };
  944. mdio-ch-test@1 {
  945. reg = <1>;
  946. };
  947. };
  948. mdio: mdio-test {
  949. compatible = "sandbox,mdio";
  950. };
  951. pm-bus-test {
  952. compatible = "simple-pm-bus";
  953. clocks = <&clk_sandbox 4>;
  954. power-domains = <&pwrdom 1>;
  955. };
  956. resetc2: syscon-reset {
  957. compatible = "syscon-reset";
  958. #reset-cells = <1>;
  959. regmap = <&syscon0>;
  960. offset = <1>;
  961. mask = <0x27FFFFFF>;
  962. assert-high = <0>;
  963. };
  964. syscon-reset-test {
  965. compatible = "sandbox,misc_sandbox";
  966. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  967. reset-names = "valid", "no_mask", "out_of_range";
  968. };
  969. };
  970. #include "sandbox_pmic.dtsi"