io.h 16 KB

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  1. /*
  2. * linux/include/asm-arm/io.h
  3. *
  4. * Copyright (C) 1996-2000 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Modifications:
  11. * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
  12. * constant addresses and variable addresses.
  13. * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
  14. * specific IO header files.
  15. * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
  16. * 04-Apr-1999 PJB Added check_signature.
  17. * 12-Dec-1999 RMK More cleanups
  18. * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
  19. */
  20. #ifndef __ASM_ARM_IO_H
  21. #define __ASM_ARM_IO_H
  22. #ifdef __KERNEL__
  23. #include <linux/types.h>
  24. #include <linux/kernel.h>
  25. #include <asm/byteorder.h>
  26. #include <asm/memory.h>
  27. #include <asm/barriers.h>
  28. #if 0 /* XXX###XXX */
  29. #include <asm/arch/hardware.h>
  30. #endif /* XXX###XXX */
  31. static inline void sync(void)
  32. {
  33. }
  34. /*
  35. * Generic virtual read/write. Note that we don't support half-word
  36. * read/writes. We define __arch_*[bl] here, and leave __arch_*w
  37. * to the architecture specific code.
  38. */
  39. #define __arch_getb(a) (*(volatile unsigned char *)(a))
  40. #define __arch_getw(a) (*(volatile unsigned short *)(a))
  41. #define __arch_getl(a) (*(volatile unsigned int *)(a))
  42. #define __arch_getq(a) (*(volatile unsigned long long *)(a))
  43. #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
  44. #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
  45. #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
  46. #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v))
  47. static inline void __raw_writesb(unsigned long addr, const void *data,
  48. int bytelen)
  49. {
  50. uint8_t *buf = (uint8_t *)data;
  51. while(bytelen--)
  52. __arch_putb(*buf++, addr);
  53. }
  54. static inline void __raw_writesw(unsigned long addr, const void *data,
  55. int wordlen)
  56. {
  57. uint16_t *buf = (uint16_t *)data;
  58. while(wordlen--)
  59. __arch_putw(*buf++, addr);
  60. }
  61. static inline void __raw_writesl(unsigned long addr, const void *data,
  62. int longlen)
  63. {
  64. uint32_t *buf = (uint32_t *)data;
  65. while(longlen--)
  66. __arch_putl(*buf++, addr);
  67. }
  68. static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
  69. {
  70. uint8_t *buf = (uint8_t *)data;
  71. while(bytelen--)
  72. *buf++ = __arch_getb(addr);
  73. }
  74. static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
  75. {
  76. uint16_t *buf = (uint16_t *)data;
  77. while(wordlen--)
  78. *buf++ = __arch_getw(addr);
  79. }
  80. static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
  81. {
  82. uint32_t *buf = (uint32_t *)data;
  83. while(longlen--)
  84. *buf++ = __arch_getl(addr);
  85. }
  86. #define __raw_writeb(v,a) __arch_putb(v,a)
  87. #define __raw_writew(v,a) __arch_putw(v,a)
  88. #define __raw_writel(v,a) __arch_putl(v,a)
  89. #define __raw_writeq(v,a) __arch_putq(v,a)
  90. #define __raw_readb(a) __arch_getb(a)
  91. #define __raw_readw(a) __arch_getw(a)
  92. #define __raw_readl(a) __arch_getl(a)
  93. #define __raw_readq(a) __arch_getq(a)
  94. /*
  95. * TODO: The kernel offers some more advanced versions of barriers, it might
  96. * have some advantages to use them instead of the simple one here.
  97. */
  98. #define mb() dsb()
  99. #define rmb() dsb()
  100. #define wmb() dsb()
  101. #define __iormb() dmb()
  102. #define __iowmb() dmb()
  103. #define smp_processor_id() 0
  104. #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; })
  105. #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
  106. #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
  107. #define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
  108. #define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
  109. #define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
  110. #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
  111. #define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; })
  112. /*
  113. * Relaxed I/O memory access primitives. These follow the Device memory
  114. * ordering rules but do not guarantee any ordering relative to Normal memory
  115. * accesses.
  116. */
  117. #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
  118. #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
  119. __raw_readw(c)); __r; })
  120. #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
  121. __raw_readl(c)); __r; })
  122. #define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \
  123. __raw_readq(c)); __r; })
  124. #define writeb_relaxed(v, c) ((void)__raw_writeb((v), (c)))
  125. #define writew_relaxed(v, c) ((void)__raw_writew((__force u16) \
  126. cpu_to_le16(v), (c)))
  127. #define writel_relaxed(v, c) ((void)__raw_writel((__force u32) \
  128. cpu_to_le32(v), (c)))
  129. #define writeq_relaxed(v, c) ((void)__raw_writeq((__force u64) \
  130. cpu_to_le64(v), (c)))
  131. /*
  132. * The compiler seems to be incapable of optimising constants
  133. * properly. Spell it out to the compiler in some cases.
  134. * These are only valid for small values of "off" (< 1<<12)
  135. */
  136. #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
  137. #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
  138. #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
  139. #define __raw_base_readb(base,off) __arch_base_getb(base,off)
  140. #define __raw_base_readw(base,off) __arch_base_getw(base,off)
  141. #define __raw_base_readl(base,off) __arch_base_getl(base,off)
  142. /*
  143. * Clear and set bits in one shot. These macros can be used to clear and
  144. * set multiple bits in a register using a single call. These macros can
  145. * also be used to set a multiple-bit bit pattern using a mask, by
  146. * specifying the mask in the 'clear' parameter and the new bit pattern
  147. * in the 'set' parameter.
  148. */
  149. #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a)
  150. #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a))
  151. #define out_le64(a,v) out_arch(q,le64,a,v)
  152. #define out_le32(a,v) out_arch(l,le32,a,v)
  153. #define out_le16(a,v) out_arch(w,le16,a,v)
  154. #define in_le64(a) in_arch(q,le64,a)
  155. #define in_le32(a) in_arch(l,le32,a)
  156. #define in_le16(a) in_arch(w,le16,a)
  157. #define out_be64(a,v) out_arch(l,be64,a,v)
  158. #define out_be32(a,v) out_arch(l,be32,a,v)
  159. #define out_be16(a,v) out_arch(w,be16,a,v)
  160. #define in_be64(a) in_arch(l,be64,a)
  161. #define in_be32(a) in_arch(l,be32,a)
  162. #define in_be16(a) in_arch(w,be16,a)
  163. #define out_64(a,v) __raw_writeq(v,a)
  164. #define out_32(a,v) __raw_writel(v,a)
  165. #define out_16(a,v) __raw_writew(v,a)
  166. #define out_8(a,v) __raw_writeb(v,a)
  167. #define in_64(a) __raw_readq(a)
  168. #define in_32(a) __raw_readl(a)
  169. #define in_16(a) __raw_readw(a)
  170. #define in_8(a) __raw_readb(a)
  171. #define clrbits(type, addr, clear) \
  172. out_##type((addr), in_##type(addr) & ~(clear))
  173. #define setbits(type, addr, set) \
  174. out_##type((addr), in_##type(addr) | (set))
  175. #define clrsetbits(type, addr, clear, set) \
  176. out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
  177. #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
  178. #define setbits_be32(addr, set) setbits(be32, addr, set)
  179. #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
  180. #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
  181. #define setbits_le32(addr, set) setbits(le32, addr, set)
  182. #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
  183. #define clrbits_32(addr, clear) clrbits(32, addr, clear)
  184. #define setbits_32(addr, set) setbits(32, addr, set)
  185. #define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
  186. #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
  187. #define setbits_be16(addr, set) setbits(be16, addr, set)
  188. #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
  189. #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
  190. #define setbits_le16(addr, set) setbits(le16, addr, set)
  191. #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
  192. #define clrbits_16(addr, clear) clrbits(16, addr, clear)
  193. #define setbits_16(addr, set) setbits(16, addr, set)
  194. #define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
  195. #define clrbits_8(addr, clear) clrbits(8, addr, clear)
  196. #define setbits_8(addr, set) setbits(8, addr, set)
  197. #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
  198. #define clrbits_be64(addr, clear) clrbits(be64, addr, clear)
  199. #define setbits_be64(addr, set) setbits(be64, addr, set)
  200. #define clrsetbits_be64(addr, clear, set) clrsetbits(be64, addr, clear, set)
  201. #define clrbits_le64(addr, clear) clrbits(le64, addr, clear)
  202. #define setbits_le64(addr, set) setbits(le64, addr, set)
  203. #define clrsetbits_le64(addr, clear, set) clrsetbits(le64, addr, clear, set)
  204. #define clrbits_64(addr, clear) clrbits(64, addr, clear)
  205. #define setbits_64(addr, set) setbits(64, addr, set)
  206. #define clrsetbits_64(addr, clear, set) clrsetbits(64, addr, clear, set)
  207. /*
  208. * Now, pick up the machine-defined IO definitions
  209. */
  210. #if 0 /* XXX###XXX */
  211. #include <asm/arch/io.h>
  212. #endif /* XXX###XXX */
  213. /*
  214. * IO port access primitives
  215. * -------------------------
  216. *
  217. * The ARM doesn't have special IO access instructions; all IO is memory
  218. * mapped. Note that these are defined to perform little endian accesses
  219. * only. Their primary purpose is to access PCI and ISA peripherals.
  220. *
  221. * Note that for a big endian machine, this implies that the following
  222. * big endian mode connectivity is in place, as described by numerous
  223. * ARM documents:
  224. *
  225. * PCI: D0-D7 D8-D15 D16-D23 D24-D31
  226. * ARM: D24-D31 D16-D23 D8-D15 D0-D7
  227. *
  228. * The machine specific io.h include defines __io to translate an "IO"
  229. * address to a memory address.
  230. *
  231. * Note that we prevent GCC re-ordering or caching values in expressions
  232. * by introducing sequence points into the in*() definitions. Note that
  233. * __raw_* do not guarantee this behaviour.
  234. *
  235. * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  236. */
  237. #ifdef __io
  238. #define outb(v,p) __raw_writeb(v,__io(p))
  239. #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
  240. #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
  241. #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
  242. #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
  243. #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
  244. #define outsb(p,d,l) __raw_writesb(__io(p),d,l)
  245. #define outsw(p,d,l) __raw_writesw(__io(p),d,l)
  246. #define outsl(p,d,l) __raw_writesl(__io(p),d,l)
  247. #define insb(p,d,l) __raw_readsb(__io(p),d,l)
  248. #define insw(p,d,l) __raw_readsw(__io(p),d,l)
  249. #define insl(p,d,l) __raw_readsl(__io(p),d,l)
  250. #endif
  251. #define outb_p(val,port) outb((val),(port))
  252. #define outw_p(val,port) outw((val),(port))
  253. #define outl_p(val,port) outl((val),(port))
  254. #define inb_p(port) inb((port))
  255. #define inw_p(port) inw((port))
  256. #define inl_p(port) inl((port))
  257. #define outsb_p(port,from,len) outsb(port,from,len)
  258. #define outsw_p(port,from,len) outsw(port,from,len)
  259. #define outsl_p(port,from,len) outsl(port,from,len)
  260. #define insb_p(port,to,len) insb(port,to,len)
  261. #define insw_p(port,to,len) insw(port,to,len)
  262. #define insl_p(port,to,len) insl(port,to,len)
  263. #define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
  264. #define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
  265. #define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
  266. #define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
  267. #define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
  268. #define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
  269. /*
  270. * DMA-consistent mapping functions. These allocate/free a region of
  271. * uncached, unwrite-buffered mapped memory space for use with DMA
  272. * devices. This is the "generic" version. The PCI specific version
  273. * is in pci.h
  274. */
  275. extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
  276. extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
  277. extern void consistent_sync(void *vaddr, size_t size, int rw);
  278. /*
  279. * String version of IO memory access ops:
  280. */
  281. extern void _memcpy_fromio(void *, unsigned long, size_t);
  282. extern void _memcpy_toio(unsigned long, const void *, size_t);
  283. extern void _memset_io(unsigned long, int, size_t);
  284. extern void __readwrite_bug(const char *fn);
  285. /* Optimized copy functions to read from/write to IO sapce */
  286. #ifdef CONFIG_ARM64
  287. /*
  288. * Copy data from IO memory space to "real" memory space.
  289. */
  290. static inline
  291. void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count)
  292. {
  293. while (count && !IS_ALIGNED((unsigned long)from, 8)) {
  294. *(u8 *)to = __raw_readb(from);
  295. from++;
  296. to++;
  297. count--;
  298. }
  299. while (count >= 8) {
  300. *(u64 *)to = __raw_readq(from);
  301. from += 8;
  302. to += 8;
  303. count -= 8;
  304. }
  305. while (count) {
  306. *(u8 *)to = __raw_readb(from);
  307. from++;
  308. to++;
  309. count--;
  310. }
  311. }
  312. /*
  313. * Copy data from "real" memory space to IO memory space.
  314. */
  315. static inline
  316. void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count)
  317. {
  318. while (count && !IS_ALIGNED((unsigned long)to, 8)) {
  319. __raw_writeb(*(u8 *)from, to);
  320. from++;
  321. to++;
  322. count--;
  323. }
  324. while (count >= 8) {
  325. __raw_writeq(*(u64 *)from, to);
  326. from += 8;
  327. to += 8;
  328. count -= 8;
  329. }
  330. while (count) {
  331. __raw_writeb(*(u8 *)from, to);
  332. from++;
  333. to++;
  334. count--;
  335. }
  336. }
  337. /*
  338. * "memset" on IO memory space.
  339. */
  340. static inline
  341. void __memset_io(volatile void __iomem *dst, int c, size_t count)
  342. {
  343. u64 qc = (u8)c;
  344. qc |= qc << 8;
  345. qc |= qc << 16;
  346. qc |= qc << 32;
  347. while (count && !IS_ALIGNED((unsigned long)dst, 8)) {
  348. __raw_writeb(c, dst);
  349. dst++;
  350. count--;
  351. }
  352. while (count >= 8) {
  353. __raw_writeq(qc, dst);
  354. dst += 8;
  355. count -= 8;
  356. }
  357. while (count) {
  358. __raw_writeb(c, dst);
  359. dst++;
  360. count--;
  361. }
  362. }
  363. #endif /* CONFIG_ARM64 */
  364. #ifdef CONFIG_ARM64
  365. #define memset_io(a, b, c) __memset_io((a), (b), (c))
  366. #define memcpy_fromio(a, b, c) __memcpy_fromio((a), (b), (c))
  367. #define memcpy_toio(a, b, c) __memcpy_toio((a), (b), (c))
  368. #else
  369. #define memset_io(a, b, c) memset((void *)(a), (b), (c))
  370. #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
  371. #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
  372. #endif
  373. /*
  374. * If this architecture has ISA IO, then define the isa_read/isa_write
  375. * macros.
  376. */
  377. #ifdef __mem_isa
  378. #define isa_readb(addr) __raw_readb(__mem_isa(addr))
  379. #define isa_readw(addr) __raw_readw(__mem_isa(addr))
  380. #define isa_readl(addr) __raw_readl(__mem_isa(addr))
  381. #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
  382. #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
  383. #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
  384. #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
  385. #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
  386. #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
  387. #define isa_eth_io_copy_and_sum(a,b,c,d) \
  388. eth_copy_and_sum((a),__mem_isa(b),(c),(d))
  389. static inline int
  390. isa_check_signature(unsigned long io_addr, const unsigned char *signature,
  391. int length)
  392. {
  393. int retval = 0;
  394. do {
  395. if (isa_readb(io_addr) != *signature)
  396. goto out;
  397. io_addr++;
  398. signature++;
  399. length--;
  400. } while (length);
  401. retval = 1;
  402. out:
  403. return retval;
  404. }
  405. #else /* __mem_isa */
  406. #define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
  407. #define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
  408. #define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
  409. #define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
  410. #define isa_writew(val,addr) __readwrite_bug("isa_writew")
  411. #define isa_writel(val,addr) __readwrite_bug("isa_writel")
  412. #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
  413. #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
  414. #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
  415. #define isa_eth_io_copy_and_sum(a,b,c,d) \
  416. __readwrite_bug("isa_eth_io_copy_and_sum")
  417. #define isa_check_signature(io,sig,len) (0)
  418. #endif /* __mem_isa */
  419. #endif /* __KERNEL__ */
  420. #include <asm-generic/io.h>
  421. #include <iotrace.h>
  422. #endif /* __ASM_ARM_IO_H */