fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <dm/of_extra.h>
  10. #include <env.h>
  11. #include <errno.h>
  12. #include <fdtdec.h>
  13. #include <fdt_support.h>
  14. #include <gzip.h>
  15. #include <mapmem.h>
  16. #include <linux/libfdt.h>
  17. #include <serial.h>
  18. #include <asm/sections.h>
  19. #include <linux/ctype.h>
  20. #include <linux/lzo.h>
  21. DECLARE_GLOBAL_DATA_PTR;
  22. /*
  23. * Here are the type we know about. One day we might allow drivers to
  24. * register. For now we just put them here. The COMPAT macro allows us to
  25. * turn this into a sparse list later, and keeps the ID with the name.
  26. *
  27. * NOTE: This list is basically a TODO list for things that need to be
  28. * converted to driver model. So don't add new things here unless there is a
  29. * good reason why driver-model conversion is infeasible. Examples include
  30. * things which are used before driver model is available.
  31. */
  32. #define COMPAT(id, name) name
  33. static const char * const compat_names[COMPAT_COUNT] = {
  34. COMPAT(UNKNOWN, "<none>"),
  35. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  36. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  37. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  38. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  39. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  40. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  41. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  42. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  43. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  44. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  45. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  46. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  47. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  48. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  49. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  50. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  51. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  52. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  53. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  54. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  55. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  56. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  57. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  58. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  59. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  60. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  61. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  62. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  63. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  64. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  65. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  67. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  68. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  69. };
  70. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  71. {
  72. /* We allow reading of the 'unknown' ID for testing purposes */
  73. assert(id >= 0 && id < COMPAT_COUNT);
  74. return compat_names[id];
  75. }
  76. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  77. const char *prop_name, int index, int na,
  78. int ns, fdt_size_t *sizep,
  79. bool translate)
  80. {
  81. const fdt32_t *prop, *prop_end;
  82. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  83. int len;
  84. fdt_addr_t addr;
  85. debug("%s: %s: ", __func__, prop_name);
  86. prop = fdt_getprop(blob, node, prop_name, &len);
  87. if (!prop) {
  88. debug("(not found)\n");
  89. return FDT_ADDR_T_NONE;
  90. }
  91. prop_end = prop + (len / sizeof(*prop));
  92. prop_addr = prop + (index * (na + ns));
  93. prop_size = prop_addr + na;
  94. prop_after_size = prop_size + ns;
  95. if (prop_after_size > prop_end) {
  96. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  97. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  98. return FDT_ADDR_T_NONE;
  99. }
  100. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  101. if (translate)
  102. addr = fdt_translate_address(blob, node, prop_addr);
  103. else
  104. #endif
  105. addr = fdtdec_get_number(prop_addr, na);
  106. if (sizep) {
  107. *sizep = fdtdec_get_number(prop_size, ns);
  108. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  109. (unsigned long long)*sizep);
  110. } else {
  111. debug("addr=%08llx\n", (unsigned long long)addr);
  112. }
  113. return addr;
  114. }
  115. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  116. int node, const char *prop_name,
  117. int index, fdt_size_t *sizep,
  118. bool translate)
  119. {
  120. int na, ns;
  121. debug("%s: ", __func__);
  122. na = fdt_address_cells(blob, parent);
  123. if (na < 1) {
  124. debug("(bad #address-cells)\n");
  125. return FDT_ADDR_T_NONE;
  126. }
  127. ns = fdt_size_cells(blob, parent);
  128. if (ns < 0) {
  129. debug("(bad #size-cells)\n");
  130. return FDT_ADDR_T_NONE;
  131. }
  132. debug("na=%d, ns=%d, ", na, ns);
  133. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  134. ns, sizep, translate);
  135. }
  136. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  137. const char *prop_name, int index,
  138. fdt_size_t *sizep,
  139. bool translate)
  140. {
  141. int parent;
  142. debug("%s: ", __func__);
  143. parent = fdt_parent_offset(blob, node);
  144. if (parent < 0) {
  145. debug("(no parent found)\n");
  146. return FDT_ADDR_T_NONE;
  147. }
  148. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  149. index, sizep, translate);
  150. }
  151. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  152. const char *prop_name, fdt_size_t *sizep)
  153. {
  154. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  155. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  156. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  157. ns, sizep, false);
  158. }
  159. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  160. {
  161. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  162. }
  163. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  164. int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
  165. const char *prop_name, struct fdt_pci_addr *addr)
  166. {
  167. const u32 *cell;
  168. int len;
  169. int ret = -ENOENT;
  170. debug("%s: %s: ", __func__, prop_name);
  171. /*
  172. * If we follow the pci bus bindings strictly, we should check
  173. * the value of the node's parent node's #address-cells and
  174. * #size-cells. They need to be 3 and 2 accordingly. However,
  175. * for simplicity we skip the check here.
  176. */
  177. cell = fdt_getprop(blob, node, prop_name, &len);
  178. if (!cell)
  179. goto fail;
  180. if ((len % FDT_PCI_REG_SIZE) == 0) {
  181. int num = len / FDT_PCI_REG_SIZE;
  182. int i;
  183. for (i = 0; i < num; i++) {
  184. debug("pci address #%d: %08lx %08lx %08lx\n", i,
  185. (ulong)fdt32_to_cpu(cell[0]),
  186. (ulong)fdt32_to_cpu(cell[1]),
  187. (ulong)fdt32_to_cpu(cell[2]));
  188. if ((fdt32_to_cpu(*cell) & type) == type) {
  189. addr->phys_hi = fdt32_to_cpu(cell[0]);
  190. addr->phys_mid = fdt32_to_cpu(cell[1]);
  191. addr->phys_lo = fdt32_to_cpu(cell[1]);
  192. break;
  193. }
  194. cell += (FDT_PCI_ADDR_CELLS +
  195. FDT_PCI_SIZE_CELLS);
  196. }
  197. if (i == num) {
  198. ret = -ENXIO;
  199. goto fail;
  200. }
  201. return 0;
  202. }
  203. ret = -EINVAL;
  204. fail:
  205. debug("(not found)\n");
  206. return ret;
  207. }
  208. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  209. {
  210. const char *list, *end;
  211. int len;
  212. list = fdt_getprop(blob, node, "compatible", &len);
  213. if (!list)
  214. return -ENOENT;
  215. end = list + len;
  216. while (list < end) {
  217. len = strlen(list);
  218. if (len >= strlen("pciVVVV,DDDD")) {
  219. char *s = strstr(list, "pci");
  220. /*
  221. * check if the string is something like pciVVVV,DDDD.RR
  222. * or just pciVVVV,DDDD
  223. */
  224. if (s && s[7] == ',' &&
  225. (s[12] == '.' || s[12] == 0)) {
  226. s += 3;
  227. *vendor = simple_strtol(s, NULL, 16);
  228. s += 5;
  229. *device = simple_strtol(s, NULL, 16);
  230. return 0;
  231. }
  232. }
  233. list += (len + 1);
  234. }
  235. return -ENOENT;
  236. }
  237. int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
  238. u32 *bar)
  239. {
  240. int barnum;
  241. /* extract the bar number from fdt_pci_addr */
  242. barnum = addr->phys_hi & 0xff;
  243. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  244. return -EINVAL;
  245. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  246. *bar = dm_pci_read_bar32(dev, barnum);
  247. return 0;
  248. }
  249. #endif
  250. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  251. uint64_t default_val)
  252. {
  253. const uint64_t *cell64;
  254. int length;
  255. cell64 = fdt_getprop(blob, node, prop_name, &length);
  256. if (!cell64 || length < sizeof(*cell64))
  257. return default_val;
  258. return fdt64_to_cpu(*cell64);
  259. }
  260. int fdtdec_get_is_enabled(const void *blob, int node)
  261. {
  262. const char *cell;
  263. /*
  264. * It should say "okay", so only allow that. Some fdts use "ok" but
  265. * this is a bug. Please fix your device tree source file. See here
  266. * for discussion:
  267. *
  268. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  269. */
  270. cell = fdt_getprop(blob, node, "status", NULL);
  271. if (cell)
  272. return strcmp(cell, "okay") == 0;
  273. return 1;
  274. }
  275. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  276. {
  277. enum fdt_compat_id id;
  278. /* Search our drivers */
  279. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  280. if (fdt_node_check_compatible(blob, node,
  281. compat_names[id]) == 0)
  282. return id;
  283. return COMPAT_UNKNOWN;
  284. }
  285. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  286. {
  287. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  288. }
  289. int fdtdec_next_compatible_subnode(const void *blob, int node,
  290. enum fdt_compat_id id, int *depthp)
  291. {
  292. do {
  293. node = fdt_next_node(blob, node, depthp);
  294. } while (*depthp > 1);
  295. /* If this is a direct subnode, and compatible, return it */
  296. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  297. blob, node, compat_names[id]))
  298. return node;
  299. return -FDT_ERR_NOTFOUND;
  300. }
  301. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  302. int *upto)
  303. {
  304. #define MAX_STR_LEN 20
  305. char str[MAX_STR_LEN + 20];
  306. int node, err;
  307. /* snprintf() is not available */
  308. assert(strlen(name) < MAX_STR_LEN);
  309. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  310. node = fdt_path_offset(blob, str);
  311. if (node < 0)
  312. return node;
  313. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  314. if (err < 0)
  315. return err;
  316. if (err)
  317. return -FDT_ERR_NOTFOUND;
  318. (*upto)++;
  319. return node;
  320. }
  321. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  322. enum fdt_compat_id id, int *node_list,
  323. int maxcount)
  324. {
  325. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  326. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  327. }
  328. /* TODO: Can we tighten this code up a little? */
  329. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  330. enum fdt_compat_id id, int *node_list,
  331. int maxcount)
  332. {
  333. int name_len = strlen(name);
  334. int nodes[maxcount];
  335. int num_found = 0;
  336. int offset, node;
  337. int alias_node;
  338. int count;
  339. int i, j;
  340. /* find the alias node if present */
  341. alias_node = fdt_path_offset(blob, "/aliases");
  342. /*
  343. * start with nothing, and we can assume that the root node can't
  344. * match
  345. */
  346. memset(nodes, '\0', sizeof(nodes));
  347. /* First find all the compatible nodes */
  348. for (node = count = 0; node >= 0 && count < maxcount;) {
  349. node = fdtdec_next_compatible(blob, node, id);
  350. if (node >= 0)
  351. nodes[count++] = node;
  352. }
  353. if (node >= 0)
  354. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  355. __func__, name);
  356. /* Now find all the aliases */
  357. for (offset = fdt_first_property_offset(blob, alias_node);
  358. offset > 0;
  359. offset = fdt_next_property_offset(blob, offset)) {
  360. const struct fdt_property *prop;
  361. const char *path;
  362. int number;
  363. int found;
  364. node = 0;
  365. prop = fdt_get_property_by_offset(blob, offset, NULL);
  366. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  367. if (prop->len && 0 == strncmp(path, name, name_len))
  368. node = fdt_path_offset(blob, prop->data);
  369. if (node <= 0)
  370. continue;
  371. /* Get the alias number */
  372. number = simple_strtoul(path + name_len, NULL, 10);
  373. if (number < 0 || number >= maxcount) {
  374. debug("%s: warning: alias '%s' is out of range\n",
  375. __func__, path);
  376. continue;
  377. }
  378. /* Make sure the node we found is actually in our list! */
  379. found = -1;
  380. for (j = 0; j < count; j++)
  381. if (nodes[j] == node) {
  382. found = j;
  383. break;
  384. }
  385. if (found == -1) {
  386. debug("%s: warning: alias '%s' points to a node "
  387. "'%s' that is missing or is not compatible "
  388. " with '%s'\n", __func__, path,
  389. fdt_get_name(blob, node, NULL),
  390. compat_names[id]);
  391. continue;
  392. }
  393. /*
  394. * Add this node to our list in the right place, and mark
  395. * it as done.
  396. */
  397. if (fdtdec_get_is_enabled(blob, node)) {
  398. if (node_list[number]) {
  399. debug("%s: warning: alias '%s' requires that "
  400. "a node be placed in the list in a "
  401. "position which is already filled by "
  402. "node '%s'\n", __func__, path,
  403. fdt_get_name(blob, node, NULL));
  404. continue;
  405. }
  406. node_list[number] = node;
  407. if (number >= num_found)
  408. num_found = number + 1;
  409. }
  410. nodes[found] = 0;
  411. }
  412. /* Add any nodes not mentioned by an alias */
  413. for (i = j = 0; i < maxcount; i++) {
  414. if (!node_list[i]) {
  415. for (; j < maxcount; j++)
  416. if (nodes[j] &&
  417. fdtdec_get_is_enabled(blob, nodes[j]))
  418. break;
  419. /* Have we run out of nodes to add? */
  420. if (j == maxcount)
  421. break;
  422. assert(!node_list[i]);
  423. node_list[i] = nodes[j++];
  424. if (i >= num_found)
  425. num_found = i + 1;
  426. }
  427. }
  428. return num_found;
  429. }
  430. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  431. int *seqp)
  432. {
  433. int base_len = strlen(base);
  434. const char *find_name;
  435. int find_namelen;
  436. int prop_offset;
  437. int aliases;
  438. find_name = fdt_get_name(blob, offset, &find_namelen);
  439. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  440. aliases = fdt_path_offset(blob, "/aliases");
  441. for (prop_offset = fdt_first_property_offset(blob, aliases);
  442. prop_offset > 0;
  443. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  444. const char *prop;
  445. const char *name;
  446. const char *slash;
  447. int len, val;
  448. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  449. debug(" - %s, %s\n", name, prop);
  450. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  451. strncmp(name, base, base_len))
  452. continue;
  453. slash = strrchr(prop, '/');
  454. if (strcmp(slash + 1, find_name))
  455. continue;
  456. val = trailing_strtol(name);
  457. if (val != -1) {
  458. *seqp = val;
  459. debug("Found seq %d\n", *seqp);
  460. return 0;
  461. }
  462. }
  463. debug("Not found\n");
  464. return -ENOENT;
  465. }
  466. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  467. {
  468. int base_len = strlen(base);
  469. int prop_offset;
  470. int aliases;
  471. int max = -1;
  472. debug("Looking for highest alias id for '%s'\n", base);
  473. aliases = fdt_path_offset(blob, "/aliases");
  474. for (prop_offset = fdt_first_property_offset(blob, aliases);
  475. prop_offset > 0;
  476. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  477. const char *prop;
  478. const char *name;
  479. int len, val;
  480. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  481. debug(" - %s, %s\n", name, prop);
  482. if (*prop != '/' || prop[len - 1] ||
  483. strncmp(name, base, base_len))
  484. continue;
  485. val = trailing_strtol(name);
  486. if (val > max) {
  487. debug("Found seq %d\n", val);
  488. max = val;
  489. }
  490. }
  491. return max;
  492. }
  493. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  494. {
  495. int chosen_node;
  496. if (!blob)
  497. return NULL;
  498. chosen_node = fdt_path_offset(blob, "/chosen");
  499. return fdt_getprop(blob, chosen_node, name, NULL);
  500. }
  501. int fdtdec_get_chosen_node(const void *blob, const char *name)
  502. {
  503. const char *prop;
  504. prop = fdtdec_get_chosen_prop(blob, name);
  505. if (!prop)
  506. return -FDT_ERR_NOTFOUND;
  507. return fdt_path_offset(blob, prop);
  508. }
  509. int fdtdec_check_fdt(void)
  510. {
  511. /*
  512. * We must have an FDT, but we cannot panic() yet since the console
  513. * is not ready. So for now, just assert(). Boards which need an early
  514. * FDT (prior to console ready) will need to make their own
  515. * arrangements and do their own checks.
  516. */
  517. assert(!fdtdec_prepare_fdt());
  518. return 0;
  519. }
  520. /*
  521. * This function is a little odd in that it accesses global data. At some
  522. * point if the architecture board.c files merge this will make more sense.
  523. * Even now, it is common code.
  524. */
  525. int fdtdec_prepare_fdt(void)
  526. {
  527. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  528. fdt_check_header(gd->fdt_blob)) {
  529. #ifdef CONFIG_SPL_BUILD
  530. puts("Missing DTB\n");
  531. #else
  532. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  533. # ifdef DEBUG
  534. if (gd->fdt_blob) {
  535. printf("fdt_blob=%p\n", gd->fdt_blob);
  536. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  537. 32, 0);
  538. }
  539. # endif
  540. #endif
  541. return -1;
  542. }
  543. return 0;
  544. }
  545. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  546. {
  547. const u32 *phandle;
  548. int lookup;
  549. debug("%s: %s\n", __func__, prop_name);
  550. phandle = fdt_getprop(blob, node, prop_name, NULL);
  551. if (!phandle)
  552. return -FDT_ERR_NOTFOUND;
  553. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  554. return lookup;
  555. }
  556. /**
  557. * Look up a property in a node and check that it has a minimum length.
  558. *
  559. * @param blob FDT blob
  560. * @param node node to examine
  561. * @param prop_name name of property to find
  562. * @param min_len minimum property length in bytes
  563. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  564. found, or -FDT_ERR_BADLAYOUT if not enough data
  565. * @return pointer to cell, which is only valid if err == 0
  566. */
  567. static const void *get_prop_check_min_len(const void *blob, int node,
  568. const char *prop_name, int min_len,
  569. int *err)
  570. {
  571. const void *cell;
  572. int len;
  573. debug("%s: %s\n", __func__, prop_name);
  574. cell = fdt_getprop(blob, node, prop_name, &len);
  575. if (!cell)
  576. *err = -FDT_ERR_NOTFOUND;
  577. else if (len < min_len)
  578. *err = -FDT_ERR_BADLAYOUT;
  579. else
  580. *err = 0;
  581. return cell;
  582. }
  583. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  584. u32 *array, int count)
  585. {
  586. const u32 *cell;
  587. int err = 0;
  588. debug("%s: %s\n", __func__, prop_name);
  589. cell = get_prop_check_min_len(blob, node, prop_name,
  590. sizeof(u32) * count, &err);
  591. if (!err) {
  592. int i;
  593. for (i = 0; i < count; i++)
  594. array[i] = fdt32_to_cpu(cell[i]);
  595. }
  596. return err;
  597. }
  598. int fdtdec_get_int_array_count(const void *blob, int node,
  599. const char *prop_name, u32 *array, int count)
  600. {
  601. const u32 *cell;
  602. int len, elems;
  603. int i;
  604. debug("%s: %s\n", __func__, prop_name);
  605. cell = fdt_getprop(blob, node, prop_name, &len);
  606. if (!cell)
  607. return -FDT_ERR_NOTFOUND;
  608. elems = len / sizeof(u32);
  609. if (count > elems)
  610. count = elems;
  611. for (i = 0; i < count; i++)
  612. array[i] = fdt32_to_cpu(cell[i]);
  613. return count;
  614. }
  615. const u32 *fdtdec_locate_array(const void *blob, int node,
  616. const char *prop_name, int count)
  617. {
  618. const u32 *cell;
  619. int err;
  620. cell = get_prop_check_min_len(blob, node, prop_name,
  621. sizeof(u32) * count, &err);
  622. return err ? NULL : cell;
  623. }
  624. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  625. {
  626. const s32 *cell;
  627. int len;
  628. debug("%s: %s\n", __func__, prop_name);
  629. cell = fdt_getprop(blob, node, prop_name, &len);
  630. return cell != NULL;
  631. }
  632. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  633. const char *list_name,
  634. const char *cells_name,
  635. int cell_count, int index,
  636. struct fdtdec_phandle_args *out_args)
  637. {
  638. const __be32 *list, *list_end;
  639. int rc = 0, size, cur_index = 0;
  640. uint32_t count = 0;
  641. int node = -1;
  642. int phandle;
  643. /* Retrieve the phandle list property */
  644. list = fdt_getprop(blob, src_node, list_name, &size);
  645. if (!list)
  646. return -ENOENT;
  647. list_end = list + size / sizeof(*list);
  648. /* Loop over the phandles until all the requested entry is found */
  649. while (list < list_end) {
  650. rc = -EINVAL;
  651. count = 0;
  652. /*
  653. * If phandle is 0, then it is an empty entry with no
  654. * arguments. Skip forward to the next entry.
  655. */
  656. phandle = be32_to_cpup(list++);
  657. if (phandle) {
  658. /*
  659. * Find the provider node and parse the #*-cells
  660. * property to determine the argument length.
  661. *
  662. * This is not needed if the cell count is hard-coded
  663. * (i.e. cells_name not set, but cell_count is set),
  664. * except when we're going to return the found node
  665. * below.
  666. */
  667. if (cells_name || cur_index == index) {
  668. node = fdt_node_offset_by_phandle(blob,
  669. phandle);
  670. if (!node) {
  671. debug("%s: could not find phandle\n",
  672. fdt_get_name(blob, src_node,
  673. NULL));
  674. goto err;
  675. }
  676. }
  677. if (cells_name) {
  678. count = fdtdec_get_int(blob, node, cells_name,
  679. -1);
  680. if (count == -1) {
  681. debug("%s: could not get %s for %s\n",
  682. fdt_get_name(blob, src_node,
  683. NULL),
  684. cells_name,
  685. fdt_get_name(blob, node,
  686. NULL));
  687. goto err;
  688. }
  689. } else {
  690. count = cell_count;
  691. }
  692. /*
  693. * Make sure that the arguments actually fit in the
  694. * remaining property data length
  695. */
  696. if (list + count > list_end) {
  697. debug("%s: arguments longer than property\n",
  698. fdt_get_name(blob, src_node, NULL));
  699. goto err;
  700. }
  701. }
  702. /*
  703. * All of the error cases above bail out of the loop, so at
  704. * this point, the parsing is successful. If the requested
  705. * index matches, then fill the out_args structure and return,
  706. * or return -ENOENT for an empty entry.
  707. */
  708. rc = -ENOENT;
  709. if (cur_index == index) {
  710. if (!phandle)
  711. goto err;
  712. if (out_args) {
  713. int i;
  714. if (count > MAX_PHANDLE_ARGS) {
  715. debug("%s: too many arguments %d\n",
  716. fdt_get_name(blob, src_node,
  717. NULL), count);
  718. count = MAX_PHANDLE_ARGS;
  719. }
  720. out_args->node = node;
  721. out_args->args_count = count;
  722. for (i = 0; i < count; i++) {
  723. out_args->args[i] =
  724. be32_to_cpup(list++);
  725. }
  726. }
  727. /* Found it! return success */
  728. return 0;
  729. }
  730. node = -1;
  731. list += count;
  732. cur_index++;
  733. }
  734. /*
  735. * Result will be one of:
  736. * -ENOENT : index is for empty phandle
  737. * -EINVAL : parsing error on data
  738. * [1..n] : Number of phandle (count mode; when index = -1)
  739. */
  740. rc = index < 0 ? cur_index : -ENOENT;
  741. err:
  742. return rc;
  743. }
  744. int fdtdec_get_child_count(const void *blob, int node)
  745. {
  746. int subnode;
  747. int num = 0;
  748. fdt_for_each_subnode(subnode, blob, node)
  749. num++;
  750. return num;
  751. }
  752. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  753. u8 *array, int count)
  754. {
  755. const u8 *cell;
  756. int err;
  757. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  758. if (!err)
  759. memcpy(array, cell, count);
  760. return err;
  761. }
  762. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  763. const char *prop_name, int count)
  764. {
  765. const u8 *cell;
  766. int err;
  767. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  768. if (err)
  769. return NULL;
  770. return cell;
  771. }
  772. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  773. int default_val)
  774. {
  775. int config_node;
  776. debug("%s: %s\n", __func__, prop_name);
  777. config_node = fdt_path_offset(blob, "/config");
  778. if (config_node < 0)
  779. return default_val;
  780. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  781. }
  782. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  783. {
  784. int config_node;
  785. const void *prop;
  786. debug("%s: %s\n", __func__, prop_name);
  787. config_node = fdt_path_offset(blob, "/config");
  788. if (config_node < 0)
  789. return 0;
  790. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  791. return prop != NULL;
  792. }
  793. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  794. {
  795. const char *nodep;
  796. int nodeoffset;
  797. int len;
  798. debug("%s: %s\n", __func__, prop_name);
  799. nodeoffset = fdt_path_offset(blob, "/config");
  800. if (nodeoffset < 0)
  801. return NULL;
  802. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  803. if (!nodep)
  804. return NULL;
  805. return (char *)nodep;
  806. }
  807. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  808. {
  809. u64 number = 0;
  810. while (cells--)
  811. number = (number << 32) | fdt32_to_cpu(*ptr++);
  812. return number;
  813. }
  814. int fdt_get_resource(const void *fdt, int node, const char *property,
  815. unsigned int index, struct fdt_resource *res)
  816. {
  817. const fdt32_t *ptr, *end;
  818. int na, ns, len, parent;
  819. unsigned int i = 0;
  820. parent = fdt_parent_offset(fdt, node);
  821. if (parent < 0)
  822. return parent;
  823. na = fdt_address_cells(fdt, parent);
  824. ns = fdt_size_cells(fdt, parent);
  825. ptr = fdt_getprop(fdt, node, property, &len);
  826. if (!ptr)
  827. return len;
  828. end = ptr + len / sizeof(*ptr);
  829. while (ptr + na + ns <= end) {
  830. if (i == index) {
  831. res->start = fdtdec_get_number(ptr, na);
  832. res->end = res->start;
  833. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  834. return 0;
  835. }
  836. ptr += na + ns;
  837. i++;
  838. }
  839. return -FDT_ERR_NOTFOUND;
  840. }
  841. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  842. const char *prop_names, const char *name,
  843. struct fdt_resource *res)
  844. {
  845. int index;
  846. index = fdt_stringlist_search(fdt, node, prop_names, name);
  847. if (index < 0)
  848. return index;
  849. return fdt_get_resource(fdt, node, property, index, res);
  850. }
  851. static int decode_timing_property(const void *blob, int node, const char *name,
  852. struct timing_entry *result)
  853. {
  854. int length, ret = 0;
  855. const u32 *prop;
  856. prop = fdt_getprop(blob, node, name, &length);
  857. if (!prop) {
  858. debug("%s: could not find property %s\n",
  859. fdt_get_name(blob, node, NULL), name);
  860. return length;
  861. }
  862. if (length == sizeof(u32)) {
  863. result->typ = fdtdec_get_int(blob, node, name, 0);
  864. result->min = result->typ;
  865. result->max = result->typ;
  866. } else {
  867. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  868. }
  869. return ret;
  870. }
  871. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  872. struct display_timing *dt)
  873. {
  874. int i, node, timings_node;
  875. u32 val = 0;
  876. int ret = 0;
  877. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  878. if (timings_node < 0)
  879. return timings_node;
  880. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  881. node > 0 && i != index;
  882. node = fdt_next_subnode(blob, node))
  883. i++;
  884. if (node < 0)
  885. return node;
  886. memset(dt, 0, sizeof(*dt));
  887. ret |= decode_timing_property(blob, node, "hback-porch",
  888. &dt->hback_porch);
  889. ret |= decode_timing_property(blob, node, "hfront-porch",
  890. &dt->hfront_porch);
  891. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  892. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  893. ret |= decode_timing_property(blob, node, "vback-porch",
  894. &dt->vback_porch);
  895. ret |= decode_timing_property(blob, node, "vfront-porch",
  896. &dt->vfront_porch);
  897. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  898. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  899. ret |= decode_timing_property(blob, node, "clock-frequency",
  900. &dt->pixelclock);
  901. dt->flags = 0;
  902. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  903. if (val != -1) {
  904. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  905. DISPLAY_FLAGS_VSYNC_LOW;
  906. }
  907. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  908. if (val != -1) {
  909. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  910. DISPLAY_FLAGS_HSYNC_LOW;
  911. }
  912. val = fdtdec_get_int(blob, node, "de-active", -1);
  913. if (val != -1) {
  914. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  915. DISPLAY_FLAGS_DE_LOW;
  916. }
  917. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  918. if (val != -1) {
  919. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  920. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  921. }
  922. if (fdtdec_get_bool(blob, node, "interlaced"))
  923. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  924. if (fdtdec_get_bool(blob, node, "doublescan"))
  925. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  926. if (fdtdec_get_bool(blob, node, "doubleclk"))
  927. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  928. return ret;
  929. }
  930. int fdtdec_setup_mem_size_base_fdt(const void *blob)
  931. {
  932. int ret, mem;
  933. struct fdt_resource res;
  934. mem = fdt_path_offset(blob, "/memory");
  935. if (mem < 0) {
  936. debug("%s: Missing /memory node\n", __func__);
  937. return -EINVAL;
  938. }
  939. ret = fdt_get_resource(blob, mem, "reg", 0, &res);
  940. if (ret != 0) {
  941. debug("%s: Unable to decode first memory bank\n", __func__);
  942. return -EINVAL;
  943. }
  944. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  945. gd->ram_base = (unsigned long)res.start;
  946. debug("%s: Initial DRAM size %llx\n", __func__,
  947. (unsigned long long)gd->ram_size);
  948. return 0;
  949. }
  950. int fdtdec_setup_mem_size_base(void)
  951. {
  952. return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
  953. }
  954. #if defined(CONFIG_NR_DRAM_BANKS)
  955. static int get_next_memory_node(const void *blob, int mem)
  956. {
  957. do {
  958. mem = fdt_node_offset_by_prop_value(blob, mem,
  959. "device_type", "memory", 7);
  960. } while (!fdtdec_get_is_enabled(blob, mem));
  961. return mem;
  962. }
  963. int fdtdec_setup_memory_banksize_fdt(const void *blob)
  964. {
  965. int bank, ret, mem, reg = 0;
  966. struct fdt_resource res;
  967. mem = get_next_memory_node(blob, -1);
  968. if (mem < 0) {
  969. debug("%s: Missing /memory node\n", __func__);
  970. return -EINVAL;
  971. }
  972. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  973. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  974. if (ret == -FDT_ERR_NOTFOUND) {
  975. reg = 0;
  976. mem = get_next_memory_node(blob, mem);
  977. if (mem == -FDT_ERR_NOTFOUND)
  978. break;
  979. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  980. if (ret == -FDT_ERR_NOTFOUND)
  981. break;
  982. }
  983. if (ret != 0) {
  984. return -EINVAL;
  985. }
  986. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  987. gd->bd->bi_dram[bank].size =
  988. (phys_size_t)(res.end - res.start + 1);
  989. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  990. __func__, bank,
  991. (unsigned long long)gd->bd->bi_dram[bank].start,
  992. (unsigned long long)gd->bd->bi_dram[bank].size);
  993. }
  994. return 0;
  995. }
  996. int fdtdec_setup_memory_banksize(void)
  997. {
  998. return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
  999. }
  1000. #endif
  1001. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1002. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1003. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1004. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1005. {
  1006. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1007. bool gzip = 0, lzo = 0;
  1008. ulong sz_in = sz_src;
  1009. void *dst;
  1010. int rc;
  1011. if (CONFIG_IS_ENABLED(GZIP))
  1012. if (gzip_parse_header(src, sz_in) >= 0)
  1013. gzip = 1;
  1014. if (CONFIG_IS_ENABLED(LZO))
  1015. if (!gzip && lzop_is_valid_header(src))
  1016. lzo = 1;
  1017. if (!gzip && !lzo)
  1018. return -EBADMSG;
  1019. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1020. dst = malloc(sz_out);
  1021. if (!dst) {
  1022. puts("uncompress_blob: Unable to allocate memory\n");
  1023. return -ENOMEM;
  1024. }
  1025. } else {
  1026. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1027. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1028. # else
  1029. return -ENOTSUPP;
  1030. # endif
  1031. }
  1032. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1033. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1034. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1035. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1036. else
  1037. hang();
  1038. if (rc < 0) {
  1039. /* not a valid compressed blob */
  1040. puts("uncompress_blob: Unable to uncompress\n");
  1041. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1042. free(dst);
  1043. return -EBADMSG;
  1044. }
  1045. *dstp = dst;
  1046. return 0;
  1047. }
  1048. # else
  1049. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1050. {
  1051. *dstp = (void *)src;
  1052. return 0;
  1053. }
  1054. # endif
  1055. #endif
  1056. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1057. /*
  1058. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1059. * provide and/or fixup the fdt.
  1060. */
  1061. __weak void *board_fdt_blob_setup(void)
  1062. {
  1063. void *fdt_blob = NULL;
  1064. #ifdef CONFIG_SPL_BUILD
  1065. /* FDT is at end of BSS unless it is in a different memory region */
  1066. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1067. fdt_blob = (ulong *)&_image_binary_end;
  1068. else
  1069. fdt_blob = (ulong *)&__bss_end;
  1070. #else
  1071. /* FDT is at end of image */
  1072. fdt_blob = (ulong *)&_end;
  1073. #endif
  1074. return fdt_blob;
  1075. }
  1076. #endif
  1077. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1078. {
  1079. const char *path;
  1080. int offset, err;
  1081. if (!is_valid_ethaddr(mac))
  1082. return -EINVAL;
  1083. path = fdt_get_alias(fdt, "ethernet");
  1084. if (!path)
  1085. return 0;
  1086. debug("ethernet alias found: %s\n", path);
  1087. offset = fdt_path_offset(fdt, path);
  1088. if (offset < 0) {
  1089. debug("ethernet alias points to absent node %s\n", path);
  1090. return -ENOENT;
  1091. }
  1092. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1093. if (err < 0)
  1094. return err;
  1095. debug("MAC address: %pM\n", mac);
  1096. return 0;
  1097. }
  1098. static int fdtdec_init_reserved_memory(void *blob)
  1099. {
  1100. int na, ns, node, err;
  1101. fdt32_t value;
  1102. /* inherit #address-cells and #size-cells from the root node */
  1103. na = fdt_address_cells(blob, 0);
  1104. ns = fdt_size_cells(blob, 0);
  1105. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1106. if (node < 0)
  1107. return node;
  1108. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1109. if (err < 0)
  1110. return err;
  1111. value = cpu_to_fdt32(ns);
  1112. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1113. if (err < 0)
  1114. return err;
  1115. value = cpu_to_fdt32(na);
  1116. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1117. if (err < 0)
  1118. return err;
  1119. return node;
  1120. }
  1121. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1122. const struct fdt_memory *carveout,
  1123. uint32_t *phandlep)
  1124. {
  1125. fdt32_t cells[4] = {}, *ptr = cells;
  1126. uint32_t upper, lower, phandle;
  1127. int parent, node, na, ns, err;
  1128. fdt_size_t size;
  1129. char name[64];
  1130. /* create an empty /reserved-memory node if one doesn't exist */
  1131. parent = fdt_path_offset(blob, "/reserved-memory");
  1132. if (parent < 0) {
  1133. parent = fdtdec_init_reserved_memory(blob);
  1134. if (parent < 0)
  1135. return parent;
  1136. }
  1137. /* only 1 or 2 #address-cells and #size-cells are supported */
  1138. na = fdt_address_cells(blob, parent);
  1139. if (na < 1 || na > 2)
  1140. return -FDT_ERR_BADNCELLS;
  1141. ns = fdt_size_cells(blob, parent);
  1142. if (ns < 1 || ns > 2)
  1143. return -FDT_ERR_BADNCELLS;
  1144. /* find a matching node and return the phandle to that */
  1145. fdt_for_each_subnode(node, blob, parent) {
  1146. const char *name = fdt_get_name(blob, node, NULL);
  1147. phys_addr_t addr, size;
  1148. addr = fdtdec_get_addr_size(blob, node, "reg", &size);
  1149. if (addr == FDT_ADDR_T_NONE) {
  1150. debug("failed to read address/size for %s\n", name);
  1151. continue;
  1152. }
  1153. if (addr == carveout->start && (addr + size) == carveout->end) {
  1154. *phandlep = fdt_get_phandle(blob, node);
  1155. return 0;
  1156. }
  1157. }
  1158. /*
  1159. * Unpack the start address and generate the name of the new node
  1160. * base on the basename and the unit-address.
  1161. */
  1162. upper = upper_32_bits(carveout->start);
  1163. lower = lower_32_bits(carveout->start);
  1164. if (na > 1 && upper > 0)
  1165. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1166. lower);
  1167. else {
  1168. if (upper > 0) {
  1169. debug("address %08x:%08x exceeds addressable space\n",
  1170. upper, lower);
  1171. return -FDT_ERR_BADVALUE;
  1172. }
  1173. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1174. }
  1175. node = fdt_add_subnode(blob, parent, name);
  1176. if (node < 0)
  1177. return node;
  1178. err = fdt_generate_phandle(blob, &phandle);
  1179. if (err < 0)
  1180. return err;
  1181. err = fdtdec_set_phandle(blob, node, phandle);
  1182. if (err < 0)
  1183. return err;
  1184. /* store one or two address cells */
  1185. if (na > 1)
  1186. *ptr++ = cpu_to_fdt32(upper);
  1187. *ptr++ = cpu_to_fdt32(lower);
  1188. /* store one or two size cells */
  1189. size = carveout->end - carveout->start + 1;
  1190. upper = upper_32_bits(size);
  1191. lower = lower_32_bits(size);
  1192. if (ns > 1)
  1193. *ptr++ = cpu_to_fdt32(upper);
  1194. *ptr++ = cpu_to_fdt32(lower);
  1195. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1196. if (err < 0)
  1197. return err;
  1198. /* return the phandle for the new node for the caller to use */
  1199. if (phandlep)
  1200. *phandlep = phandle;
  1201. return 0;
  1202. }
  1203. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1204. unsigned int index, struct fdt_memory *carveout)
  1205. {
  1206. const fdt32_t *prop;
  1207. uint32_t phandle;
  1208. int offset, len;
  1209. fdt_size_t size;
  1210. offset = fdt_path_offset(blob, node);
  1211. if (offset < 0)
  1212. return offset;
  1213. prop = fdt_getprop(blob, offset, name, &len);
  1214. if (!prop) {
  1215. debug("failed to get %s for %s\n", name, node);
  1216. return -FDT_ERR_NOTFOUND;
  1217. }
  1218. if ((len % sizeof(phandle)) != 0) {
  1219. debug("invalid phandle property\n");
  1220. return -FDT_ERR_BADPHANDLE;
  1221. }
  1222. if (len < (sizeof(phandle) * (index + 1))) {
  1223. debug("invalid phandle index\n");
  1224. return -FDT_ERR_BADPHANDLE;
  1225. }
  1226. phandle = fdt32_to_cpu(prop[index]);
  1227. offset = fdt_node_offset_by_phandle(blob, phandle);
  1228. if (offset < 0) {
  1229. debug("failed to find node for phandle %u\n", phandle);
  1230. return offset;
  1231. }
  1232. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1233. "reg", 0, &size,
  1234. true);
  1235. if (carveout->start == FDT_ADDR_T_NONE) {
  1236. debug("failed to read address/size from \"reg\" property\n");
  1237. return -FDT_ERR_NOTFOUND;
  1238. }
  1239. carveout->end = carveout->start + size - 1;
  1240. return 0;
  1241. }
  1242. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1243. unsigned int index, const char *name,
  1244. const struct fdt_memory *carveout)
  1245. {
  1246. uint32_t phandle;
  1247. int err, offset;
  1248. fdt32_t value;
  1249. /* XXX implement support for multiple phandles */
  1250. if (index > 0) {
  1251. debug("invalid index %u\n", index);
  1252. return -FDT_ERR_BADOFFSET;
  1253. }
  1254. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
  1255. if (err < 0) {
  1256. debug("failed to add reserved memory: %d\n", err);
  1257. return err;
  1258. }
  1259. offset = fdt_path_offset(blob, node);
  1260. if (offset < 0) {
  1261. debug("failed to find offset for node %s: %d\n", node, offset);
  1262. return offset;
  1263. }
  1264. value = cpu_to_fdt32(phandle);
  1265. err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
  1266. if (err < 0) {
  1267. debug("failed to set %s property for node %s: %d\n", prop_name,
  1268. node, err);
  1269. return err;
  1270. }
  1271. return 0;
  1272. }
  1273. int fdtdec_setup(void)
  1274. {
  1275. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1276. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1277. void *fdt_blob;
  1278. # endif
  1279. # ifdef CONFIG_OF_EMBED
  1280. /* Get a pointer to the FDT */
  1281. # ifdef CONFIG_SPL_BUILD
  1282. gd->fdt_blob = __dtb_dt_spl_begin;
  1283. # else
  1284. gd->fdt_blob = __dtb_dt_begin;
  1285. # endif
  1286. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1287. /* Allow the board to override the fdt address. */
  1288. gd->fdt_blob = board_fdt_blob_setup();
  1289. # elif defined(CONFIG_OF_HOSTFILE)
  1290. if (sandbox_read_fdt_from_file()) {
  1291. puts("Failed to read control FDT\n");
  1292. return -1;
  1293. }
  1294. # endif
  1295. # ifndef CONFIG_SPL_BUILD
  1296. /* Allow the early environment to override the fdt address */
  1297. # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
  1298. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1299. # else
  1300. gd->fdt_blob = map_sysmem
  1301. (env_get_ulong("fdtcontroladdr", 16,
  1302. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1303. # endif
  1304. # endif
  1305. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1306. /*
  1307. * Try and uncompress the blob.
  1308. * Unfortunately there is no way to know how big the input blob really
  1309. * is. So let us set the maximum input size arbitrarily high. 16MB
  1310. * ought to be more than enough for packed DTBs.
  1311. */
  1312. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1313. gd->fdt_blob = fdt_blob;
  1314. /*
  1315. * Check if blob is a FIT images containings DTBs.
  1316. * If so, pick the most relevant
  1317. */
  1318. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1319. if (fdt_blob) {
  1320. gd->multi_dtb_fit = gd->fdt_blob;
  1321. gd->fdt_blob = fdt_blob;
  1322. }
  1323. # endif
  1324. #endif
  1325. return fdtdec_prepare_fdt();
  1326. }
  1327. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1328. int fdtdec_resetup(int *rescan)
  1329. {
  1330. void *fdt_blob;
  1331. /*
  1332. * If the current DTB is part of a compressed FIT image,
  1333. * try to locate the best match from the uncompressed
  1334. * FIT image stillpresent there. Save the time and space
  1335. * required to uncompress it again.
  1336. */
  1337. if (gd->multi_dtb_fit) {
  1338. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1339. if (fdt_blob == gd->fdt_blob) {
  1340. /*
  1341. * The best match did not change. no need to tear down
  1342. * the DM and rescan the fdt.
  1343. */
  1344. *rescan = 0;
  1345. return 0;
  1346. }
  1347. *rescan = 1;
  1348. gd->fdt_blob = fdt_blob;
  1349. return fdtdec_prepare_fdt();
  1350. }
  1351. /*
  1352. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1353. * not a FIT image containings DTB, but a single DTB. There is no need
  1354. * to teard down DM and rescan the DT in this case.
  1355. */
  1356. *rescan = 0;
  1357. return 0;
  1358. }
  1359. #endif
  1360. #ifdef CONFIG_NR_DRAM_BANKS
  1361. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1362. phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
  1363. {
  1364. int addr_cells, size_cells;
  1365. const u32 *cell, *end;
  1366. u64 total_size, size, addr;
  1367. int node, child;
  1368. bool auto_size;
  1369. int bank;
  1370. int len;
  1371. debug("%s: board_id=%d\n", __func__, board_id);
  1372. if (!area)
  1373. area = "/memory";
  1374. node = fdt_path_offset(blob, area);
  1375. if (node < 0) {
  1376. debug("No %s node found\n", area);
  1377. return -ENOENT;
  1378. }
  1379. cell = fdt_getprop(blob, node, "reg", &len);
  1380. if (!cell) {
  1381. debug("No reg property found\n");
  1382. return -ENOENT;
  1383. }
  1384. addr_cells = fdt_address_cells(blob, node);
  1385. size_cells = fdt_size_cells(blob, node);
  1386. /* Check the board id and mask */
  1387. for (child = fdt_first_subnode(blob, node);
  1388. child >= 0;
  1389. child = fdt_next_subnode(blob, child)) {
  1390. int match_mask, match_value;
  1391. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1392. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1393. if (match_value >= 0 &&
  1394. ((board_id & match_mask) == match_value)) {
  1395. /* Found matching mask */
  1396. debug("Found matching mask %d\n", match_mask);
  1397. node = child;
  1398. cell = fdt_getprop(blob, node, "reg", &len);
  1399. if (!cell) {
  1400. debug("No memory-banks property found\n");
  1401. return -EINVAL;
  1402. }
  1403. break;
  1404. }
  1405. }
  1406. /* Note: if no matching subnode was found we use the parent node */
  1407. if (bd) {
  1408. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1409. CONFIG_NR_DRAM_BANKS);
  1410. }
  1411. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1412. total_size = 0;
  1413. end = cell + len / 4 - addr_cells - size_cells;
  1414. debug("cell at %p, end %p\n", cell, end);
  1415. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1416. if (cell > end)
  1417. break;
  1418. addr = 0;
  1419. if (addr_cells == 2)
  1420. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1421. addr += fdt32_to_cpu(*cell++);
  1422. if (bd)
  1423. bd->bi_dram[bank].start = addr;
  1424. if (basep && !bank)
  1425. *basep = (phys_addr_t)addr;
  1426. size = 0;
  1427. if (size_cells == 2)
  1428. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1429. size += fdt32_to_cpu(*cell++);
  1430. if (auto_size) {
  1431. u64 new_size;
  1432. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1433. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1434. if (new_size == size) {
  1435. debug("OK\n");
  1436. } else {
  1437. debug("sized to %llx\n", new_size);
  1438. size = new_size;
  1439. }
  1440. }
  1441. if (bd)
  1442. bd->bi_dram[bank].size = size;
  1443. total_size += size;
  1444. }
  1445. debug("Memory size %llu\n", total_size);
  1446. if (sizep)
  1447. *sizep = (phys_size_t)total_size;
  1448. return 0;
  1449. }
  1450. #endif /* CONFIG_NR_DRAM_BANKS */
  1451. #endif /* !USE_HOSTCC */