colibri_pxa270.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Toradex Colibri PXA270 Support
  4. *
  5. * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
  6. * Copyright (C) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
  7. */
  8. #include <common.h>
  9. #include <cpu_func.h>
  10. #include <dm.h>
  11. #include <asm/arch/hardware.h>
  12. #include <asm/arch/pxa.h>
  13. #include <asm/arch/regs-mmc.h>
  14. #include <asm/arch/regs-uart.h>
  15. #include <asm/io.h>
  16. #include <dm/platdata.h>
  17. #include <dm/platform_data/serial_pxa.h>
  18. #include <netdev.h>
  19. #include <serial.h>
  20. #include <usb.h>
  21. #include <asm/mach-types.h>
  22. #include "../common/tdx-common.h"
  23. DECLARE_GLOBAL_DATA_PTR;
  24. int board_init(void)
  25. {
  26. /* We have RAM, disable cache */
  27. dcache_disable();
  28. icache_disable();
  29. /* arch number of Toradex Colibri PXA270 */
  30. gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
  31. /* adress of boot parameters */
  32. gd->bd->bi_boot_params = 0xa0000100;
  33. return 0;
  34. }
  35. int checkboard(void)
  36. {
  37. puts("Model: Toradex Colibri PXA270\n");
  38. return 0;
  39. }
  40. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  41. int ft_board_setup(void *blob, bd_t *bd)
  42. {
  43. return ft_common_board_setup(blob, bd);
  44. }
  45. #endif
  46. int dram_init(void)
  47. {
  48. pxa2xx_dram_init();
  49. gd->ram_size = PHYS_SDRAM_1_SIZE;
  50. return 0;
  51. }
  52. #ifdef CONFIG_CMD_USB
  53. int board_usb_init(int index, enum usb_init_type init)
  54. {
  55. writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
  56. ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
  57. UHCHR);
  58. writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
  59. while (UHCHR & UHCHR_FSBIR)
  60. ;
  61. writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
  62. writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
  63. /* Clear any OTG Pin Hold */
  64. if (readl(PSSR) & PSSR_OTGPH)
  65. writel(readl(PSSR) | PSSR_OTGPH, PSSR);
  66. writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
  67. writel(readl(UHCRHDA) | 0x100, UHCRHDA);
  68. /* Set port power control mask bits, only 3 ports. */
  69. writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
  70. /* enable port 2 */
  71. writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
  72. UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
  73. return 0;
  74. }
  75. int board_usb_cleanup(int index, enum usb_init_type init)
  76. {
  77. return 0;
  78. }
  79. void usb_board_stop(void)
  80. {
  81. writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
  82. udelay(11);
  83. writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
  84. writel(readl(UHCCOMS) | 1, UHCCOMS);
  85. udelay(10);
  86. writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
  87. return;
  88. }
  89. #endif
  90. #ifdef CONFIG_DRIVER_DM9000
  91. int board_eth_init(bd_t *bis)
  92. {
  93. return dm9000_initialize(bis);
  94. }
  95. #endif
  96. #ifdef CONFIG_CMD_MMC
  97. int board_mmc_init(bd_t *bis)
  98. {
  99. pxa_mmc_register(0);
  100. return 0;
  101. }
  102. #endif
  103. static const struct pxa_serial_platdata serial_platdata = {
  104. .base = (struct pxa_uart_regs *)FFUART_BASE,
  105. .port = FFUART_INDEX,
  106. .baudrate = CONFIG_BAUDRATE,
  107. };
  108. U_BOOT_DEVICE(pxa_serials) = {
  109. .name = "serial_pxa",
  110. .platdata = &serial_platdata,
  111. };