cache.c 1.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Vladimir Zapolskiy <vz@mleia.com>
  4. * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  5. */
  6. #include <common.h>
  7. #include <command.h>
  8. #include <cpu_func.h>
  9. #include <asm/io.h>
  10. #include <asm/processor.h>
  11. #include <asm/system.h>
  12. #define CACHE_VALID 1
  13. #define CACHE_UPDATED 2
  14. static inline void cache_wback_all(void)
  15. {
  16. unsigned long addr, data, i, j;
  17. for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
  18. for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
  19. addr = CACHE_OC_ADDRESS_ARRAY
  20. | (j << CACHE_OC_WAY_SHIFT)
  21. | (i << CACHE_OC_ENTRY_SHIFT);
  22. data = inl(addr);
  23. if (data & CACHE_UPDATED) {
  24. data &= ~CACHE_UPDATED;
  25. outl(data, addr);
  26. }
  27. }
  28. }
  29. }
  30. #define CACHE_ENABLE 0
  31. #define CACHE_DISABLE 1
  32. static int cache_control(unsigned int cmd)
  33. {
  34. unsigned long ccr;
  35. jump_to_P2();
  36. ccr = inl(CCR);
  37. if (ccr & CCR_CACHE_ENABLE)
  38. cache_wback_all();
  39. if (cmd == CACHE_DISABLE)
  40. outl(CCR_CACHE_STOP, CCR);
  41. else
  42. outl(CCR_CACHE_INIT, CCR);
  43. back_to_P1();
  44. return 0;
  45. }
  46. void flush_dcache_range(unsigned long start, unsigned long end)
  47. {
  48. u32 v;
  49. start &= ~(L1_CACHE_BYTES - 1);
  50. for (v = start; v < end; v += L1_CACHE_BYTES) {
  51. asm volatile ("ocbp %0" : /* no output */
  52. : "m" (__m(v)));
  53. }
  54. }
  55. void invalidate_dcache_range(unsigned long start, unsigned long end)
  56. {
  57. u32 v;
  58. start &= ~(L1_CACHE_BYTES - 1);
  59. for (v = start; v < end; v += L1_CACHE_BYTES) {
  60. asm volatile ("ocbi %0" : /* no output */
  61. : "m" (__m(v)));
  62. }
  63. }
  64. void flush_cache(unsigned long addr, unsigned long size)
  65. {
  66. flush_dcache_range(addr , addr + size);
  67. }
  68. void icache_enable(void)
  69. {
  70. cache_control(CACHE_ENABLE);
  71. }
  72. void icache_disable(void)
  73. {
  74. cache_control(CACHE_DISABLE);
  75. }
  76. int icache_status(void)
  77. {
  78. return 0;
  79. }
  80. void dcache_enable(void)
  81. {
  82. }
  83. void dcache_disable(void)
  84. {
  85. }
  86. int dcache_status(void)
  87. {
  88. return 0;
  89. }