spl.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014-2015 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <env.h>
  8. #include <spl.h>
  9. #include <asm/io.h>
  10. #include <fsl_ifc.h>
  11. #include <i2c.h>
  12. #include <fsl_csu.h>
  13. #include <asm/arch/fdt.h>
  14. #include <asm/arch/ppa.h>
  15. #include <asm/arch/soc.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. u32 spl_boot_device(void)
  18. {
  19. #ifdef CONFIG_SPL_MMC_SUPPORT
  20. return BOOT_DEVICE_MMC1;
  21. #endif
  22. #ifdef CONFIG_SPL_NAND_SUPPORT
  23. return BOOT_DEVICE_NAND;
  24. #endif
  25. #ifdef CONFIG_QSPI_BOOT
  26. return BOOT_DEVICE_NOR;
  27. #endif
  28. return 0;
  29. }
  30. #ifdef CONFIG_SPL_BUILD
  31. void spl_board_init(void)
  32. {
  33. #if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
  34. /*
  35. * In case of Secure Boot, the IBR configures the SMMU
  36. * to allow only Secure transactions.
  37. * SMMU must be reset in bypass mode.
  38. * Set the ClientPD bit and Clear the USFCFG Bit
  39. */
  40. u32 val;
  41. val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
  42. out_le32(SMMU_SCR0, val);
  43. val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
  44. out_le32(SMMU_NSCR0, val);
  45. #endif
  46. #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
  47. enable_layerscape_ns_access();
  48. #endif
  49. #ifdef CONFIG_SPL_FSL_LS_PPA
  50. ppa_init();
  51. #endif
  52. }
  53. void board_init_f(ulong dummy)
  54. {
  55. icache_enable();
  56. /* Clear global data */
  57. memset((void *)gd, 0, sizeof(gd_t));
  58. board_early_init_f();
  59. timer_init();
  60. #ifdef CONFIG_ARCH_LS2080A
  61. env_init();
  62. #endif
  63. get_clocks();
  64. preloader_console_init();
  65. spl_set_bd();
  66. #ifdef CONFIG_SPL_I2C_SUPPORT
  67. i2c_init_all();
  68. #endif
  69. #ifdef CONFIG_VID
  70. init_func_vid();
  71. #endif
  72. dram_init();
  73. #ifdef CONFIG_SPL_FSL_LS_PPA
  74. #ifndef CONFIG_SYS_MEM_RESERVE_SECURE
  75. #error Need secure RAM for PPA
  76. #endif
  77. /*
  78. * Secure memory location is determined in dram_init_banksize().
  79. * gd->ram_size is deducted by the size of secure ram.
  80. */
  81. dram_init_banksize();
  82. /*
  83. * After dram_init_bank_size(), we know U-Boot only uses the first
  84. * memory bank regardless how big the memory is.
  85. */
  86. gd->ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  87. /*
  88. * If PPA is loaded, U-Boot will resume running at EL2.
  89. * Cache and MMU will be enabled. Need a place for TLB.
  90. * U-Boot will be relocated to the end of available memory
  91. * in first bank. At this point, we cannot know how much
  92. * memory U-Boot uses. Put TLB table lower by SPL_TLB_SETBACK
  93. * to avoid overlapping. As soon as the RAM version U-Boot sets
  94. * up new MMU, this space is no longer needed.
  95. */
  96. gd->ram_top -= SPL_TLB_SETBACK;
  97. gd->arch.tlb_size = PGTABLE_SIZE;
  98. gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1);
  99. gd->arch.tlb_allocated = gd->arch.tlb_addr;
  100. #endif /* CONFIG_SPL_FSL_LS_PPA */
  101. #if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT)
  102. qspi_ahb_init();
  103. #endif
  104. }
  105. #ifdef CONFIG_SPL_OS_BOOT
  106. /*
  107. * Return
  108. * 0 if booting into OS is selected
  109. * 1 if booting into U-Boot is selected
  110. */
  111. int spl_start_uboot(void)
  112. {
  113. env_init();
  114. if (env_get_yesno("boot_os") != 0)
  115. return 0;
  116. return 1;
  117. }
  118. #endif /* CONFIG_SPL_OS_BOOT */
  119. #ifdef CONFIG_SPL_LOAD_FIT
  120. int board_fit_config_name_match(const char *name)
  121. {
  122. /* Just empty function now - can't decide what to choose */
  123. debug("%s: %s\n", __func__, name);
  124. return 0;
  125. }
  126. #endif
  127. #endif /* CONFIG_SPL_BUILD */