exception_level.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Switch to non-secure mode
  4. *
  5. * Copyright (c) 2018 Heinrich Schuchardt
  6. *
  7. * This module contains the ARMv8 specific code required to adjust the exception
  8. * level before booting an operating system.
  9. */
  10. #include <common.h>
  11. #include <bootm.h>
  12. #include <cpu_func.h>
  13. #include <asm/setjmp.h>
  14. /**
  15. * entry_non_secure() - entry point when switching to non-secure mode
  16. *
  17. * When switching to non-secure mode switch_to_non_secure_mode() calls this
  18. * function passing a jump buffer. We use this jump buffer to restore the
  19. * original stack and register state.
  20. *
  21. * @non_secure_jmp: jump buffer for restoring stack and registers
  22. */
  23. static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
  24. {
  25. dcache_enable();
  26. debug("Reached non-secure mode\n");
  27. /* Restore stack and registers saved in switch_to_non_secure_mode() */
  28. longjmp(non_secure_jmp, 1);
  29. }
  30. /**
  31. * switch_to_non_secure_mode() - switch to non-secure mode
  32. *
  33. * Exception level EL3 is meant to be used by the secure monitor only (ARM
  34. * trusted firmware being one embodiment). The operating system shall be
  35. * started at exception level EL2. So here we check the exception level
  36. * and switch it if necessary.
  37. */
  38. void switch_to_non_secure_mode(void)
  39. {
  40. struct jmp_buf_data non_secure_jmp;
  41. /* On AArch64 we need to make sure we call our payload in < EL3 */
  42. if (current_el() == 3) {
  43. if (setjmp(&non_secure_jmp))
  44. return;
  45. dcache_disable(); /* flush cache before switch to EL2 */
  46. /* Move into EL2 and keep running there */
  47. armv8_switch_to_el2((uintptr_t)&non_secure_jmp, 0, 0, 0,
  48. (uintptr_t)entry_non_secure, ES_TO_AARCH64);
  49. }
  50. }