cpu.c 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2004 Texas Insturments
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2002
  10. * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  11. */
  12. /*
  13. * CPU specific code
  14. */
  15. #include <common.h>
  16. #include <command.h>
  17. #include <cpu_func.h>
  18. #include <asm/system.h>
  19. static void cache_flush(void);
  20. int cleanup_before_linux (void)
  21. {
  22. /*
  23. * this function is called just before we call linux
  24. * it prepares the processor for linux
  25. *
  26. * we turn off caches etc ...
  27. */
  28. disable_interrupts ();
  29. /* turn off I/D-cache */
  30. icache_disable();
  31. dcache_disable();
  32. /* flush I/D-cache */
  33. cache_flush();
  34. return 0;
  35. }
  36. static void cache_flush(void)
  37. {
  38. unsigned long i = 0;
  39. /* clean entire data cache */
  40. asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i));
  41. /* invalidate both caches and flush btb */
  42. asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i));
  43. /* mem barrier to sync things */
  44. asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
  45. }
  46. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  47. void invalidate_dcache_all(void)
  48. {
  49. asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
  50. }
  51. void flush_dcache_all(void)
  52. {
  53. asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (0));
  54. asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
  55. }
  56. void invalidate_dcache_range(unsigned long start, unsigned long stop)
  57. {
  58. if (!check_cache_range(start, stop))
  59. return;
  60. while (start < stop) {
  61. asm volatile("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
  62. start += CONFIG_SYS_CACHELINE_SIZE;
  63. }
  64. }
  65. void flush_dcache_range(unsigned long start, unsigned long stop)
  66. {
  67. if (!check_cache_range(start, stop))
  68. return;
  69. while (start < stop) {
  70. asm volatile("mcr p15, 0, %0, c7, c14, 1" : : "r" (start));
  71. start += CONFIG_SYS_CACHELINE_SIZE;
  72. }
  73. asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
  74. }
  75. #else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
  76. void invalidate_dcache_all(void)
  77. {
  78. }
  79. void flush_dcache_all(void)
  80. {
  81. }
  82. #endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
  83. #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  84. void enable_caches(void)
  85. {
  86. #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
  87. icache_enable();
  88. #endif
  89. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  90. dcache_enable();
  91. #endif
  92. }
  93. #endif