mx53smd.c 3.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2011 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <init.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/imx-regs.h>
  9. #include <asm/arch/sys_proto.h>
  10. #include <asm/arch/crm_regs.h>
  11. #include <asm/arch/clock.h>
  12. #include <asm/arch/iomux-mx53.h>
  13. #include <linux/errno.h>
  14. #include <netdev.h>
  15. #include <mmc.h>
  16. #include <fsl_esdhc_imx.h>
  17. #include <asm/gpio.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. int dram_init(void)
  20. {
  21. u32 size1, size2;
  22. size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
  23. size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
  24. gd->ram_size = size1 + size2;
  25. return 0;
  26. }
  27. int dram_init_banksize(void)
  28. {
  29. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  30. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  31. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  32. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  33. return 0;
  34. }
  35. #define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
  36. PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
  37. static void setup_iomux_uart(void)
  38. {
  39. static const iomux_v3_cfg_t uart_pads[] = {
  40. NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
  41. NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
  42. };
  43. imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
  44. }
  45. static void setup_iomux_fec(void)
  46. {
  47. static const iomux_v3_cfg_t fec_pads[] = {
  48. NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
  49. PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE),
  50. NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
  51. NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
  52. PAD_CTL_HYS | PAD_CTL_PKE),
  53. NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
  54. PAD_CTL_HYS | PAD_CTL_PKE),
  55. NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
  56. NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
  57. NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
  58. NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
  59. PAD_CTL_HYS | PAD_CTL_PKE),
  60. NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
  61. PAD_CTL_HYS | PAD_CTL_PKE),
  62. NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
  63. PAD_CTL_HYS | PAD_CTL_PKE),
  64. };
  65. imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
  66. }
  67. #ifdef CONFIG_FSL_ESDHC_IMX
  68. struct fsl_esdhc_cfg esdhc_cfg[1] = {
  69. {MMC_SDHC1_BASE_ADDR},
  70. };
  71. int board_mmc_getcd(struct mmc *mmc)
  72. {
  73. imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA13__GPIO3_13);
  74. gpio_direction_input(IMX_GPIO_NR(3, 13));
  75. return !gpio_get_value(IMX_GPIO_NR(3, 13));
  76. }
  77. #define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
  78. PAD_CTL_PUS_100K_UP)
  79. #define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
  80. PAD_CTL_DSE_HIGH)
  81. int board_mmc_init(bd_t *bis)
  82. {
  83. static const iomux_v3_cfg_t sd1_pads[] = {
  84. NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
  85. NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
  86. NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
  87. NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
  88. NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
  89. NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
  90. MX53_PAD_EIM_DA13__GPIO3_13,
  91. };
  92. u32 index;
  93. int ret;
  94. esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
  95. for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
  96. switch (index) {
  97. case 0:
  98. imx_iomux_v3_setup_multiple_pads(sd1_pads,
  99. ARRAY_SIZE(sd1_pads));
  100. break;
  101. default:
  102. printf("Warning: you configured more ESDHC controller"
  103. "(%d) as supported by the board(1)\n",
  104. CONFIG_SYS_FSL_ESDHC_NUM);
  105. return -EINVAL;
  106. }
  107. ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
  108. if (ret)
  109. return ret;
  110. }
  111. return 0;
  112. }
  113. #endif
  114. int board_early_init_f(void)
  115. {
  116. setup_iomux_uart();
  117. setup_iomux_fec();
  118. return 0;
  119. }
  120. int board_init(void)
  121. {
  122. /* address of boot parameters */
  123. gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  124. return 0;
  125. }
  126. int checkboard(void)
  127. {
  128. puts("Board: MX53SMD\n");
  129. return 0;
  130. }