northstar2.c 1.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Broadcom Ltd.
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <init.h>
  8. #include <asm/system.h>
  9. #include <asm/armv8/mmu.h>
  10. static struct mm_region ns2_mem_map[] = {
  11. {
  12. .virt = 0x0UL,
  13. .phys = 0x0UL,
  14. .size = 0x80000000UL,
  15. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  16. PTE_BLOCK_NON_SHARE |
  17. PTE_BLOCK_PXN | PTE_BLOCK_UXN
  18. }, {
  19. .virt = 0x80000000UL,
  20. .phys = 0x80000000UL,
  21. .size = 0xff80000000UL,
  22. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  23. PTE_BLOCK_INNER_SHARE
  24. }, {
  25. /* List terminator */
  26. 0,
  27. }
  28. };
  29. struct mm_region *mem_map = ns2_mem_map;
  30. DECLARE_GLOBAL_DATA_PTR;
  31. int board_init(void)
  32. {
  33. return 0;
  34. }
  35. int dram_init(void)
  36. {
  37. gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  38. PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
  39. return 0;
  40. }
  41. int dram_init_banksize(void)
  42. {
  43. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  44. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  45. gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
  46. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  47. return 0;
  48. }
  49. void reset_cpu(ulong addr)
  50. {
  51. psci_system_reset();
  52. }