stm32mp1.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <adc.h>
  7. #include <bootm.h>
  8. #include <clk.h>
  9. #include <config.h>
  10. #include <dm.h>
  11. #include <env.h>
  12. #include <env_internal.h>
  13. #include <g_dnl.h>
  14. #include <generic-phy.h>
  15. #include <hang.h>
  16. #include <i2c.h>
  17. #include <init.h>
  18. #include <led.h>
  19. #include <malloc.h>
  20. #include <memalign.h>
  21. #include <misc.h>
  22. #include <mtd.h>
  23. #include <mtd_node.h>
  24. #include <netdev.h>
  25. #include <phy.h>
  26. #include <remoteproc.h>
  27. #include <reset.h>
  28. #include <syscon.h>
  29. #include <usb.h>
  30. #include <watchdog.h>
  31. #include <asm/io.h>
  32. #include <asm/gpio.h>
  33. #include <asm/arch/stm32.h>
  34. #include <asm/arch/sys_proto.h>
  35. #include <jffs2/load_kernel.h>
  36. #include <linux/err.h>
  37. #include <power/regulator.h>
  38. #include <usb/dwc2_udc.h>
  39. /* SYSCFG registers */
  40. #define SYSCFG_BOOTR 0x00
  41. #define SYSCFG_PMCSETR 0x04
  42. #define SYSCFG_IOCTRLSETR 0x18
  43. #define SYSCFG_ICNR 0x1C
  44. #define SYSCFG_CMPCR 0x20
  45. #define SYSCFG_CMPENSETR 0x24
  46. #define SYSCFG_PMCCLRR 0x44
  47. #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
  48. #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
  49. #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
  50. #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
  51. #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
  52. #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
  53. #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
  54. #define SYSCFG_CMPCR_SW_CTRL BIT(1)
  55. #define SYSCFG_CMPCR_READY BIT(8)
  56. #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
  57. #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
  58. #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
  59. #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
  60. #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
  61. #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
  62. #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
  63. #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
  64. /*
  65. * Get a global data pointer
  66. */
  67. DECLARE_GLOBAL_DATA_PTR;
  68. #define USB_LOW_THRESHOLD_UV 200000
  69. #define USB_WARNING_LOW_THRESHOLD_UV 660000
  70. #define USB_START_LOW_THRESHOLD_UV 1230000
  71. #define USB_START_HIGH_THRESHOLD_UV 2150000
  72. int checkboard(void)
  73. {
  74. int ret;
  75. char *mode;
  76. u32 otp;
  77. struct udevice *dev;
  78. const char *fdt_compat;
  79. int fdt_compat_len;
  80. if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
  81. mode = "trusted with OP-TEE";
  82. else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
  83. mode = "trusted";
  84. else
  85. mode = "basic";
  86. printf("Board: stm32mp1 in %s mode", mode);
  87. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  88. &fdt_compat_len);
  89. if (fdt_compat && fdt_compat_len)
  90. printf(" (%s)", fdt_compat);
  91. puts("\n");
  92. ret = uclass_get_device_by_driver(UCLASS_MISC,
  93. DM_GET_DRIVER(stm32mp_bsec),
  94. &dev);
  95. if (!ret)
  96. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  97. &otp, sizeof(otp));
  98. if (ret > 0 && otp) {
  99. printf("Board: MB%04x Var%d Rev.%c-%02d\n",
  100. otp >> 16,
  101. (otp >> 12) & 0xF,
  102. ((otp >> 8) & 0xF) - 1 + 'A',
  103. otp & 0xF);
  104. }
  105. return 0;
  106. }
  107. static void board_key_check(void)
  108. {
  109. #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
  110. ofnode node;
  111. struct gpio_desc gpio;
  112. enum forced_boot_mode boot_mode = BOOT_NORMAL;
  113. node = ofnode_path("/config");
  114. if (!ofnode_valid(node)) {
  115. debug("%s: no /config node?\n", __func__);
  116. return;
  117. }
  118. #ifdef CONFIG_FASTBOOT
  119. if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
  120. &gpio, GPIOD_IS_IN)) {
  121. debug("%s: could not find a /config/st,fastboot-gpios\n",
  122. __func__);
  123. } else {
  124. if (dm_gpio_get_value(&gpio)) {
  125. puts("Fastboot key pressed, ");
  126. boot_mode = BOOT_FASTBOOT;
  127. }
  128. dm_gpio_free(NULL, &gpio);
  129. }
  130. #endif
  131. #ifdef CONFIG_CMD_STM32PROG
  132. if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
  133. &gpio, GPIOD_IS_IN)) {
  134. debug("%s: could not find a /config/st,stm32prog-gpios\n",
  135. __func__);
  136. } else {
  137. if (dm_gpio_get_value(&gpio)) {
  138. puts("STM32Programmer key pressed, ");
  139. boot_mode = BOOT_STM32PROG;
  140. }
  141. dm_gpio_free(NULL, &gpio);
  142. }
  143. #endif
  144. if (boot_mode != BOOT_NORMAL) {
  145. puts("entering download mode...\n");
  146. clrsetbits_le32(TAMP_BOOT_CONTEXT,
  147. TAMP_BOOT_FORCED_MASK,
  148. boot_mode);
  149. }
  150. #endif
  151. }
  152. #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
  153. /* STMicroelectronics STUSB1600 Type-C controller */
  154. #define STUSB1600_CC_CONNECTION_STATUS 0x0E
  155. /* STUSB1600_CC_CONNECTION_STATUS bitfields */
  156. #define STUSB1600_CC_ATTACH BIT(0)
  157. static int stusb1600_init(struct udevice **dev_stusb1600)
  158. {
  159. ofnode node;
  160. struct udevice *dev, *bus;
  161. int ret;
  162. u32 chip_addr;
  163. *dev_stusb1600 = NULL;
  164. /* if node stusb1600 is present, means DK1 or DK2 board */
  165. node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
  166. if (!ofnode_valid(node))
  167. return -ENODEV;
  168. ret = ofnode_read_u32(node, "reg", &chip_addr);
  169. if (ret)
  170. return -EINVAL;
  171. ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
  172. &bus);
  173. if (ret) {
  174. printf("bus for stusb1600 not found\n");
  175. return -ENODEV;
  176. }
  177. ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
  178. if (!ret)
  179. *dev_stusb1600 = dev;
  180. return ret;
  181. }
  182. static int stusb1600_cable_connected(struct udevice *dev)
  183. {
  184. u8 status;
  185. if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
  186. return 0;
  187. return status & STUSB1600_CC_ATTACH;
  188. }
  189. #include <usb/dwc2_udc.h>
  190. int g_dnl_board_usb_cable_connected(void)
  191. {
  192. struct udevice *stusb1600;
  193. struct udevice *dwc2_udc_otg;
  194. int ret;
  195. if (!stusb1600_init(&stusb1600))
  196. return stusb1600_cable_connected(stusb1600);
  197. ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
  198. DM_GET_DRIVER(dwc2_udc_otg),
  199. &dwc2_udc_otg);
  200. if (!ret)
  201. debug("dwc2_udc_otg init failed\n");
  202. return dwc2_udc_B_session_valid(dwc2_udc_otg);
  203. }
  204. #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
  205. #define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
  206. int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
  207. {
  208. if (!strcmp(name, "usb_dnl_dfu"))
  209. put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
  210. else if (!strcmp(name, "usb_dnl_fastboot"))
  211. put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
  212. &dev->idProduct);
  213. else
  214. put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
  215. return 0;
  216. }
  217. #endif /* CONFIG_USB_GADGET */
  218. #ifdef CONFIG_LED
  219. static int get_led(struct udevice **dev, char *led_string)
  220. {
  221. char *led_name;
  222. int ret;
  223. led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
  224. if (!led_name) {
  225. pr_debug("%s: could not find %s config string\n",
  226. __func__, led_string);
  227. return -ENOENT;
  228. }
  229. ret = led_get_by_label(led_name, dev);
  230. if (ret) {
  231. debug("%s: get=%d\n", __func__, ret);
  232. return ret;
  233. }
  234. return 0;
  235. }
  236. static int setup_led(enum led_state_t cmd)
  237. {
  238. struct udevice *dev;
  239. int ret;
  240. ret = get_led(&dev, "u-boot,boot-led");
  241. if (ret)
  242. return ret;
  243. ret = led_set_state(dev, cmd);
  244. return ret;
  245. }
  246. #endif
  247. static void __maybe_unused led_error_blink(u32 nb_blink)
  248. {
  249. #ifdef CONFIG_LED
  250. int ret;
  251. struct udevice *led;
  252. u32 i;
  253. #endif
  254. if (!nb_blink)
  255. return;
  256. #ifdef CONFIG_LED
  257. ret = get_led(&led, "u-boot,error-led");
  258. if (!ret) {
  259. /* make u-boot,error-led blinking */
  260. /* if U32_MAX and 125ms interval, for 17.02 years */
  261. for (i = 0; i < 2 * nb_blink; i++) {
  262. led_set_state(led, LEDST_TOGGLE);
  263. mdelay(125);
  264. WATCHDOG_RESET();
  265. }
  266. }
  267. #endif
  268. /* infinite: the boot process must be stopped */
  269. if (nb_blink == U32_MAX)
  270. hang();
  271. }
  272. #ifdef CONFIG_ADC
  273. static int board_check_usb_power(void)
  274. {
  275. struct ofnode_phandle_args adc_args;
  276. struct udevice *adc;
  277. ofnode node;
  278. unsigned int raw;
  279. int max_uV = 0;
  280. int min_uV = USB_START_HIGH_THRESHOLD_UV;
  281. int ret, uV, adc_count;
  282. u32 nb_blink;
  283. u8 i;
  284. node = ofnode_path("/config");
  285. if (!ofnode_valid(node)) {
  286. debug("%s: no /config node?\n", __func__);
  287. return -ENOENT;
  288. }
  289. /*
  290. * Retrieve the ADC channels devices and get measurement
  291. * for each of them
  292. */
  293. adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
  294. "#io-channel-cells");
  295. if (adc_count < 0) {
  296. if (adc_count == -ENOENT)
  297. return 0;
  298. pr_err("%s: can't find adc channel (%d)\n", __func__,
  299. adc_count);
  300. return adc_count;
  301. }
  302. for (i = 0; i < adc_count; i++) {
  303. if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
  304. "#io-channel-cells", 0, i,
  305. &adc_args)) {
  306. pr_debug("%s: can't find /config/st,adc_usb_pd\n",
  307. __func__);
  308. return 0;
  309. }
  310. ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
  311. &adc);
  312. if (ret) {
  313. pr_err("%s: Can't get adc device(%d)\n", __func__,
  314. ret);
  315. return ret;
  316. }
  317. ret = adc_channel_single_shot(adc->name, adc_args.args[0],
  318. &raw);
  319. if (ret) {
  320. pr_err("%s: single shot failed for %s[%d]!\n",
  321. __func__, adc->name, adc_args.args[0]);
  322. return ret;
  323. }
  324. /* Convert to uV */
  325. if (!adc_raw_to_uV(adc, raw, &uV)) {
  326. if (uV > max_uV)
  327. max_uV = uV;
  328. if (uV < min_uV)
  329. min_uV = uV;
  330. pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
  331. adc->name, adc_args.args[0], raw, uV);
  332. } else {
  333. pr_err("%s: Can't get uV value for %s[%d]\n",
  334. __func__, adc->name, adc_args.args[0]);
  335. }
  336. }
  337. /*
  338. * If highest value is inside 1.23 Volts and 2.10 Volts, that means
  339. * board is plugged on an USB-C 3A power supply and boot process can
  340. * continue.
  341. */
  342. if (max_uV > USB_START_LOW_THRESHOLD_UV &&
  343. max_uV <= USB_START_HIGH_THRESHOLD_UV &&
  344. min_uV <= USB_LOW_THRESHOLD_UV)
  345. return 0;
  346. pr_err("****************************************************\n");
  347. /*
  348. * If highest and lowest value are either both below
  349. * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
  350. * means USB TYPE-C is in unattached mode, this is an issue, make
  351. * u-boot,error-led blinking and stop boot process.
  352. */
  353. if ((max_uV > USB_LOW_THRESHOLD_UV &&
  354. min_uV > USB_LOW_THRESHOLD_UV) ||
  355. (max_uV <= USB_LOW_THRESHOLD_UV &&
  356. min_uV <= USB_LOW_THRESHOLD_UV)) {
  357. pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
  358. pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
  359. /* with 125ms interval, led will blink for 17.02 years ....*/
  360. nb_blink = U32_MAX;
  361. }
  362. if (max_uV > USB_LOW_THRESHOLD_UV &&
  363. max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
  364. min_uV <= USB_LOW_THRESHOLD_UV) {
  365. pr_err("* WARNING 500mA power supply detected *\n");
  366. nb_blink = 2;
  367. }
  368. if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
  369. max_uV <= USB_START_LOW_THRESHOLD_UV &&
  370. min_uV <= USB_LOW_THRESHOLD_UV) {
  371. pr_err("* WARNING 1.5mA power supply detected *\n");
  372. nb_blink = 3;
  373. }
  374. /*
  375. * If highest value is above 2.15 Volts that means that the USB TypeC
  376. * supplies more than 3 Amp, this is not compliant with TypeC specification
  377. */
  378. if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
  379. pr_err("* USB TYPE-C charger not compliant with *\n");
  380. pr_err("* specification *\n");
  381. pr_err("****************************************************\n\n");
  382. /* with 125ms interval, led will blink for 17.02 years ....*/
  383. nb_blink = U32_MAX;
  384. } else {
  385. pr_err("* Current too low, use a 3A power supply! *\n");
  386. pr_err("****************************************************\n\n");
  387. }
  388. led_error_blink(nb_blink);
  389. return 0;
  390. }
  391. #endif /* CONFIG_ADC */
  392. static void sysconf_init(void)
  393. {
  394. #ifndef CONFIG_STM32MP1_TRUSTED
  395. u8 *syscfg;
  396. #ifdef CONFIG_DM_REGULATOR
  397. struct udevice *pwr_dev;
  398. struct udevice *pwr_reg;
  399. struct udevice *dev;
  400. int ret;
  401. u32 otp = 0;
  402. #endif
  403. u32 bootr;
  404. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  405. /* interconnect update : select master using the port 1 */
  406. /* LTDC = AXI_M9 */
  407. /* GPU = AXI_M8 */
  408. /* today information is hardcoded in U-Boot */
  409. writel(BIT(9), syscfg + SYSCFG_ICNR);
  410. /* disable Pull-Down for boot pin connected to VDD */
  411. bootr = readl(syscfg + SYSCFG_BOOTR);
  412. bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
  413. bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
  414. writel(bootr, syscfg + SYSCFG_BOOTR);
  415. #ifdef CONFIG_DM_REGULATOR
  416. /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
  417. * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
  418. * The customer will have to disable this for low frequencies
  419. * or if AFMUX is selected but the function not used, typically for
  420. * TRACE. Otherwise, impact on power consumption.
  421. *
  422. * WARNING:
  423. * enabling High Speed mode while VDD>2.7V
  424. * with the OTP product_below_2v5 (OTP 18, BIT 13)
  425. * erroneously set to 1 can damage the IC!
  426. * => U-Boot set the register only if VDD < 2.7V (in DT)
  427. * but this value need to be consistent with board design
  428. */
  429. ret = uclass_get_device_by_driver(UCLASS_PMIC,
  430. DM_GET_DRIVER(stm32mp_pwr_pmic),
  431. &pwr_dev);
  432. if (!ret) {
  433. ret = uclass_get_device_by_driver(UCLASS_MISC,
  434. DM_GET_DRIVER(stm32mp_bsec),
  435. &dev);
  436. if (ret) {
  437. pr_err("Can't find stm32mp_bsec driver\n");
  438. return;
  439. }
  440. ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
  441. if (ret > 0)
  442. otp = otp & BIT(13);
  443. /* get VDD = vdd-supply */
  444. ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
  445. &pwr_reg);
  446. /* check if VDD is Low Voltage */
  447. if (!ret) {
  448. if (regulator_get_value(pwr_reg) < 2700000) {
  449. writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
  450. SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
  451. SYSCFG_IOCTRLSETR_HSLVEN_ETH |
  452. SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
  453. SYSCFG_IOCTRLSETR_HSLVEN_SPI,
  454. syscfg + SYSCFG_IOCTRLSETR);
  455. if (!otp)
  456. pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
  457. } else {
  458. if (otp)
  459. pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
  460. }
  461. } else {
  462. debug("VDD unknown");
  463. }
  464. }
  465. #endif
  466. /* activate automatic I/O compensation
  467. * warning: need to ensure CSI enabled and ready in clock driver
  468. */
  469. writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
  470. while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
  471. ;
  472. clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
  473. #endif
  474. }
  475. #ifdef CONFIG_DM_REGULATOR
  476. /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
  477. static int dk2_i2c1_fix(void)
  478. {
  479. ofnode node;
  480. struct gpio_desc hdmi, audio;
  481. int ret = 0;
  482. node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
  483. if (!ofnode_valid(node)) {
  484. pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
  485. return -ENOENT;
  486. }
  487. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  488. &hdmi, GPIOD_IS_OUT)) {
  489. pr_debug("%s: could not find reset-gpios\n",
  490. __func__);
  491. return -ENOENT;
  492. }
  493. node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
  494. if (!ofnode_valid(node)) {
  495. pr_debug("%s: no cs42l51@4a ?\n", __func__);
  496. return -ENOENT;
  497. }
  498. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  499. &audio, GPIOD_IS_OUT)) {
  500. pr_debug("%s: could not find reset-gpios\n",
  501. __func__);
  502. return -ENOENT;
  503. }
  504. /* before power up, insure that HDMI and AUDIO IC is under reset */
  505. ret = dm_gpio_set_value(&hdmi, 1);
  506. if (ret) {
  507. pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
  508. goto error;
  509. }
  510. ret = dm_gpio_set_value(&audio, 1);
  511. if (ret) {
  512. pr_err("%s: can't set_value for audio_nrst gpio", __func__);
  513. goto error;
  514. }
  515. /* power-up audio IC */
  516. regulator_autoset_by_name("v1v8_audio", NULL);
  517. /* power-up HDMI IC */
  518. regulator_autoset_by_name("v1v2_hdmi", NULL);
  519. regulator_autoset_by_name("v3v3_hdmi", NULL);
  520. error:
  521. return ret;
  522. }
  523. static bool board_is_dk2(void)
  524. {
  525. if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
  526. of_machine_is_compatible("st,stm32mp157c-dk2"))
  527. return true;
  528. return false;
  529. }
  530. #endif
  531. /* board dependent setup after realloc */
  532. int board_init(void)
  533. {
  534. struct udevice *dev;
  535. /* address of boot parameters */
  536. gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
  537. /* probe all PINCTRL for hog */
  538. for (uclass_first_device(UCLASS_PINCTRL, &dev);
  539. dev;
  540. uclass_next_device(&dev)) {
  541. pr_debug("probe pincontrol = %s\n", dev->name);
  542. }
  543. board_key_check();
  544. #ifdef CONFIG_DM_REGULATOR
  545. if (board_is_dk2())
  546. dk2_i2c1_fix();
  547. regulators_enable_boot_on(_DEBUG);
  548. #endif
  549. sysconf_init();
  550. if (CONFIG_IS_ENABLED(CONFIG_LED))
  551. led_default_state();
  552. return 0;
  553. }
  554. int board_late_init(void)
  555. {
  556. char *boot_device;
  557. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  558. const void *fdt_compat;
  559. int fdt_compat_len;
  560. int ret;
  561. u32 otp;
  562. struct udevice *dev;
  563. char buf[10];
  564. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  565. &fdt_compat_len);
  566. if (fdt_compat && fdt_compat_len) {
  567. if (strncmp(fdt_compat, "st,", 3) != 0)
  568. env_set("board_name", fdt_compat);
  569. else
  570. env_set("board_name", fdt_compat + 3);
  571. }
  572. ret = uclass_get_device_by_driver(UCLASS_MISC,
  573. DM_GET_DRIVER(stm32mp_bsec),
  574. &dev);
  575. if (!ret)
  576. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  577. &otp, sizeof(otp));
  578. if (!ret && otp) {
  579. snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
  580. env_set("board_id", buf);
  581. snprintf(buf, sizeof(buf), "0x%04x",
  582. ((otp >> 8) & 0xF) - 1 + 0xA);
  583. env_set("board_rev", buf);
  584. }
  585. #endif
  586. #ifdef CONFIG_ADC
  587. /* for DK1/DK2 boards */
  588. board_check_usb_power();
  589. #endif /* CONFIG_ADC */
  590. /* Check the boot-source to disable bootdelay */
  591. boot_device = env_get("boot_device");
  592. if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
  593. env_set("bootdelay", "0");
  594. return 0;
  595. }
  596. void board_quiesce_devices(void)
  597. {
  598. #ifdef CONFIG_LED
  599. setup_led(LEDST_OFF);
  600. #endif
  601. }
  602. /* eth init function : weak called in eqos driver */
  603. int board_interface_eth_init(struct udevice *dev,
  604. phy_interface_t interface_type)
  605. {
  606. u8 *syscfg;
  607. u32 value;
  608. bool eth_clk_sel_reg = false;
  609. bool eth_ref_clk_sel_reg = false;
  610. /* Gigabit Ethernet 125MHz clock selection. */
  611. eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
  612. /* Ethernet 50Mhz RMII clock selection */
  613. eth_ref_clk_sel_reg =
  614. dev_read_bool(dev, "st,eth_ref_clk_sel");
  615. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  616. if (!syscfg)
  617. return -ENODEV;
  618. switch (interface_type) {
  619. case PHY_INTERFACE_MODE_MII:
  620. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  621. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  622. debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
  623. break;
  624. case PHY_INTERFACE_MODE_GMII:
  625. if (eth_clk_sel_reg)
  626. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  627. SYSCFG_PMCSETR_ETH_CLK_SEL;
  628. else
  629. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
  630. debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
  631. break;
  632. case PHY_INTERFACE_MODE_RMII:
  633. if (eth_ref_clk_sel_reg)
  634. value = SYSCFG_PMCSETR_ETH_SEL_RMII |
  635. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  636. else
  637. value = SYSCFG_PMCSETR_ETH_SEL_RMII;
  638. debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
  639. break;
  640. case PHY_INTERFACE_MODE_RGMII:
  641. case PHY_INTERFACE_MODE_RGMII_ID:
  642. case PHY_INTERFACE_MODE_RGMII_RXID:
  643. case PHY_INTERFACE_MODE_RGMII_TXID:
  644. if (eth_clk_sel_reg)
  645. value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
  646. SYSCFG_PMCSETR_ETH_CLK_SEL;
  647. else
  648. value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
  649. debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
  650. break;
  651. default:
  652. debug("%s: Do not manage %d interface\n",
  653. __func__, interface_type);
  654. /* Do not manage others interfaces */
  655. return -EINVAL;
  656. }
  657. /* clear and set ETH configuration bits */
  658. writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
  659. SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
  660. syscfg + SYSCFG_PMCCLRR);
  661. writel(value, syscfg + SYSCFG_PMCSETR);
  662. return 0;
  663. }
  664. enum env_location env_get_location(enum env_operation op, int prio)
  665. {
  666. u32 bootmode = get_bootmode();
  667. if (prio)
  668. return ENVL_UNKNOWN;
  669. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  670. #ifdef CONFIG_ENV_IS_IN_EXT4
  671. case BOOT_FLASH_SD:
  672. case BOOT_FLASH_EMMC:
  673. return ENVL_EXT4;
  674. #endif
  675. #ifdef CONFIG_ENV_IS_IN_UBI
  676. case BOOT_FLASH_NAND:
  677. return ENVL_UBI;
  678. #endif
  679. #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
  680. case BOOT_FLASH_NOR:
  681. return ENVL_SPI_FLASH;
  682. #endif
  683. default:
  684. return ENVL_NOWHERE;
  685. }
  686. }
  687. #if defined(CONFIG_ENV_IS_IN_EXT4)
  688. const char *env_ext4_get_intf(void)
  689. {
  690. u32 bootmode = get_bootmode();
  691. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  692. case BOOT_FLASH_SD:
  693. case BOOT_FLASH_EMMC:
  694. return "mmc";
  695. default:
  696. return "";
  697. }
  698. }
  699. const char *env_ext4_get_dev_part(void)
  700. {
  701. static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
  702. u32 bootmode = get_bootmode();
  703. return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
  704. }
  705. #endif
  706. #ifdef CONFIG_SYS_MTDPARTS_RUNTIME
  707. #define MTDPARTS_LEN 256
  708. #define MTDIDS_LEN 128
  709. /**
  710. * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
  711. * If we need to access it before the env is relocated, then we need
  712. * to use our own stack buffer. gd->env_buf will be too small.
  713. *
  714. * @param buf temporary buffer pointer MTDPARTS_LEN long
  715. * @return mtdparts variable string, NULL if not found
  716. */
  717. static const char *env_get_mtdparts(const char *str, char *buf)
  718. {
  719. if (gd->flags & GD_FLG_ENV_READY)
  720. return env_get(str);
  721. if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
  722. return buf;
  723. return NULL;
  724. }
  725. /**
  726. * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
  727. */
  728. static void board_get_mtdparts(const char *dev,
  729. char *mtdids,
  730. char *mtdparts)
  731. {
  732. char env_name[32] = "mtdparts_";
  733. char tmp_mtdparts[MTDPARTS_LEN];
  734. const char *tmp;
  735. /* name of env variable to read = mtdparts_<dev> */
  736. strcat(env_name, dev);
  737. tmp = env_get_mtdparts(env_name, tmp_mtdparts);
  738. if (tmp) {
  739. /* mtdids: "<dev>=<dev>, ...." */
  740. if (mtdids[0] != '\0')
  741. strcat(mtdids, ",");
  742. strcat(mtdids, dev);
  743. strcat(mtdids, "=");
  744. strcat(mtdids, dev);
  745. /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
  746. if (mtdparts[0] != '\0')
  747. strncat(mtdparts, ";", MTDPARTS_LEN);
  748. else
  749. strcat(mtdparts, "mtdparts=");
  750. strncat(mtdparts, dev, MTDPARTS_LEN);
  751. strncat(mtdparts, ":", MTDPARTS_LEN);
  752. strncat(mtdparts, tmp, MTDPARTS_LEN);
  753. }
  754. }
  755. void board_mtdparts_default(const char **mtdids, const char **mtdparts)
  756. {
  757. struct mtd_info *mtd;
  758. struct udevice *dev;
  759. static char parts[3 * MTDPARTS_LEN + 1];
  760. static char ids[MTDIDS_LEN + 1];
  761. static bool mtd_initialized;
  762. if (mtd_initialized) {
  763. *mtdids = ids;
  764. *mtdparts = parts;
  765. return;
  766. }
  767. memset(parts, 0, sizeof(parts));
  768. memset(ids, 0, sizeof(ids));
  769. /* probe all MTD devices */
  770. for (uclass_first_device(UCLASS_MTD, &dev);
  771. dev;
  772. uclass_next_device(&dev)) {
  773. pr_debug("mtd device = %s\n", dev->name);
  774. }
  775. mtd = get_mtd_device_nm("nand0");
  776. if (!IS_ERR_OR_NULL(mtd)) {
  777. board_get_mtdparts("nand0", ids, parts);
  778. put_mtd_device(mtd);
  779. }
  780. mtd = get_mtd_device_nm("spi-nand0");
  781. if (!IS_ERR_OR_NULL(mtd)) {
  782. board_get_mtdparts("spi-nand0", ids, parts);
  783. put_mtd_device(mtd);
  784. }
  785. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  786. board_get_mtdparts("nor0", ids, parts);
  787. mtd_initialized = true;
  788. *mtdids = ids;
  789. *mtdparts = parts;
  790. debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
  791. }
  792. #endif
  793. #if defined(CONFIG_OF_BOARD_SETUP)
  794. int ft_board_setup(void *blob, bd_t *bd)
  795. {
  796. #ifdef CONFIG_FDT_FIXUP_PARTITIONS
  797. struct node_info nodes[] = {
  798. { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
  799. { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
  800. };
  801. fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
  802. #endif
  803. return 0;
  804. }
  805. #endif
  806. #ifdef CONFIG_SET_DFU_ALT_INFO
  807. #define DFU_ALT_BUF_LEN SZ_1K
  808. static void board_get_alt_info(const char *dev, char *buff)
  809. {
  810. char var_name[32] = "dfu_alt_info_";
  811. int ret;
  812. ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
  813. /* name of env variable to read = dfu_alt_info_<dev> */
  814. strcat(var_name, dev);
  815. ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
  816. if (ret) {
  817. if (buff[0] != '\0')
  818. strcat(buff, "&");
  819. strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
  820. }
  821. }
  822. void set_dfu_alt_info(char *interface, char *devstr)
  823. {
  824. struct udevice *dev;
  825. struct mtd_info *mtd;
  826. ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
  827. if (env_get("dfu_alt_info"))
  828. return;
  829. memset(buf, 0, sizeof(buf));
  830. /* probe all MTD devices */
  831. mtd_probe_devices();
  832. board_get_alt_info("ram", buf);
  833. if (!uclass_get_device(UCLASS_MMC, 0, &dev))
  834. board_get_alt_info("mmc0", buf);
  835. if (!uclass_get_device(UCLASS_MMC, 1, &dev))
  836. board_get_alt_info("mmc1", buf);
  837. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  838. board_get_alt_info("nor0", buf);
  839. mtd = get_mtd_device_nm("nand0");
  840. if (!IS_ERR_OR_NULL(mtd))
  841. board_get_alt_info("nand0", buf);
  842. mtd = get_mtd_device_nm("spi-nand0");
  843. if (!IS_ERR_OR_NULL(mtd))
  844. board_get_alt_info("spi-nand0", buf);
  845. #ifdef CONFIG_DFU_VIRT
  846. strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
  847. if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
  848. strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
  849. #endif
  850. env_set("dfu_alt_info", buf);
  851. puts("DFU alt info setting: done\n");
  852. }
  853. #if CONFIG_IS_ENABLED(DFU_VIRT)
  854. #include <dfu.h>
  855. #include <power/stpmic1.h>
  856. int dfu_otp_read(u64 offset, u8 *buffer, long *size)
  857. {
  858. struct udevice *dev;
  859. int ret;
  860. ret = uclass_get_device_by_driver(UCLASS_MISC,
  861. DM_GET_DRIVER(stm32mp_bsec),
  862. &dev);
  863. if (ret)
  864. return ret;
  865. ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
  866. if (ret >= 0) {
  867. *size = ret;
  868. ret = 0;
  869. }
  870. return 0;
  871. }
  872. int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
  873. {
  874. int ret;
  875. #ifdef CONFIG_PMIC_STPMIC1
  876. struct udevice *dev;
  877. ret = uclass_get_device_by_driver(UCLASS_MISC,
  878. DM_GET_DRIVER(stpmic1_nvm),
  879. &dev);
  880. if (ret)
  881. return ret;
  882. ret = misc_read(dev, 0xF8 + offset, buffer, *size);
  883. if (ret >= 0) {
  884. *size = ret;
  885. ret = 0;
  886. }
  887. if (ret == -EACCES) {
  888. *size = 0;
  889. ret = 0;
  890. }
  891. #else
  892. pr_err("PMIC update not supported");
  893. ret = -EOPNOTSUPP;
  894. #endif
  895. return ret;
  896. }
  897. int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
  898. void *buf, long *len)
  899. {
  900. switch (dfu->data.virt.dev_num) {
  901. case 0x0:
  902. return dfu_otp_read(offset, buf, len);
  903. case 0x1:
  904. return dfu_pmic_read(offset, buf, len);
  905. }
  906. *len = 0;
  907. return 0;
  908. }
  909. int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
  910. {
  911. *size = SZ_1K;
  912. return 0;
  913. }
  914. #endif
  915. #endif
  916. static void board_copro_image_process(ulong fw_image, size_t fw_size)
  917. {
  918. int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
  919. if (!rproc_is_initialized())
  920. if (rproc_init()) {
  921. printf("Remote Processor %d initialization failed\n",
  922. id);
  923. return;
  924. }
  925. ret = rproc_load(id, fw_image, fw_size);
  926. printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
  927. id, fw_image, fw_size, ret ? " Failed!" : " Success!");
  928. if (!ret)
  929. rproc_start(id);
  930. }
  931. U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);