coreboot_table.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <acpi_s3.h>
  7. #include <malloc.h>
  8. #include <vbe.h>
  9. #include <asm/coreboot_tables.h>
  10. #include <asm/e820.h>
  11. DECLARE_GLOBAL_DATA_PTR;
  12. int high_table_reserve(void)
  13. {
  14. /* adjust stack pointer to reserve space for configuration tables */
  15. gd->arch.high_table_limit = gd->start_addr_sp;
  16. gd->start_addr_sp -= CONFIG_HIGH_TABLE_SIZE;
  17. gd->arch.high_table_ptr = gd->start_addr_sp;
  18. /* clear the memory */
  19. #ifdef CONFIG_HAVE_ACPI_RESUME
  20. if (gd->arch.prev_sleep_state != ACPI_S3)
  21. #endif
  22. memset((void *)gd->arch.high_table_ptr, 0,
  23. CONFIG_HIGH_TABLE_SIZE);
  24. gd->start_addr_sp &= ~0xf;
  25. return 0;
  26. }
  27. void *high_table_malloc(size_t bytes)
  28. {
  29. u32 new_ptr;
  30. void *ptr;
  31. new_ptr = gd->arch.high_table_ptr + bytes;
  32. if (new_ptr >= gd->arch.high_table_limit)
  33. return NULL;
  34. ptr = (void *)gd->arch.high_table_ptr;
  35. gd->arch.high_table_ptr = new_ptr;
  36. return ptr;
  37. }
  38. /**
  39. * cb_table_init() - initialize a coreboot table header
  40. *
  41. * This fills in the coreboot table header signature and the header bytes.
  42. * Other fields are set to zero.
  43. *
  44. * @cbh: coreboot table header address
  45. */
  46. static void cb_table_init(struct cb_header *cbh)
  47. {
  48. memset(cbh, 0, sizeof(struct cb_header));
  49. memcpy(cbh->signature, "LBIO", 4);
  50. cbh->header_bytes = sizeof(struct cb_header);
  51. }
  52. /**
  53. * cb_table_add_entry() - add a coreboot table entry
  54. *
  55. * This increases the coreboot table entry size with added table entry length
  56. * and increases entry count by 1.
  57. *
  58. * @cbh: coreboot table header address
  59. * @cbr: to be added table entry address
  60. * @return: pointer to next table entry address
  61. */
  62. static u32 cb_table_add_entry(struct cb_header *cbh, struct cb_record *cbr)
  63. {
  64. cbh->table_bytes += cbr->size;
  65. cbh->table_entries++;
  66. return (u32)cbr + cbr->size;
  67. }
  68. /**
  69. * cb_table_finalize() - finalize the coreboot table
  70. *
  71. * This calculates the checksum for all coreboot table entries as well as
  72. * the checksum for the coreboot header itself.
  73. *
  74. * @cbh: coreboot table header address
  75. */
  76. static void cb_table_finalize(struct cb_header *cbh)
  77. {
  78. struct cb_record *cbr = (struct cb_record *)(cbh + 1);
  79. cbh->table_checksum = compute_ip_checksum(cbr, cbh->table_bytes);
  80. cbh->header_checksum = compute_ip_checksum(cbh, cbh->header_bytes);
  81. }
  82. void write_coreboot_table(u32 addr, struct memory_area *cfg_tables)
  83. {
  84. struct cb_header *cbh = (struct cb_header *)addr;
  85. struct cb_record *cbr;
  86. struct cb_memory *mem;
  87. struct cb_memory_range *map;
  88. struct e820_entry e820[32];
  89. struct cb_framebuffer *fb;
  90. struct vesa_mode_info *vesa;
  91. int i, num;
  92. cb_table_init(cbh);
  93. cbr = (struct cb_record *)(cbh + 1);
  94. /*
  95. * Two type of coreboot table entries are generated by us.
  96. * They are 'struct cb_memory' and 'struct cb_framebuffer'.
  97. */
  98. /* populate memory map table */
  99. mem = (struct cb_memory *)cbr;
  100. mem->tag = CB_TAG_MEMORY;
  101. map = mem->map;
  102. /* first install e820 defined memory maps */
  103. num = install_e820_map(ARRAY_SIZE(e820), e820);
  104. for (i = 0; i < num; i++) {
  105. map->start.lo = e820[i].addr & 0xffffffff;
  106. map->start.hi = e820[i].addr >> 32;
  107. map->size.lo = e820[i].size & 0xffffffff;
  108. map->size.hi = e820[i].size >> 32;
  109. map->type = e820[i].type;
  110. map++;
  111. }
  112. /* then install all configuration tables */
  113. while (cfg_tables->size) {
  114. map->start.lo = cfg_tables->start & 0xffffffff;
  115. map->start.hi = cfg_tables->start >> 32;
  116. map->size.lo = cfg_tables->size & 0xffffffff;
  117. map->size.hi = cfg_tables->size >> 32;
  118. map->type = CB_MEM_TABLE;
  119. map++;
  120. num++;
  121. cfg_tables++;
  122. }
  123. mem->size = num * sizeof(struct cb_memory_range) +
  124. sizeof(struct cb_record);
  125. cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
  126. /* populate framebuffer table if we have sane vesa info */
  127. vesa = &mode_info.vesa;
  128. if (vesa->x_resolution && vesa->y_resolution) {
  129. fb = (struct cb_framebuffer *)cbr;
  130. fb->tag = CB_TAG_FRAMEBUFFER;
  131. fb->size = sizeof(struct cb_framebuffer);
  132. fb->x_resolution = vesa->x_resolution;
  133. fb->y_resolution = vesa->y_resolution;
  134. fb->bits_per_pixel = vesa->bits_per_pixel;
  135. fb->bytes_per_line = vesa->bytes_per_scanline;
  136. fb->physical_address = vesa->phys_base_ptr;
  137. fb->red_mask_size = vesa->red_mask_size;
  138. fb->red_mask_pos = vesa->red_mask_pos;
  139. fb->green_mask_size = vesa->green_mask_size;
  140. fb->green_mask_pos = vesa->green_mask_pos;
  141. fb->blue_mask_size = vesa->blue_mask_size;
  142. fb->blue_mask_pos = vesa->blue_mask_pos;
  143. fb->reserved_mask_size = vesa->reserved_mask_size;
  144. fb->reserved_mask_pos = vesa->reserved_mask_pos;
  145. cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
  146. }
  147. cb_table_finalize(cbh);
  148. }