grpeach.c 931 B

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Renesas Electronics
  4. * Copyright (C) Chris Brandt
  5. */
  6. #include <common.h>
  7. #include <cpu_func.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/sys_proto.h>
  10. #define RZA1_WDT_BASE 0xfcfe0000
  11. #define WTCSR 0x00
  12. #define WTCNT 0x02
  13. #define WRCSR 0x04
  14. DECLARE_GLOBAL_DATA_PTR;
  15. int board_init(void)
  16. {
  17. gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
  18. return 0;
  19. }
  20. int dram_init(void)
  21. {
  22. if (fdtdec_setup_mem_size_base() != 0)
  23. return -EINVAL;
  24. return 0;
  25. }
  26. int dram_init_banksize(void)
  27. {
  28. fdtdec_setup_memory_banksize();
  29. return 0;
  30. }
  31. void reset_cpu(ulong addr)
  32. {
  33. /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
  34. readb(RZA1_WDT_BASE + WRCSR);
  35. writew(0xa500, RZA1_WDT_BASE + WRCSR);
  36. writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
  37. writew(0x5a00, RZA1_WDT_BASE + WTCNT);
  38. writew(0xa578, RZA1_WDT_BASE + WTCSR);
  39. for (;;)
  40. asm volatile("wfi");
  41. }