snps,hsdk-cgu.h 1.1 KB

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  1. /*
  2. * Synopsys HSDK SDP CGU clock driver dts bindings
  3. *
  4. * Copyright (C) 2017 Synopsys
  5. * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #ifndef __DT_BINDINGS_CLK_HSDK_CGU_H_
  12. #define __DT_BINDINGS_CLK_HSDK_CGU_H_
  13. #define CLK_ARC_PLL 0
  14. #define CLK_ARC 1
  15. #define CLK_DDR_PLL 2
  16. #define CLK_SYS_PLL 3
  17. #define CLK_SYS_APB 4
  18. #define CLK_SYS_AXI 5
  19. #define CLK_SYS_ETH 6
  20. #define CLK_SYS_USB 7
  21. #define CLK_SYS_SDIO 8
  22. #define CLK_SYS_HDMI 9
  23. #define CLK_SYS_GFX_CORE 10
  24. #define CLK_SYS_GFX_DMA 11
  25. #define CLK_SYS_GFX_CFG 12
  26. #define CLK_SYS_DMAC_CORE 13
  27. #define CLK_SYS_DMAC_CFG 14
  28. #define CLK_SYS_SDIO_REF 15
  29. #define CLK_SYS_SPI_REF 16
  30. #define CLK_SYS_I2C_REF 17
  31. #define CLK_SYS_UART_REF 18
  32. #define CLK_SYS_EBI_REF 19
  33. #define CLK_TUN_PLL 20
  34. #define CLK_TUN_TUN 21
  35. #define CLK_TUN_ROM 22
  36. #define CLK_TUN_PWM 23
  37. #define CLK_TUN_TIMER 24
  38. #define CLK_HDMI_PLL 25
  39. #define CLK_HDMI 26
  40. #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */