rv1108-cru.h 8.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
  4. * Author: Shawn Lin <shawn.lin@rock-chips.com>
  5. */
  6. #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
  7. #define _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H
  8. /* pll id */
  9. #define PLL_APLL 0
  10. #define PLL_DPLL 1
  11. #define PLL_GPLL 2
  12. #define ARMCLK 3
  13. /* sclk gates (special clocks) */
  14. #define SCLK_SPI0 65
  15. #define SCLK_NANDC 67
  16. #define SCLK_SDMMC 68
  17. #define SCLK_SDIO 69
  18. #define SCLK_EMMC 71
  19. #define SCLK_UART0 72
  20. #define SCLK_UART1 73
  21. #define SCLK_UART2 74
  22. #define SCLK_I2S0 75
  23. #define SCLK_I2S1 76
  24. #define SCLK_I2S2 77
  25. #define SCLK_TIMER0 78
  26. #define SCLK_TIMER1 79
  27. #define SCLK_SFC 80
  28. #define SCLK_SDMMC_DRV 81
  29. #define SCLK_SDIO_DRV 82
  30. #define SCLK_EMMC_DRV 83
  31. #define SCLK_SDMMC_SAMPLE 84
  32. #define SCLK_SDIO_SAMPLE 85
  33. #define SCLK_EMMC_SAMPLE 86
  34. #define SCLK_VENC_CORE 87
  35. #define SCLK_HEVC_CORE 88
  36. #define SCLK_HEVC_CABAC 89
  37. #define SCLK_PWM0_PMU 90
  38. #define SCLK_I2C0_PMU 91
  39. #define SCLK_WIFI 92
  40. #define SCLK_CIFOUT 93
  41. #define SCLK_MIPI_CSI_OUT 94
  42. #define SCLK_CIF0 95
  43. #define SCLK_CIF1 96
  44. #define SCLK_CIF2 97
  45. #define SCLK_CIF3 98
  46. #define SCLK_DSP 99
  47. #define SCLK_DSP_IOP 100
  48. #define SCLK_DSP_EPP 101
  49. #define SCLK_DSP_EDP 102
  50. #define SCLK_DSP_EDAP 103
  51. #define SCLK_CVBS_HOST 104
  52. #define SCLK_HDMI_SFR 105
  53. #define SCLK_HDMI_CEC 106
  54. #define SCLK_CRYPTO 107
  55. #define SCLK_SPI 108
  56. #define SCLK_SARADC 109
  57. #define SCLK_TSADC 110
  58. #define SCLK_MAC_PRE 111
  59. #define SCLK_MAC 112
  60. #define SCLK_MAC_RX 113
  61. #define SCLK_MAC_REF 114
  62. #define SCLK_MAC_REFOUT 115
  63. #define SCLK_DSP_PFM 116
  64. #define SCLK_RGA 117
  65. #define SCLK_I2C1 118
  66. #define SCLK_I2C2 119
  67. #define SCLK_I2C3 120
  68. #define SCLK_PWM 121
  69. #define SCLK_ISP 122
  70. #define SCLK_USBPHY 123
  71. #define SCLK_I2S0_SRC 124
  72. #define SCLK_I2S1_SRC 125
  73. #define SCLK_I2S2_SRC 126
  74. #define SCLK_UART0_SRC 127
  75. #define SCLK_UART1_SRC 128
  76. #define SCLK_UART2_SRC 129
  77. #define SCLK_MAC_TX 130
  78. #define SCLK_MACREF 131
  79. #define SCLK_MACREF_OUT 132
  80. #define DCLK_VOP_SRC 185
  81. #define DCLK_HDMIPHY 186
  82. #define DCLK_VOP 187
  83. /* aclk gates */
  84. #define ACLK_DMAC 192
  85. #define ACLK_PRE 193
  86. #define ACLK_CORE 194
  87. #define ACLK_ENMCORE 195
  88. #define ACLK_RKVENC 196
  89. #define ACLK_RKVDEC 197
  90. #define ACLK_VPU 198
  91. #define ACLK_CIF0 199
  92. #define ACLK_VIO0 200
  93. #define ACLK_VIO1 201
  94. #define ACLK_VOP 202
  95. #define ACLK_IEP 203
  96. #define ACLK_RGA 204
  97. #define ACLK_ISP 205
  98. #define ACLK_CIF1 206
  99. #define ACLK_CIF2 207
  100. #define ACLK_CIF3 208
  101. #define ACLK_PERI 209
  102. #define ACLK_GMAC 210
  103. /* pclk gates */
  104. #define PCLK_GPIO1 256
  105. #define PCLK_GPIO2 257
  106. #define PCLK_GPIO3 258
  107. #define PCLK_GRF 259
  108. #define PCLK_I2C1 260
  109. #define PCLK_I2C2 261
  110. #define PCLK_I2C3 262
  111. #define PCLK_SPI 263
  112. #define PCLK_SFC 264
  113. #define PCLK_UART0 265
  114. #define PCLK_UART1 266
  115. #define PCLK_UART2 267
  116. #define PCLK_TSADC 268
  117. #define PCLK_PWM 269
  118. #define PCLK_TIMER 270
  119. #define PCLK_PERI 271
  120. #define PCLK_GPIO0_PMU 272
  121. #define PCLK_I2C0_PMU 273
  122. #define PCLK_PWM0_PMU 274
  123. #define PCLK_ISP 275
  124. #define PCLK_VIO 276
  125. #define PCLK_MIPI_DSI 277
  126. #define PCLK_HDMI_CTRL 278
  127. #define PCLK_SARADC 279
  128. #define PCLK_DSP_CFG 280
  129. #define PCLK_BUS 281
  130. #define PCLK_EFUSE0 282
  131. #define PCLK_EFUSE1 283
  132. #define PCLK_WDT 284
  133. #define PCLK_GMAC 285
  134. /* hclk gates */
  135. #define HCLK_I2S0_8CH 320
  136. #define HCLK_I2S1_2CH 321
  137. #define HCLK_I2S2_2CH 322
  138. #define HCLK_NANDC 323
  139. #define HCLK_SDMMC 324
  140. #define HCLK_SDIO 325
  141. #define HCLK_EMMC 326
  142. #define HCLK_PERI 327
  143. #define HCLK_SFC 328
  144. #define HCLK_RKVENC 329
  145. #define HCLK_RKVDEC 330
  146. #define HCLK_CIF0 331
  147. #define HCLK_VIO 332
  148. #define HCLK_VOP 333
  149. #define HCLK_IEP 334
  150. #define HCLK_RGA 335
  151. #define HCLK_ISP 336
  152. #define HCLK_CRYPTO_MST 337
  153. #define HCLK_CRYPTO_SLV 338
  154. #define HCLK_HOST0 339
  155. #define HCLK_OTG 340
  156. #define HCLK_CIF1 341
  157. #define HCLK_CIF2 342
  158. #define HCLK_CIF3 343
  159. #define HCLK_BUS 344
  160. #define HCLK_VPU 345
  161. #define CLK_NR_CLKS (HCLK_VPU + 1)
  162. /* reset id */
  163. #define SRST_CORE_PO_AD 0
  164. #define SRST_CORE_AD 1
  165. #define SRST_L2_AD 2
  166. #define SRST_CPU_NIU_AD 3
  167. #define SRST_CORE_PO 4
  168. #define SRST_CORE 5
  169. #define SRST_L2 6
  170. #define SRST_CORE_DBG 8
  171. #define PRST_DBG 9
  172. #define RST_DAP 10
  173. #define PRST_DBG_NIU 11
  174. #define ARST_STRC_SYS_AD 15
  175. #define SRST_DDRPHY_CLKDIV 16
  176. #define SRST_DDRPHY 17
  177. #define PRST_DDRPHY 18
  178. #define PRST_HDMIPHY 19
  179. #define PRST_VDACPHY 20
  180. #define PRST_VADCPHY 21
  181. #define PRST_MIPI_CSI_PHY 22
  182. #define PRST_MIPI_DSI_PHY 23
  183. #define PRST_ACODEC 24
  184. #define ARST_BUS_NIU 25
  185. #define PRST_TOP_NIU 26
  186. #define ARST_INTMEM 27
  187. #define HRST_ROM 28
  188. #define ARST_DMAC 29
  189. #define SRST_MSCH_NIU 30
  190. #define PRST_MSCH_NIU 31
  191. #define PRST_DDRUPCTL 32
  192. #define NRST_DDRUPCTL 33
  193. #define PRST_DDRMON 34
  194. #define HRST_I2S0_8CH 35
  195. #define MRST_I2S0_8CH 36
  196. #define HRST_I2S1_2CH 37
  197. #define MRST_IS21_2CH 38
  198. #define HRST_I2S2_2CH 39
  199. #define MRST_I2S2_2CH 40
  200. #define HRST_CRYPTO 41
  201. #define SRST_CRYPTO 42
  202. #define PRST_SPI 43
  203. #define SRST_SPI 44
  204. #define PRST_UART0 45
  205. #define PRST_UART1 46
  206. #define PRST_UART2 47
  207. #define SRST_UART0 48
  208. #define SRST_UART1 49
  209. #define SRST_UART2 50
  210. #define PRST_I2C1 51
  211. #define PRST_I2C2 52
  212. #define PRST_I2C3 53
  213. #define SRST_I2C1 54
  214. #define SRST_I2C2 55
  215. #define SRST_I2C3 56
  216. #define PRST_PWM1 58
  217. #define SRST_PWM1 60
  218. #define PRST_WDT 61
  219. #define PRST_GPIO1 62
  220. #define PRST_GPIO2 63
  221. #define PRST_GPIO3 64
  222. #define PRST_GRF 65
  223. #define PRST_EFUSE 66
  224. #define PRST_EFUSE512 67
  225. #define PRST_TIMER0 68
  226. #define SRST_TIMER0 69
  227. #define SRST_TIMER1 70
  228. #define PRST_TSADC 71
  229. #define SRST_TSADC 72
  230. #define PRST_SARADC 73
  231. #define SRST_SARADC 74
  232. #define HRST_SYSBUS 75
  233. #define PRST_USBGRF 76
  234. #define ARST_PERIPH_NIU 80
  235. #define HRST_PERIPH_NIU 81
  236. #define PRST_PERIPH_NIU 82
  237. #define HRST_PERIPH 83
  238. #define HRST_SDMMC 84
  239. #define HRST_SDIO 85
  240. #define HRST_EMMC 86
  241. #define HRST_NANDC 87
  242. #define NRST_NANDC 88
  243. #define HRST_SFC 89
  244. #define SRST_SFC 90
  245. #define ARST_GMAC 91
  246. #define HRST_OTG 92
  247. #define SRST_OTG 93
  248. #define SRST_OTG_ADP 94
  249. #define HRST_HOST0 95
  250. #define HRST_HOST0_AUX 96
  251. #define HRST_HOST0_ARB 97
  252. #define SRST_HOST0_EHCIPHY 98
  253. #define SRST_HOST0_UTMI 99
  254. #define SRST_USBPOR 100
  255. #define SRST_UTMI0 101
  256. #define SRST_UTMI1 102
  257. #define ARST_VIO0_NIU 102
  258. #define ARST_VIO1_NIU 103
  259. #define HRST_VIO_NIU 104
  260. #define PRST_VIO_NIU 105
  261. #define ARST_VOP 106
  262. #define HRST_VOP 107
  263. #define DRST_VOP 108
  264. #define ARST_IEP 109
  265. #define HRST_IEP 110
  266. #define ARST_RGA 111
  267. #define HRST_RGA 112
  268. #define SRST_RGA 113
  269. #define PRST_CVBS 114
  270. #define PRST_HDMI 115
  271. #define SRST_HDMI 116
  272. #define PRST_MIPI_DSI 117
  273. #define ARST_ISP_NIU 118
  274. #define HRST_ISP_NIU 119
  275. #define HRST_ISP 120
  276. #define SRST_ISP 121
  277. #define ARST_VIP0 122
  278. #define HRST_VIP0 123
  279. #define PRST_VIP0 124
  280. #define ARST_VIP1 125
  281. #define HRST_VIP1 126
  282. #define PRST_VIP1 127
  283. #define ARST_VIP2 128
  284. #define HRST_VIP2 129
  285. #define PRST_VIP2 120
  286. #define ARST_VIP3 121
  287. #define HRST_VIP3 122
  288. #define PRST_VIP4 123
  289. #define PRST_CIF1TO4 124
  290. #define SRST_CVBS_CLK 125
  291. #define HRST_CVBS 126
  292. #define ARST_VPU_NIU 140
  293. #define HRST_VPU_NIU 141
  294. #define ARST_VPU 142
  295. #define HRST_VPU 143
  296. #define ARST_RKVDEC_NIU 144
  297. #define HRST_RKVDEC_NIU 145
  298. #define ARST_RKVDEC 146
  299. #define HRST_RKVDEC 147
  300. #define SRST_RKVDEC_CABAC 148
  301. #define SRST_RKVDEC_CORE 149
  302. #define ARST_RKVENC_NIU 150
  303. #define HRST_RKVENC_NIU 151
  304. #define ARST_RKVENC 152
  305. #define HRST_RKVENC 153
  306. #define SRST_RKVENC_CORE 154
  307. #define SRST_DSP_CORE 156
  308. #define SRST_DSP_SYS 157
  309. #define SRST_DSP_GLOBAL 158
  310. #define SRST_DSP_OECM 159
  311. #define PRST_DSP_IOP_NIU 160
  312. #define ARST_DSP_EPP_NIU 161
  313. #define ARST_DSP_EDP_NIU 162
  314. #define PRST_DSP_DBG_NIU 163
  315. #define PRST_DSP_CFG_NIU 164
  316. #define PRST_DSP_GRF 165
  317. #define PRST_DSP_MAILBOX 166
  318. #define PRST_DSP_INTC 167
  319. #define PRST_DSP_PFM_MON 169
  320. #define SRST_DSP_PFM_MON 170
  321. #define ARST_DSP_EDAP_NIU 171
  322. #define SRST_PMU 172
  323. #define SRST_PMU_I2C0 173
  324. #define PRST_PMU_I2C0 174
  325. #define PRST_PMU_GPIO0 175
  326. #define PRST_PMU_INTMEM 176
  327. #define PRST_PMU_PWM0 177
  328. #define SRST_PMU_PWM0 178
  329. #define PRST_PMU_GRF 179
  330. #define SRST_PMU_NIU 180
  331. #define SRST_PMU_PVTM 181
  332. #define ARST_DSP_EDP_PERF 184
  333. #define ARST_DSP_EPP_PERF 185
  334. #endif /* _DT_BINDINGS_CLK_ROCKCHIP_RV1108_H */