r8a77990-cpg-mssr.h 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2018 Renesas Electronics Corp.
  4. */
  5. #ifndef __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__
  6. #define __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__
  7. #include <dt-bindings/clock/renesas-cpg-mssr.h>
  8. /* r8a77990 CPG Core Clocks */
  9. #define R8A77990_CLK_Z2 0
  10. #define R8A77990_CLK_ZR 1
  11. #define R8A77990_CLK_ZG 2
  12. #define R8A77990_CLK_ZTR 3
  13. #define R8A77990_CLK_ZT 4
  14. #define R8A77990_CLK_ZX 5
  15. #define R8A77990_CLK_S0D1 6
  16. #define R8A77990_CLK_S0D3 7
  17. #define R8A77990_CLK_S0D6 8
  18. #define R8A77990_CLK_S0D12 9
  19. #define R8A77990_CLK_S0D24 10
  20. #define R8A77990_CLK_S1D1 11
  21. #define R8A77990_CLK_S1D2 12
  22. #define R8A77990_CLK_S1D4 13
  23. #define R8A77990_CLK_S2D1 14
  24. #define R8A77990_CLK_S2D2 15
  25. #define R8A77990_CLK_S2D4 16
  26. #define R8A77990_CLK_S3D1 17
  27. #define R8A77990_CLK_S3D2 18
  28. #define R8A77990_CLK_S3D4 19
  29. #define R8A77990_CLK_S0D6C 20
  30. #define R8A77990_CLK_S3D1C 21
  31. #define R8A77990_CLK_S3D2C 22
  32. #define R8A77990_CLK_S3D4C 23
  33. #define R8A77990_CLK_LB 24
  34. #define R8A77990_CLK_CL 25
  35. #define R8A77990_CLK_ZB3 26
  36. #define R8A77990_CLK_ZB3D2 27
  37. #define R8A77990_CLK_CR 28
  38. #define R8A77990_CLK_CRD2 29
  39. #define R8A77990_CLK_SD0H 30
  40. #define R8A77990_CLK_SD0 31
  41. #define R8A77990_CLK_SD1H 32
  42. #define R8A77990_CLK_SD1 33
  43. #define R8A77990_CLK_SD3H 34
  44. #define R8A77990_CLK_SD3 35
  45. #define R8A77990_CLK_RPC 36
  46. #define R8A77990_CLK_RPCD2 37
  47. #define R8A77990_CLK_ZA2 38
  48. #define R8A77990_CLK_ZA8 39
  49. #define R8A77990_CLK_Z2D 40
  50. #define R8A77990_CLK_CANFD 41
  51. #define R8A77990_CLK_MSO 42
  52. #define R8A77990_CLK_R 43
  53. #define R8A77990_CLK_OSC 44
  54. #define R8A77990_CLK_LV0 45
  55. #define R8A77990_CLK_LV1 46
  56. #define R8A77990_CLK_CSI0 47
  57. #define R8A77990_CLK_CP 48
  58. #define R8A77990_CLK_CPEX 49
  59. #endif /* __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ */