r8a7792-clock.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (C) 2016 Cogent Embedded, Inc.
  4. */
  5. #ifndef __DT_BINDINGS_CLOCK_R8A7792_H__
  6. #define __DT_BINDINGS_CLOCK_R8A7792_H__
  7. /* CPG */
  8. #define R8A7792_CLK_MAIN 0
  9. #define R8A7792_CLK_PLL0 1
  10. #define R8A7792_CLK_PLL1 2
  11. #define R8A7792_CLK_PLL3 3
  12. #define R8A7792_CLK_LB 4
  13. #define R8A7792_CLK_QSPI 5
  14. /* MSTP0 */
  15. #define R8A7792_CLK_MSIOF0 0
  16. /* MSTP1 */
  17. #define R8A7792_CLK_JPU 6
  18. #define R8A7792_CLK_TMU1 11
  19. #define R8A7792_CLK_TMU3 21
  20. #define R8A7792_CLK_TMU2 22
  21. #define R8A7792_CLK_CMT0 24
  22. #define R8A7792_CLK_TMU0 25
  23. #define R8A7792_CLK_VSP1DU1 27
  24. #define R8A7792_CLK_VSP1DU0 28
  25. #define R8A7792_CLK_VSP1_SY 31
  26. /* MSTP2 */
  27. #define R8A7792_CLK_MSIOF1 8
  28. #define R8A7792_CLK_SYS_DMAC1 18
  29. #define R8A7792_CLK_SYS_DMAC0 19
  30. /* MSTP3 */
  31. #define R8A7792_CLK_TPU0 4
  32. #define R8A7792_CLK_SDHI0 14
  33. #define R8A7792_CLK_CMT1 29
  34. /* MSTP4 */
  35. #define R8A7792_CLK_IRQC 7
  36. #define R8A7792_CLK_INTC_SYS 8
  37. /* MSTP5 */
  38. #define R8A7792_CLK_AUDIO_DMAC0 2
  39. #define R8A7792_CLK_THERMAL 22
  40. #define R8A7792_CLK_PWM 23
  41. /* MSTP7 */
  42. #define R8A7792_CLK_HSCIF1 16
  43. #define R8A7792_CLK_HSCIF0 17
  44. #define R8A7792_CLK_SCIF3 18
  45. #define R8A7792_CLK_SCIF2 19
  46. #define R8A7792_CLK_SCIF1 20
  47. #define R8A7792_CLK_SCIF0 21
  48. #define R8A7792_CLK_DU1 23
  49. #define R8A7792_CLK_DU0 24
  50. /* MSTP8 */
  51. #define R8A7792_CLK_VIN5 4
  52. #define R8A7792_CLK_VIN4 5
  53. #define R8A7792_CLK_VIN3 8
  54. #define R8A7792_CLK_VIN2 9
  55. #define R8A7792_CLK_VIN1 10
  56. #define R8A7792_CLK_VIN0 11
  57. #define R8A7792_CLK_ETHERAVB 12
  58. /* MSTP9 */
  59. #define R8A7792_CLK_GPIO7 4
  60. #define R8A7792_CLK_GPIO6 5
  61. #define R8A7792_CLK_GPIO5 7
  62. #define R8A7792_CLK_GPIO4 8
  63. #define R8A7792_CLK_GPIO3 9
  64. #define R8A7792_CLK_GPIO2 10
  65. #define R8A7792_CLK_GPIO1 11
  66. #define R8A7792_CLK_GPIO0 12
  67. #define R8A7792_CLK_GPIO11 13
  68. #define R8A7792_CLK_GPIO10 14
  69. #define R8A7792_CLK_CAN1 15
  70. #define R8A7792_CLK_CAN0 16
  71. #define R8A7792_CLK_QSPI_MOD 17
  72. #define R8A7792_CLK_GPIO9 19
  73. #define R8A7792_CLK_GPIO8 21
  74. #define R8A7792_CLK_I2C5 25
  75. #define R8A7792_CLK_IICDVFS 26
  76. #define R8A7792_CLK_I2C4 27
  77. #define R8A7792_CLK_I2C3 28
  78. #define R8A7792_CLK_I2C2 29
  79. #define R8A7792_CLK_I2C1 30
  80. #define R8A7792_CLK_I2C0 31
  81. /* MSTP10 */
  82. #define R8A7792_CLK_SSI_ALL 5
  83. #define R8A7792_CLK_SSI4 11
  84. #define R8A7792_CLK_SSI3 12
  85. #endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */