pinctrl-meson-axg.c 32 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright (C) 2018 Neil Armstrong <narmstrong@baylibre.com>
  4. *
  5. * Based on code from Linux kernel:
  6. * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
  7. * Author: Xingyu Chen <xingyu.chen@amlogic.com>
  8. */
  9. #include <common.h>
  10. #include <dm.h>
  11. #include <dm/pinctrl.h>
  12. #include <dt-bindings/gpio/meson-axg-gpio.h>
  13. #include "pinctrl-meson-axg.h"
  14. #define EE_OFF 15
  15. /* emmc */
  16. static const unsigned int emmc_nand_d0_pins[] = { PIN(BOOT_0, EE_OFF) };
  17. static const unsigned int emmc_nand_d1_pins[] = { PIN(BOOT_1, EE_OFF) };
  18. static const unsigned int emmc_nand_d2_pins[] = { PIN(BOOT_2, EE_OFF) };
  19. static const unsigned int emmc_nand_d3_pins[] = { PIN(BOOT_3, EE_OFF) };
  20. static const unsigned int emmc_nand_d4_pins[] = { PIN(BOOT_4, EE_OFF) };
  21. static const unsigned int emmc_nand_d5_pins[] = { PIN(BOOT_5, EE_OFF) };
  22. static const unsigned int emmc_nand_d6_pins[] = { PIN(BOOT_6, EE_OFF) };
  23. static const unsigned int emmc_nand_d7_pins[] = { PIN(BOOT_7, EE_OFF) };
  24. static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
  25. static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
  26. static const unsigned int emmc_ds_pins[] = { PIN(BOOT_13, EE_OFF) };
  27. /* nand */
  28. static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) };
  29. static const unsigned int nand_ale_pins[] = { PIN(BOOT_9, EE_OFF) };
  30. static const unsigned int nand_cle_pins[] = { PIN(BOOT_10, EE_OFF) };
  31. static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_11, EE_OFF) };
  32. static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_12, EE_OFF) };
  33. static const unsigned int nand_rb0_pins[] = { PIN(BOOT_13, EE_OFF) };
  34. /* nor */
  35. static const unsigned int nor_hold_pins[] = { PIN(BOOT_3, EE_OFF) };
  36. static const unsigned int nor_d_pins[] = { PIN(BOOT_4, EE_OFF) };
  37. static const unsigned int nor_q_pins[] = { PIN(BOOT_5, EE_OFF) };
  38. static const unsigned int nor_c_pins[] = { PIN(BOOT_6, EE_OFF) };
  39. static const unsigned int nor_wp_pins[] = { PIN(BOOT_9, EE_OFF) };
  40. static const unsigned int nor_cs_pins[] = { PIN(BOOT_14, EE_OFF) };
  41. /* sdio */
  42. static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) };
  43. static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) };
  44. static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) };
  45. static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) };
  46. static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_4, EE_OFF) };
  47. static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_5, EE_OFF) };
  48. /* spi0 */
  49. static const unsigned int spi0_clk_pins[] = { PIN(GPIOZ_0, EE_OFF) };
  50. static const unsigned int spi0_mosi_pins[] = { PIN(GPIOZ_1, EE_OFF) };
  51. static const unsigned int spi0_miso_pins[] = { PIN(GPIOZ_2, EE_OFF) };
  52. static const unsigned int spi0_ss0_pins[] = { PIN(GPIOZ_3, EE_OFF) };
  53. static const unsigned int spi0_ss1_pins[] = { PIN(GPIOZ_4, EE_OFF) };
  54. static const unsigned int spi0_ss2_pins[] = { PIN(GPIOZ_5, EE_OFF) };
  55. /* spi1 */
  56. static const unsigned int spi1_clk_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
  57. static const unsigned int spi1_mosi_x_pins[] = { PIN(GPIOX_17, EE_OFF) };
  58. static const unsigned int spi1_miso_x_pins[] = { PIN(GPIOX_18, EE_OFF) };
  59. static const unsigned int spi1_ss0_x_pins[] = { PIN(GPIOX_16, EE_OFF) };
  60. static const unsigned int spi1_clk_a_pins[] = { PIN(GPIOA_4, EE_OFF) };
  61. static const unsigned int spi1_mosi_a_pins[] = { PIN(GPIOA_2, EE_OFF) };
  62. static const unsigned int spi1_miso_a_pins[] = { PIN(GPIOA_3, EE_OFF) };
  63. static const unsigned int spi1_ss0_a_pins[] = { PIN(GPIOA_5, EE_OFF) };
  64. static const unsigned int spi1_ss1_pins[] = { PIN(GPIOA_6, EE_OFF) };
  65. /* i2c0 */
  66. static const unsigned int i2c0_sck_pins[] = { PIN(GPIOZ_6, EE_OFF) };
  67. static const unsigned int i2c0_sda_pins[] = { PIN(GPIOZ_7, EE_OFF) };
  68. /* i2c1 */
  69. static const unsigned int i2c1_sck_z_pins[] = { PIN(GPIOZ_8, EE_OFF) };
  70. static const unsigned int i2c1_sda_z_pins[] = { PIN(GPIOZ_9, EE_OFF) };
  71. static const unsigned int i2c1_sck_x_pins[] = { PIN(GPIOX_16, EE_OFF) };
  72. static const unsigned int i2c1_sda_x_pins[] = { PIN(GPIOX_17, EE_OFF) };
  73. /* i2c2 */
  74. static const unsigned int i2c2_sck_x_pins[] = { PIN(GPIOX_18, EE_OFF) };
  75. static const unsigned int i2c2_sda_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
  76. static const unsigned int i2c2_sda_a_pins[] = { PIN(GPIOA_17, EE_OFF) };
  77. static const unsigned int i2c2_sck_a_pins[] = { PIN(GPIOA_18, EE_OFF) };
  78. /* i2c3 */
  79. static const unsigned int i2c3_sda_a6_pins[] = { PIN(GPIOA_6, EE_OFF) };
  80. static const unsigned int i2c3_sck_a7_pins[] = { PIN(GPIOA_7, EE_OFF) };
  81. static const unsigned int i2c3_sda_a12_pins[] = { PIN(GPIOA_12, EE_OFF) };
  82. static const unsigned int i2c3_sck_a13_pins[] = { PIN(GPIOA_13, EE_OFF) };
  83. static const unsigned int i2c3_sda_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
  84. static const unsigned int i2c3_sck_a20_pins[] = { PIN(GPIOA_20, EE_OFF) };
  85. /* uart_a */
  86. static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_11, EE_OFF) };
  87. static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_10, EE_OFF) };
  88. static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_8, EE_OFF) };
  89. static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_9, EE_OFF) };
  90. /* uart_b */
  91. static const unsigned int uart_rts_b_z_pins[] = { PIN(GPIOZ_0, EE_OFF) };
  92. static const unsigned int uart_cts_b_z_pins[] = { PIN(GPIOZ_1, EE_OFF) };
  93. static const unsigned int uart_tx_b_z_pins[] = { PIN(GPIOZ_2, EE_OFF) };
  94. static const unsigned int uart_rx_b_z_pins[] = { PIN(GPIOZ_3, EE_OFF) };
  95. static const unsigned int uart_rts_b_x_pins[] = { PIN(GPIOX_18, EE_OFF) };
  96. static const unsigned int uart_cts_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
  97. static const unsigned int uart_tx_b_x_pins[] = { PIN(GPIOX_16, EE_OFF) };
  98. static const unsigned int uart_rx_b_x_pins[] = { PIN(GPIOX_17, EE_OFF) };
  99. /* uart_ao_b */
  100. static const unsigned int uart_ao_tx_b_z_pins[] = { PIN(GPIOZ_8, EE_OFF) };
  101. static const unsigned int uart_ao_rx_b_z_pins[] = { PIN(GPIOZ_9, EE_OFF) };
  102. static const unsigned int uart_ao_cts_b_z_pins[] = { PIN(GPIOZ_6, EE_OFF) };
  103. static const unsigned int uart_ao_rts_b_z_pins[] = { PIN(GPIOZ_7, EE_OFF) };
  104. /* pwm_a */
  105. static const unsigned int pwm_a_z_pins[] = { PIN(GPIOZ_5, EE_OFF) };
  106. static const unsigned int pwm_a_x18_pins[] = { PIN(GPIOX_18, EE_OFF) };
  107. static const unsigned int pwm_a_x20_pins[] = { PIN(GPIOX_20, EE_OFF) };
  108. static const unsigned int pwm_a_a_pins[] = { PIN(GPIOA_14, EE_OFF) };
  109. /* pwm_b */
  110. static const unsigned int pwm_b_z_pins[] = { PIN(GPIOZ_4, EE_OFF) };
  111. static const unsigned int pwm_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
  112. static const unsigned int pwm_b_a_pins[] = { PIN(GPIOA_15, EE_OFF) };
  113. /* pwm_c */
  114. static const unsigned int pwm_c_x10_pins[] = { PIN(GPIOX_10, EE_OFF) };
  115. static const unsigned int pwm_c_x17_pins[] = { PIN(GPIOX_17, EE_OFF) };
  116. static const unsigned int pwm_c_a_pins[] = { PIN(GPIOA_16, EE_OFF) };
  117. /* pwm_d */
  118. static const unsigned int pwm_d_x11_pins[] = { PIN(GPIOX_11, EE_OFF) };
  119. static const unsigned int pwm_d_x16_pins[] = { PIN(GPIOX_16, EE_OFF) };
  120. /* pwm_vs */
  121. static const unsigned int pwm_vs_pins[] = { PIN(GPIOA_0, EE_OFF) };
  122. /* spdif_in */
  123. static const unsigned int spdif_in_z_pins[] = { PIN(GPIOZ_4, EE_OFF) };
  124. static const unsigned int spdif_in_a1_pins[] = { PIN(GPIOA_1, EE_OFF) };
  125. static const unsigned int spdif_in_a7_pins[] = { PIN(GPIOA_7, EE_OFF) };
  126. static const unsigned int spdif_in_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
  127. static const unsigned int spdif_in_a20_pins[] = { PIN(GPIOA_20, EE_OFF) };
  128. /* spdif_out */
  129. static const unsigned int spdif_out_z_pins[] = { PIN(GPIOZ_5, EE_OFF) };
  130. static const unsigned int spdif_out_a1_pins[] = { PIN(GPIOA_1, EE_OFF) };
  131. static const unsigned int spdif_out_a11_pins[] = { PIN(GPIOA_11, EE_OFF) };
  132. static const unsigned int spdif_out_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
  133. static const unsigned int spdif_out_a20_pins[] = { PIN(GPIOA_20, EE_OFF) };
  134. /* jtag_ee */
  135. static const unsigned int jtag_tdo_x_pins[] = { PIN(GPIOX_0, EE_OFF) };
  136. static const unsigned int jtag_tdi_x_pins[] = { PIN(GPIOX_1, EE_OFF) };
  137. static const unsigned int jtag_clk_x_pins[] = { PIN(GPIOX_4, EE_OFF) };
  138. static const unsigned int jtag_tms_x_pins[] = { PIN(GPIOX_5, EE_OFF) };
  139. /* eth */
  140. static const unsigned int eth_txd0_x_pins[] = { PIN(GPIOX_8, EE_OFF) };
  141. static const unsigned int eth_txd1_x_pins[] = { PIN(GPIOX_9, EE_OFF) };
  142. static const unsigned int eth_txen_x_pins[] = { PIN(GPIOX_10, EE_OFF) };
  143. static const unsigned int eth_rgmii_rx_clk_x_pins[] = { PIN(GPIOX_12, EE_OFF) };
  144. static const unsigned int eth_rxd0_x_pins[] = { PIN(GPIOX_13, EE_OFF) };
  145. static const unsigned int eth_rxd1_x_pins[] = { PIN(GPIOX_14, EE_OFF) };
  146. static const unsigned int eth_rx_dv_x_pins[] = { PIN(GPIOX_15, EE_OFF) };
  147. static const unsigned int eth_mdio_x_pins[] = { PIN(GPIOX_21, EE_OFF) };
  148. static const unsigned int eth_mdc_x_pins[] = { PIN(GPIOX_22, EE_OFF) };
  149. static const unsigned int eth_txd0_y_pins[] = { PIN(GPIOY_10, EE_OFF) };
  150. static const unsigned int eth_txd1_y_pins[] = { PIN(GPIOY_11, EE_OFF) };
  151. static const unsigned int eth_txen_y_pins[] = { PIN(GPIOY_9, EE_OFF) };
  152. static const unsigned int eth_rgmii_rx_clk_y_pins[] = { PIN(GPIOY_2, EE_OFF) };
  153. static const unsigned int eth_rxd0_y_pins[] = { PIN(GPIOY_4, EE_OFF) };
  154. static const unsigned int eth_rxd1_y_pins[] = { PIN(GPIOY_5, EE_OFF) };
  155. static const unsigned int eth_rx_dv_y_pins[] = { PIN(GPIOY_3, EE_OFF) };
  156. static const unsigned int eth_mdio_y_pins[] = { PIN(GPIOY_0, EE_OFF) };
  157. static const unsigned int eth_mdc_y_pins[] = { PIN(GPIOY_1, EE_OFF) };
  158. static const unsigned int eth_rxd2_rgmii_pins[] = { PIN(GPIOY_6, EE_OFF) };
  159. static const unsigned int eth_rxd3_rgmii_pins[] = { PIN(GPIOY_7, EE_OFF) };
  160. static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOY_8, EE_OFF) };
  161. static const unsigned int eth_txd2_rgmii_pins[] = { PIN(GPIOY_12, EE_OFF) };
  162. static const unsigned int eth_txd3_rgmii_pins[] = { PIN(GPIOY_13, EE_OFF) };
  163. /* pdm */
  164. static const unsigned int pdm_dclk_a14_pins[] = { PIN(GPIOA_14, EE_OFF) };
  165. static const unsigned int pdm_dclk_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
  166. static const unsigned int pdm_din0_pins[] = { PIN(GPIOA_15, EE_OFF) };
  167. static const unsigned int pdm_din1_pins[] = { PIN(GPIOA_16, EE_OFF) };
  168. static const unsigned int pdm_din2_pins[] = { PIN(GPIOA_17, EE_OFF) };
  169. static const unsigned int pdm_din3_pins[] = { PIN(GPIOA_18, EE_OFF) };
  170. /* mclk */
  171. static const unsigned int mclk_c_pins[] = { PIN(GPIOA_0, EE_OFF) };
  172. static const unsigned int mclk_b_pins[] = { PIN(GPIOA_1, EE_OFF) };
  173. /* tdm */
  174. static const unsigned int tdma_sclk_pins[] = { PIN(GPIOX_12, EE_OFF) };
  175. static const unsigned int tdma_sclk_slv_pins[] = { PIN(GPIOX_12, EE_OFF) };
  176. static const unsigned int tdma_fs_pins[] = { PIN(GPIOX_13, EE_OFF) };
  177. static const unsigned int tdma_fs_slv_pins[] = { PIN(GPIOX_13, EE_OFF) };
  178. static const unsigned int tdma_din0_pins[] = { PIN(GPIOX_14, EE_OFF) };
  179. static const unsigned int tdma_dout0_x14_pins[] = { PIN(GPIOX_14, EE_OFF) };
  180. static const unsigned int tdma_dout0_x15_pins[] = { PIN(GPIOX_15, EE_OFF) };
  181. static const unsigned int tdma_dout1_pins[] = { PIN(GPIOX_15, EE_OFF) };
  182. static const unsigned int tdma_din1_pins[] = { PIN(GPIOX_15, EE_OFF) };
  183. static const unsigned int tdmc_sclk_pins[] = { PIN(GPIOA_2, EE_OFF) };
  184. static const unsigned int tdmc_sclk_slv_pins[] = { PIN(GPIOA_2, EE_OFF) };
  185. static const unsigned int tdmc_fs_pins[] = { PIN(GPIOA_3, EE_OFF) };
  186. static const unsigned int tdmc_fs_slv_pins[] = { PIN(GPIOA_3, EE_OFF) };
  187. static const unsigned int tdmc_din0_pins[] = { PIN(GPIOA_4, EE_OFF) };
  188. static const unsigned int tdmc_dout0_pins[] = { PIN(GPIOA_4, EE_OFF) };
  189. static const unsigned int tdmc_din1_pins[] = { PIN(GPIOA_5, EE_OFF) };
  190. static const unsigned int tdmc_dout1_pins[] = { PIN(GPIOA_5, EE_OFF) };
  191. static const unsigned int tdmc_din2_pins[] = { PIN(GPIOA_6, EE_OFF) };
  192. static const unsigned int tdmc_dout2_pins[] = { PIN(GPIOA_6, EE_OFF) };
  193. static const unsigned int tdmc_din3_pins[] = { PIN(GPIOA_7, EE_OFF) };
  194. static const unsigned int tdmc_dout3_pins[] = { PIN(GPIOA_7, EE_OFF) };
  195. static const unsigned int tdmb_sclk_pins[] = { PIN(GPIOA_8, EE_OFF) };
  196. static const unsigned int tdmb_sclk_slv_pins[] = { PIN(GPIOA_8, EE_OFF) };
  197. static const unsigned int tdmb_fs_pins[] = { PIN(GPIOA_9, EE_OFF) };
  198. static const unsigned int tdmb_fs_slv_pins[] = { PIN(GPIOA_9, EE_OFF) };
  199. static const unsigned int tdmb_din0_pins[] = { PIN(GPIOA_10, EE_OFF) };
  200. static const unsigned int tdmb_dout0_pins[] = { PIN(GPIOA_10, EE_OFF) };
  201. static const unsigned int tdmb_din1_pins[] = { PIN(GPIOA_11, EE_OFF) };
  202. static const unsigned int tdmb_dout1_pins[] = { PIN(GPIOA_11, EE_OFF) };
  203. static const unsigned int tdmb_din2_pins[] = { PIN(GPIOA_12, EE_OFF) };
  204. static const unsigned int tdmb_dout2_pins[] = { PIN(GPIOA_12, EE_OFF) };
  205. static const unsigned int tdmb_din3_pins[] = { PIN(GPIOA_13, EE_OFF) };
  206. static const unsigned int tdmb_dout3_pins[] = { PIN(GPIOA_13, EE_OFF) };
  207. static struct meson_pmx_group meson_axg_periphs_groups[] = {
  208. GPIO_GROUP(GPIOZ_0, EE_OFF),
  209. GPIO_GROUP(GPIOZ_1, EE_OFF),
  210. GPIO_GROUP(GPIOZ_2, EE_OFF),
  211. GPIO_GROUP(GPIOZ_3, EE_OFF),
  212. GPIO_GROUP(GPIOZ_4, EE_OFF),
  213. GPIO_GROUP(GPIOZ_5, EE_OFF),
  214. GPIO_GROUP(GPIOZ_6, EE_OFF),
  215. GPIO_GROUP(GPIOZ_7, EE_OFF),
  216. GPIO_GROUP(GPIOZ_8, EE_OFF),
  217. GPIO_GROUP(GPIOZ_9, EE_OFF),
  218. GPIO_GROUP(GPIOZ_10, EE_OFF),
  219. GPIO_GROUP(BOOT_0, EE_OFF),
  220. GPIO_GROUP(BOOT_1, EE_OFF),
  221. GPIO_GROUP(BOOT_2, EE_OFF),
  222. GPIO_GROUP(BOOT_3, EE_OFF),
  223. GPIO_GROUP(BOOT_4, EE_OFF),
  224. GPIO_GROUP(BOOT_5, EE_OFF),
  225. GPIO_GROUP(BOOT_6, EE_OFF),
  226. GPIO_GROUP(BOOT_7, EE_OFF),
  227. GPIO_GROUP(BOOT_8, EE_OFF),
  228. GPIO_GROUP(BOOT_9, EE_OFF),
  229. GPIO_GROUP(BOOT_10, EE_OFF),
  230. GPIO_GROUP(BOOT_11, EE_OFF),
  231. GPIO_GROUP(BOOT_12, EE_OFF),
  232. GPIO_GROUP(BOOT_13, EE_OFF),
  233. GPIO_GROUP(BOOT_14, EE_OFF),
  234. GPIO_GROUP(GPIOA_0, EE_OFF),
  235. GPIO_GROUP(GPIOA_1, EE_OFF),
  236. GPIO_GROUP(GPIOA_2, EE_OFF),
  237. GPIO_GROUP(GPIOA_3, EE_OFF),
  238. GPIO_GROUP(GPIOA_4, EE_OFF),
  239. GPIO_GROUP(GPIOA_5, EE_OFF),
  240. GPIO_GROUP(GPIOA_6, EE_OFF),
  241. GPIO_GROUP(GPIOA_7, EE_OFF),
  242. GPIO_GROUP(GPIOA_8, EE_OFF),
  243. GPIO_GROUP(GPIOA_9, EE_OFF),
  244. GPIO_GROUP(GPIOA_10, EE_OFF),
  245. GPIO_GROUP(GPIOA_11, EE_OFF),
  246. GPIO_GROUP(GPIOA_12, EE_OFF),
  247. GPIO_GROUP(GPIOA_13, EE_OFF),
  248. GPIO_GROUP(GPIOA_14, EE_OFF),
  249. GPIO_GROUP(GPIOA_15, EE_OFF),
  250. GPIO_GROUP(GPIOA_16, EE_OFF),
  251. GPIO_GROUP(GPIOA_17, EE_OFF),
  252. GPIO_GROUP(GPIOA_18, EE_OFF),
  253. GPIO_GROUP(GPIOA_19, EE_OFF),
  254. GPIO_GROUP(GPIOA_20, EE_OFF),
  255. GPIO_GROUP(GPIOX_0, EE_OFF),
  256. GPIO_GROUP(GPIOX_1, EE_OFF),
  257. GPIO_GROUP(GPIOX_2, EE_OFF),
  258. GPIO_GROUP(GPIOX_3, EE_OFF),
  259. GPIO_GROUP(GPIOX_4, EE_OFF),
  260. GPIO_GROUP(GPIOX_5, EE_OFF),
  261. GPIO_GROUP(GPIOX_6, EE_OFF),
  262. GPIO_GROUP(GPIOX_7, EE_OFF),
  263. GPIO_GROUP(GPIOX_8, EE_OFF),
  264. GPIO_GROUP(GPIOX_9, EE_OFF),
  265. GPIO_GROUP(GPIOX_10, EE_OFF),
  266. GPIO_GROUP(GPIOX_11, EE_OFF),
  267. GPIO_GROUP(GPIOX_12, EE_OFF),
  268. GPIO_GROUP(GPIOX_13, EE_OFF),
  269. GPIO_GROUP(GPIOX_14, EE_OFF),
  270. GPIO_GROUP(GPIOX_15, EE_OFF),
  271. GPIO_GROUP(GPIOX_16, EE_OFF),
  272. GPIO_GROUP(GPIOX_17, EE_OFF),
  273. GPIO_GROUP(GPIOX_18, EE_OFF),
  274. GPIO_GROUP(GPIOX_19, EE_OFF),
  275. GPIO_GROUP(GPIOX_20, EE_OFF),
  276. GPIO_GROUP(GPIOX_21, EE_OFF),
  277. GPIO_GROUP(GPIOX_22, EE_OFF),
  278. GPIO_GROUP(GPIOY_0, EE_OFF),
  279. GPIO_GROUP(GPIOY_1, EE_OFF),
  280. GPIO_GROUP(GPIOY_2, EE_OFF),
  281. GPIO_GROUP(GPIOY_3, EE_OFF),
  282. GPIO_GROUP(GPIOY_4, EE_OFF),
  283. GPIO_GROUP(GPIOY_5, EE_OFF),
  284. GPIO_GROUP(GPIOY_6, EE_OFF),
  285. GPIO_GROUP(GPIOY_7, EE_OFF),
  286. GPIO_GROUP(GPIOY_8, EE_OFF),
  287. GPIO_GROUP(GPIOY_9, EE_OFF),
  288. GPIO_GROUP(GPIOY_10, EE_OFF),
  289. GPIO_GROUP(GPIOY_11, EE_OFF),
  290. GPIO_GROUP(GPIOY_12, EE_OFF),
  291. GPIO_GROUP(GPIOY_13, EE_OFF),
  292. GPIO_GROUP(GPIOY_14, EE_OFF),
  293. GPIO_GROUP(GPIOY_15, EE_OFF),
  294. /* bank BOOT */
  295. GROUP(emmc_nand_d0, 1),
  296. GROUP(emmc_nand_d1, 1),
  297. GROUP(emmc_nand_d2, 1),
  298. GROUP(emmc_nand_d3, 1),
  299. GROUP(emmc_nand_d4, 1),
  300. GROUP(emmc_nand_d5, 1),
  301. GROUP(emmc_nand_d6, 1),
  302. GROUP(emmc_nand_d7, 1),
  303. GROUP(emmc_clk, 1),
  304. GROUP(emmc_cmd, 1),
  305. GROUP(emmc_ds, 1),
  306. GROUP(nand_ce0, 2),
  307. GROUP(nand_ale, 2),
  308. GROUP(nand_cle, 2),
  309. GROUP(nand_wen_clk, 2),
  310. GROUP(nand_ren_wr, 2),
  311. GROUP(nand_rb0, 2),
  312. GROUP(nor_hold, 3),
  313. GROUP(nor_d, 3),
  314. GROUP(nor_q, 3),
  315. GROUP(nor_c, 3),
  316. GROUP(nor_wp, 3),
  317. GROUP(nor_cs, 3),
  318. /* bank GPIOZ */
  319. GROUP(spi0_clk, 1),
  320. GROUP(spi0_mosi, 1),
  321. GROUP(spi0_miso, 1),
  322. GROUP(spi0_ss0, 1),
  323. GROUP(spi0_ss1, 1),
  324. GROUP(spi0_ss2, 1),
  325. GROUP(i2c0_sck, 1),
  326. GROUP(i2c0_sda, 1),
  327. GROUP(i2c1_sck_z, 1),
  328. GROUP(i2c1_sda_z, 1),
  329. GROUP(uart_rts_b_z, 2),
  330. GROUP(uart_cts_b_z, 2),
  331. GROUP(uart_tx_b_z, 2),
  332. GROUP(uart_rx_b_z, 2),
  333. GROUP(pwm_a_z, 2),
  334. GROUP(pwm_b_z, 2),
  335. GROUP(spdif_in_z, 3),
  336. GROUP(spdif_out_z, 3),
  337. GROUP(uart_ao_tx_b_z, 2),
  338. GROUP(uart_ao_rx_b_z, 2),
  339. GROUP(uart_ao_cts_b_z, 2),
  340. GROUP(uart_ao_rts_b_z, 2),
  341. /* bank GPIOX */
  342. GROUP(sdio_d0, 1),
  343. GROUP(sdio_d1, 1),
  344. GROUP(sdio_d2, 1),
  345. GROUP(sdio_d3, 1),
  346. GROUP(sdio_clk, 1),
  347. GROUP(sdio_cmd, 1),
  348. GROUP(i2c1_sck_x, 1),
  349. GROUP(i2c1_sda_x, 1),
  350. GROUP(i2c2_sck_x, 1),
  351. GROUP(i2c2_sda_x, 1),
  352. GROUP(uart_rts_a, 1),
  353. GROUP(uart_cts_a, 1),
  354. GROUP(uart_tx_a, 1),
  355. GROUP(uart_rx_a, 1),
  356. GROUP(uart_rts_b_x, 2),
  357. GROUP(uart_cts_b_x, 2),
  358. GROUP(uart_tx_b_x, 2),
  359. GROUP(uart_rx_b_x, 2),
  360. GROUP(jtag_tdo_x, 2),
  361. GROUP(jtag_tdi_x, 2),
  362. GROUP(jtag_clk_x, 2),
  363. GROUP(jtag_tms_x, 2),
  364. GROUP(spi1_clk_x, 4),
  365. GROUP(spi1_mosi_x, 4),
  366. GROUP(spi1_miso_x, 4),
  367. GROUP(spi1_ss0_x, 4),
  368. GROUP(pwm_a_x18, 3),
  369. GROUP(pwm_a_x20, 1),
  370. GROUP(pwm_b_x, 3),
  371. GROUP(pwm_c_x10, 3),
  372. GROUP(pwm_c_x17, 3),
  373. GROUP(pwm_d_x11, 3),
  374. GROUP(pwm_d_x16, 3),
  375. GROUP(eth_txd0_x, 4),
  376. GROUP(eth_txd1_x, 4),
  377. GROUP(eth_txen_x, 4),
  378. GROUP(eth_rgmii_rx_clk_x, 4),
  379. GROUP(eth_rxd0_x, 4),
  380. GROUP(eth_rxd1_x, 4),
  381. GROUP(eth_rx_dv_x, 4),
  382. GROUP(eth_mdio_x, 4),
  383. GROUP(eth_mdc_x, 4),
  384. GROUP(tdma_sclk, 1),
  385. GROUP(tdma_sclk_slv, 2),
  386. GROUP(tdma_fs, 1),
  387. GROUP(tdma_fs_slv, 2),
  388. GROUP(tdma_din0, 1),
  389. GROUP(tdma_dout0_x14, 2),
  390. GROUP(tdma_dout0_x15, 1),
  391. GROUP(tdma_dout1, 2),
  392. GROUP(tdma_din1, 3),
  393. /* bank GPIOY */
  394. GROUP(eth_txd0_y, 1),
  395. GROUP(eth_txd1_y, 1),
  396. GROUP(eth_txen_y, 1),
  397. GROUP(eth_rgmii_rx_clk_y, 1),
  398. GROUP(eth_rxd0_y, 1),
  399. GROUP(eth_rxd1_y, 1),
  400. GROUP(eth_rx_dv_y, 1),
  401. GROUP(eth_mdio_y, 1),
  402. GROUP(eth_mdc_y, 1),
  403. GROUP(eth_rxd2_rgmii, 1),
  404. GROUP(eth_rxd3_rgmii, 1),
  405. GROUP(eth_rgmii_tx_clk, 1),
  406. GROUP(eth_txd2_rgmii, 1),
  407. GROUP(eth_txd3_rgmii, 1),
  408. /* bank GPIOA */
  409. GROUP(spdif_out_a1, 4),
  410. GROUP(spdif_out_a11, 3),
  411. GROUP(spdif_out_a19, 2),
  412. GROUP(spdif_out_a20, 1),
  413. GROUP(spdif_in_a1, 3),
  414. GROUP(spdif_in_a7, 3),
  415. GROUP(spdif_in_a19, 1),
  416. GROUP(spdif_in_a20, 2),
  417. GROUP(spi1_clk_a, 3),
  418. GROUP(spi1_mosi_a, 3),
  419. GROUP(spi1_miso_a, 3),
  420. GROUP(spi1_ss0_a, 3),
  421. GROUP(spi1_ss1, 3),
  422. GROUP(pwm_a_a, 3),
  423. GROUP(pwm_b_a, 3),
  424. GROUP(pwm_c_a, 3),
  425. GROUP(pwm_vs, 2),
  426. GROUP(i2c2_sda_a, 3),
  427. GROUP(i2c2_sck_a, 3),
  428. GROUP(i2c3_sda_a6, 4),
  429. GROUP(i2c3_sck_a7, 4),
  430. GROUP(i2c3_sda_a12, 4),
  431. GROUP(i2c3_sck_a13, 4),
  432. GROUP(i2c3_sda_a19, 4),
  433. GROUP(i2c3_sck_a20, 4),
  434. GROUP(pdm_dclk_a14, 1),
  435. GROUP(pdm_dclk_a19, 3),
  436. GROUP(pdm_din0, 1),
  437. GROUP(pdm_din1, 1),
  438. GROUP(pdm_din2, 1),
  439. GROUP(pdm_din3, 1),
  440. GROUP(mclk_c, 1),
  441. GROUP(mclk_b, 1),
  442. GROUP(tdmc_sclk, 1),
  443. GROUP(tdmc_sclk_slv, 2),
  444. GROUP(tdmc_fs, 1),
  445. GROUP(tdmc_fs_slv, 2),
  446. GROUP(tdmc_din0, 2),
  447. GROUP(tdmc_dout0, 1),
  448. GROUP(tdmc_din1, 2),
  449. GROUP(tdmc_dout1, 1),
  450. GROUP(tdmc_din2, 2),
  451. GROUP(tdmc_dout2, 1),
  452. GROUP(tdmc_din3, 2),
  453. GROUP(tdmc_dout3, 1),
  454. GROUP(tdmb_sclk, 1),
  455. GROUP(tdmb_sclk_slv, 2),
  456. GROUP(tdmb_fs, 1),
  457. GROUP(tdmb_fs_slv, 2),
  458. GROUP(tdmb_din0, 2),
  459. GROUP(tdmb_dout0, 1),
  460. GROUP(tdmb_din1, 2),
  461. GROUP(tdmb_dout1, 1),
  462. GROUP(tdmb_din2, 2),
  463. GROUP(tdmb_dout2, 1),
  464. GROUP(tdmb_din3, 2),
  465. GROUP(tdmb_dout3, 1),
  466. };
  467. /* uart_ao_a */
  468. static const unsigned int uart_ao_tx_a_pins[] = {GPIOAO_0};
  469. static const unsigned int uart_ao_rx_a_pins[] = {GPIOAO_1};
  470. static const unsigned int uart_ao_cts_a_pins[] = {GPIOAO_2};
  471. static const unsigned int uart_ao_rts_a_pins[] = {GPIOAO_3};
  472. /* uart_ao_b */
  473. static const unsigned int uart_ao_tx_b_pins[] = {GPIOAO_4};
  474. static const unsigned int uart_ao_rx_b_pins[] = {GPIOAO_5};
  475. static const unsigned int uart_ao_cts_b_pins[] = {GPIOAO_2};
  476. static const unsigned int uart_ao_rts_b_pins[] = {GPIOAO_3};
  477. /* i2c_ao */
  478. static const unsigned int i2c_ao_sck_4_pins[] = {GPIOAO_4};
  479. static const unsigned int i2c_ao_sda_5_pins[] = {GPIOAO_5};
  480. static const unsigned int i2c_ao_sck_8_pins[] = {GPIOAO_8};
  481. static const unsigned int i2c_ao_sda_9_pins[] = {GPIOAO_9};
  482. static const unsigned int i2c_ao_sck_10_pins[] = {GPIOAO_10};
  483. static const unsigned int i2c_ao_sda_11_pins[] = {GPIOAO_11};
  484. /* i2c_ao_slave */
  485. static const unsigned int i2c_ao_slave_sck_pins[] = {GPIOAO_10};
  486. static const unsigned int i2c_ao_slave_sda_pins[] = {GPIOAO_11};
  487. /* ir_in */
  488. static const unsigned int remote_input_ao_pins[] = {GPIOAO_6};
  489. /* ir_out */
  490. static const unsigned int remote_out_ao_pins[] = {GPIOAO_7};
  491. /* pwm_ao_a */
  492. static const unsigned int pwm_ao_a_pins[] = {GPIOAO_3};
  493. /* pwm_ao_b */
  494. static const unsigned int pwm_ao_b_ao2_pins[] = {GPIOAO_2};
  495. static const unsigned int pwm_ao_b_ao12_pins[] = {GPIOAO_12};
  496. /* pwm_ao_c */
  497. static const unsigned int pwm_ao_c_ao8_pins[] = {GPIOAO_8};
  498. static const unsigned int pwm_ao_c_ao13_pins[] = {GPIOAO_13};
  499. /* pwm_ao_d */
  500. static const unsigned int pwm_ao_d_pins[] = {GPIOAO_9};
  501. /* jtag_ao */
  502. static const unsigned int jtag_ao_tdi_pins[] = {GPIOAO_3};
  503. static const unsigned int jtag_ao_tdo_pins[] = {GPIOAO_4};
  504. static const unsigned int jtag_ao_clk_pins[] = {GPIOAO_5};
  505. static const unsigned int jtag_ao_tms_pins[] = {GPIOAO_7};
  506. static struct meson_pmx_group meson_axg_aobus_groups[] = {
  507. GPIO_GROUP(GPIOAO_0, 0),
  508. GPIO_GROUP(GPIOAO_1, 0),
  509. GPIO_GROUP(GPIOAO_2, 0),
  510. GPIO_GROUP(GPIOAO_3, 0),
  511. GPIO_GROUP(GPIOAO_4, 0),
  512. GPIO_GROUP(GPIOAO_5, 0),
  513. GPIO_GROUP(GPIOAO_6, 0),
  514. GPIO_GROUP(GPIOAO_7, 0),
  515. GPIO_GROUP(GPIOAO_8, 0),
  516. GPIO_GROUP(GPIOAO_9, 0),
  517. GPIO_GROUP(GPIOAO_10, 0),
  518. GPIO_GROUP(GPIOAO_11, 0),
  519. GPIO_GROUP(GPIOAO_12, 0),
  520. GPIO_GROUP(GPIOAO_13, 0),
  521. GPIO_GROUP(GPIO_TEST_N, 0),
  522. /* bank AO */
  523. GROUP(uart_ao_tx_a, 1),
  524. GROUP(uart_ao_rx_a, 1),
  525. GROUP(uart_ao_cts_a, 2),
  526. GROUP(uart_ao_rts_a, 2),
  527. GROUP(uart_ao_tx_b, 1),
  528. GROUP(uart_ao_rx_b, 1),
  529. GROUP(uart_ao_cts_b, 1),
  530. GROUP(uart_ao_rts_b, 1),
  531. GROUP(i2c_ao_sck_4, 2),
  532. GROUP(i2c_ao_sda_5, 2),
  533. GROUP(i2c_ao_sck_8, 2),
  534. GROUP(i2c_ao_sda_9, 2),
  535. GROUP(i2c_ao_sck_10, 2),
  536. GROUP(i2c_ao_sda_11, 2),
  537. GROUP(i2c_ao_slave_sck, 1),
  538. GROUP(i2c_ao_slave_sda, 1),
  539. GROUP(remote_input_ao, 1),
  540. GROUP(remote_out_ao, 1),
  541. GROUP(pwm_ao_a, 3),
  542. GROUP(pwm_ao_b_ao2, 3),
  543. GROUP(pwm_ao_b_ao12, 3),
  544. GROUP(pwm_ao_c_ao8, 3),
  545. GROUP(pwm_ao_c_ao13, 3),
  546. GROUP(pwm_ao_d, 3),
  547. GROUP(jtag_ao_tdi, 4),
  548. GROUP(jtag_ao_tdo, 4),
  549. GROUP(jtag_ao_clk, 4),
  550. GROUP(jtag_ao_tms, 4),
  551. };
  552. static const char * const gpio_periphs_groups[] = {
  553. "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
  554. "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
  555. "GPIOZ_10",
  556. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  557. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  558. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  559. "GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
  560. "GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
  561. "GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14",
  562. "GPIOA_15", "GPIOA_16", "GPIOA_17", "GPIOA_18", "GPIOA_19",
  563. "GPIOA_20",
  564. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  565. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  566. "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
  567. "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
  568. "GPIOX_20", "GPIOX_21", "GPIOX_22",
  569. "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
  570. "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
  571. "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
  572. "GPIOY_15",
  573. };
  574. static const char * const emmc_groups[] = {
  575. "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
  576. "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
  577. "emmc_nand_d6", "emmc_nand_d7",
  578. "emmc_clk", "emmc_cmd", "emmc_ds",
  579. };
  580. static const char * const nand_groups[] = {
  581. "emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
  582. "emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
  583. "emmc_nand_d6", "emmc_nand_d7",
  584. "nand_ce0", "nand_ale", "nand_cle",
  585. "nand_wen_clk", "nand_ren_wr", "nand_rb0",
  586. };
  587. static const char * const nor_groups[] = {
  588. "nor_d", "nor_q", "nor_c", "nor_cs",
  589. "nor_hold", "nor_wp",
  590. };
  591. static const char * const sdio_groups[] = {
  592. "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
  593. "sdio_cmd", "sdio_clk",
  594. };
  595. static const char * const spi0_groups[] = {
  596. "spi0_clk", "spi0_mosi", "spi0_miso", "spi0_ss0",
  597. "spi0_ss1", "spi0_ss2"
  598. };
  599. static const char * const spi1_groups[] = {
  600. "spi1_clk_x", "spi1_mosi_x", "spi1_miso_x", "spi1_ss0_x",
  601. "spi1_clk_a", "spi1_mosi_a", "spi1_miso_a", "spi1_ss0_a",
  602. "spi1_ss1"
  603. };
  604. static const char * const uart_a_groups[] = {
  605. "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
  606. };
  607. static const char * const uart_b_groups[] = {
  608. "uart_tx_b_z", "uart_rx_b_z", "uart_cts_b_z", "uart_rts_b_z",
  609. "uart_tx_b_x", "uart_rx_b_x", "uart_cts_b_x", "uart_rts_b_x",
  610. };
  611. static const char * const uart_ao_b_z_groups[] = {
  612. "uart_ao_tx_b_z", "uart_ao_rx_b_z",
  613. "uart_ao_cts_b_z", "uart_ao_rts_b_z",
  614. };
  615. static const char * const i2c0_groups[] = {
  616. "i2c0_sck", "i2c0_sda",
  617. };
  618. static const char * const i2c1_groups[] = {
  619. "i2c1_sck_z", "i2c1_sda_z",
  620. "i2c1_sck_x", "i2c1_sda_x",
  621. };
  622. static const char * const i2c2_groups[] = {
  623. "i2c2_sck_x", "i2c2_sda_x",
  624. "i2c2_sda_a", "i2c2_sck_a",
  625. };
  626. static const char * const i2c3_groups[] = {
  627. "i2c3_sda_a6", "i2c3_sck_a7",
  628. "i2c3_sda_a12", "i2c3_sck_a13",
  629. "i2c3_sda_a19", "i2c3_sck_a20",
  630. };
  631. static const char * const eth_groups[] = {
  632. "eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk",
  633. "eth_txd2_rgmii", "eth_txd3_rgmii",
  634. "eth_txd0_x", "eth_txd1_x", "eth_txen_x", "eth_rgmii_rx_clk_x",
  635. "eth_rxd0_x", "eth_rxd1_x", "eth_rx_dv_x", "eth_mdio_x",
  636. "eth_mdc_x",
  637. "eth_txd0_y", "eth_txd1_y", "eth_txen_y", "eth_rgmii_rx_clk_y",
  638. "eth_rxd0_y", "eth_rxd1_y", "eth_rx_dv_y", "eth_mdio_y",
  639. "eth_mdc_y",
  640. };
  641. static const char * const pwm_a_groups[] = {
  642. "pwm_a_z", "pwm_a_x18", "pwm_a_x20", "pwm_a_a",
  643. };
  644. static const char * const pwm_b_groups[] = {
  645. "pwm_b_z", "pwm_b_x", "pwm_b_a",
  646. };
  647. static const char * const pwm_c_groups[] = {
  648. "pwm_c_x10", "pwm_c_x17", "pwm_c_a",
  649. };
  650. static const char * const pwm_d_groups[] = {
  651. "pwm_d_x11", "pwm_d_x16",
  652. };
  653. static const char * const pwm_vs_groups[] = {
  654. "pwm_vs",
  655. };
  656. static const char * const spdif_out_groups[] = {
  657. "spdif_out_z", "spdif_out_a1", "spdif_out_a11",
  658. "spdif_out_a19", "spdif_out_a20",
  659. };
  660. static const char * const spdif_in_groups[] = {
  661. "spdif_in_z", "spdif_in_a1", "spdif_in_a7",
  662. "spdif_in_a19", "spdif_in_a20",
  663. };
  664. static const char * const jtag_ee_groups[] = {
  665. "jtag_tdo_x", "jtag_tdi_x", "jtag_clk_x",
  666. "jtag_tms_x",
  667. };
  668. static const char * const pdm_groups[] = {
  669. "pdm_din0", "pdm_din1", "pdm_din2", "pdm_din3",
  670. "pdm_dclk_a14", "pdm_dclk_a19",
  671. };
  672. static const char * const gpio_aobus_groups[] = {
  673. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
  674. "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
  675. "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
  676. "GPIO_TEST_N",
  677. };
  678. static const char * const uart_ao_a_groups[] = {
  679. "uart_ao_tx_a", "uart_ao_rx_a", "uart_ao_cts_a", "uart_ao_rts_a",
  680. };
  681. static const char * const uart_ao_b_groups[] = {
  682. "uart_ao_tx_b", "uart_ao_rx_b", "uart_ao_cts_b", "uart_ao_rts_b",
  683. };
  684. static const char * const i2c_ao_groups[] = {
  685. "i2c_ao_sck_4", "i2c_ao_sda_5",
  686. "i2c_ao_sck_8", "i2c_ao_sda_9",
  687. "i2c_ao_sck_10", "i2c_ao_sda_11",
  688. };
  689. static const char * const i2c_ao_slave_groups[] = {
  690. "i2c_ao_slave_sck", "i2c_ao_slave_sda",
  691. };
  692. static const char * const remote_input_ao_groups[] = {
  693. "remote_input_ao",
  694. };
  695. static const char * const remote_out_ao_groups[] = {
  696. "remote_out_ao",
  697. };
  698. static const char * const pwm_ao_a_groups[] = {
  699. "pwm_ao_a",
  700. };
  701. static const char * const pwm_ao_b_groups[] = {
  702. "pwm_ao_b_ao2", "pwm_ao_b_ao12",
  703. };
  704. static const char * const pwm_ao_c_groups[] = {
  705. "pwm_ao_c_ao8", "pwm_ao_c_ao13",
  706. };
  707. static const char * const pwm_ao_d_groups[] = {
  708. "pwm_ao_d",
  709. };
  710. static const char * const jtag_ao_groups[] = {
  711. "jtag_ao_tdi", "jtag_ao_tdo", "jtag_ao_clk", "jtag_ao_tms",
  712. };
  713. static const char * const mclk_c_groups[] = {
  714. "mclk_c",
  715. };
  716. static const char * const mclk_b_groups[] = {
  717. "mclk_b",
  718. };
  719. static const char * const tdma_groups[] = {
  720. "tdma_sclk", "tdma_sclk_slv", "tdma_fs", "tdma_fs_slv",
  721. "tdma_din0", "tdma_dout0_x14", "tdma_dout0_x15", "tdma_dout1",
  722. "tdma_din1",
  723. };
  724. static const char * const tdmc_groups[] = {
  725. "tdmc_sclk", "tdmc_sclk_slv", "tdmc_fs", "tdmc_fs_slv",
  726. "tdmc_din0", "tdmc_dout0", "tdmc_din1", "tdmc_dout1",
  727. "tdmc_din2", "tdmc_dout2", "tdmc_din3", "tdmc_dout3",
  728. };
  729. static const char * const tdmb_groups[] = {
  730. "tdmb_sclk", "tdmb_sclk_slv", "tdmb_fs", "tdmb_fs_slv",
  731. "tdmb_din0", "tdmb_dout0", "tdmb_din1", "tdmb_dout1",
  732. "tdmb_din2", "tdmb_dout2", "tdmb_din3", "tdmb_dout3",
  733. };
  734. static struct meson_pmx_func meson_axg_periphs_functions[] = {
  735. FUNCTION(gpio_periphs),
  736. FUNCTION(emmc),
  737. FUNCTION(nor),
  738. FUNCTION(spi0),
  739. FUNCTION(spi1),
  740. FUNCTION(sdio),
  741. FUNCTION(nand),
  742. FUNCTION(uart_a),
  743. FUNCTION(uart_b),
  744. FUNCTION(uart_ao_b_z),
  745. FUNCTION(i2c0),
  746. FUNCTION(i2c1),
  747. FUNCTION(i2c2),
  748. FUNCTION(i2c3),
  749. FUNCTION(eth),
  750. FUNCTION(pwm_a),
  751. FUNCTION(pwm_b),
  752. FUNCTION(pwm_c),
  753. FUNCTION(pwm_d),
  754. FUNCTION(pwm_vs),
  755. FUNCTION(spdif_out),
  756. FUNCTION(spdif_in),
  757. FUNCTION(jtag_ee),
  758. FUNCTION(pdm),
  759. FUNCTION(mclk_b),
  760. FUNCTION(mclk_c),
  761. FUNCTION(tdma),
  762. FUNCTION(tdmb),
  763. FUNCTION(tdmc),
  764. };
  765. static struct meson_pmx_func meson_axg_aobus_functions[] = {
  766. FUNCTION(gpio_aobus),
  767. FUNCTION(uart_ao_a),
  768. FUNCTION(uart_ao_b),
  769. FUNCTION(i2c_ao),
  770. FUNCTION(i2c_ao_slave),
  771. FUNCTION(remote_input_ao),
  772. FUNCTION(remote_out_ao),
  773. FUNCTION(pwm_ao_a),
  774. FUNCTION(pwm_ao_b),
  775. FUNCTION(pwm_ao_c),
  776. FUNCTION(pwm_ao_d),
  777. FUNCTION(jtag_ao),
  778. };
  779. static struct meson_bank meson_axg_periphs_banks[] = {
  780. /* name first last pullen pull dir out in */
  781. BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
  782. BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
  783. BANK("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
  784. BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
  785. BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
  786. };
  787. static struct meson_bank meson_axg_aobus_banks[] = {
  788. /* name first last pullen pull dir out in */
  789. BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
  790. };
  791. static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
  792. /* name first last reg offset */
  793. BANK_PMX("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 0x2, 0),
  794. BANK_PMX("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 0x0, 0),
  795. BANK_PMX("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0xb, 0),
  796. BANK_PMX("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 0x4, 0),
  797. BANK_PMX("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 0x8, 0),
  798. };
  799. static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
  800. .pmx_banks = meson_axg_periphs_pmx_banks,
  801. .num_pmx_banks = ARRAY_SIZE(meson_axg_periphs_pmx_banks),
  802. };
  803. static struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
  804. BANK_PMX("AO", GPIOAO_0, GPIOAO_13, 0x0, 0),
  805. };
  806. static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
  807. .pmx_banks = meson_axg_aobus_pmx_banks,
  808. .num_pmx_banks = ARRAY_SIZE(meson_axg_aobus_pmx_banks),
  809. };
  810. struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
  811. .name = "periphs-banks",
  812. .pin_base = EE_OFF,
  813. .groups = meson_axg_periphs_groups,
  814. .funcs = meson_axg_periphs_functions,
  815. .banks = meson_axg_periphs_banks,
  816. .num_pins = 86,
  817. .num_groups = ARRAY_SIZE(meson_axg_periphs_groups),
  818. .num_funcs = ARRAY_SIZE(meson_axg_periphs_functions),
  819. .num_banks = ARRAY_SIZE(meson_axg_periphs_banks),
  820. .gpio_driver = &meson_axg_gpio_driver,
  821. .pmx_data = &meson_axg_periphs_pmx_banks_data,
  822. };
  823. struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
  824. .name = "aobus-banks",
  825. .pin_base = 0,
  826. .groups = meson_axg_aobus_groups,
  827. .funcs = meson_axg_aobus_functions,
  828. .banks = meson_axg_aobus_banks,
  829. .num_pins = 14,
  830. .num_groups = ARRAY_SIZE(meson_axg_aobus_groups),
  831. .num_funcs = ARRAY_SIZE(meson_axg_aobus_functions),
  832. .num_banks = ARRAY_SIZE(meson_axg_aobus_banks),
  833. .gpio_driver = &meson_axg_gpio_driver,
  834. .pmx_data = &meson_axg_aobus_pmx_banks_data,
  835. };
  836. static const struct udevice_id meson_axg_pinctrl_match[] = {
  837. {
  838. .compatible = "amlogic,meson-axg-periphs-pinctrl",
  839. .data = (ulong)&meson_axg_periphs_pinctrl_data,
  840. },
  841. {
  842. .compatible = "amlogic,meson-axg-aobus-pinctrl",
  843. .data = (ulong)&meson_axg_aobus_pinctrl_data,
  844. },
  845. { /* sentinel */ }
  846. };
  847. U_BOOT_DRIVER(meson_axg_pinctrl) = {
  848. .name = "meson-axg-pinctrl",
  849. .id = UCLASS_PINCTRL,
  850. .of_match = of_match_ptr(meson_axg_pinctrl_match),
  851. .probe = meson_pinctrl_probe,
  852. .priv_auto_alloc_size = sizeof(struct meson_pinctrl),
  853. .ops = &meson_axg_pinctrl_ops,
  854. };