pinctrl-meson-axg-pmx.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Jerome Brunet <jbrunet@baylibre.com>
  4. * Copyright (C) 2017 Xingyu Chen <xingyu.chen@amlogic.com>
  5. */
  6. #include <log.h>
  7. #include <asm/gpio.h>
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <dm/pinctrl.h>
  11. #include <linux/io.h>
  12. #include "pinctrl-meson-axg.h"
  13. static int meson_axg_pmx_get_bank(struct udevice *dev, unsigned int pin,
  14. struct meson_pmx_bank **bank)
  15. {
  16. int i;
  17. struct meson_pinctrl *priv = dev_get_priv(dev);
  18. struct meson_axg_pmx_data *pmx = priv->data->pmx_data;
  19. for (i = 0; i < pmx->num_pmx_banks; i++)
  20. if (pin >= pmx->pmx_banks[i].first &&
  21. pin <= pmx->pmx_banks[i].last) {
  22. *bank = &pmx->pmx_banks[i];
  23. return 0;
  24. }
  25. return -EINVAL;
  26. }
  27. static int meson_axg_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
  28. unsigned int pin,
  29. unsigned int *reg,
  30. unsigned int *offset)
  31. {
  32. int shift;
  33. shift = pin - bank->first;
  34. *reg = bank->reg + (bank->offset + (shift << 2)) / 32;
  35. *offset = (bank->offset + (shift << 2)) % 32;
  36. return 0;
  37. }
  38. static int meson_axg_pmx_update_function(struct udevice *dev,
  39. unsigned int pin, unsigned int func)
  40. {
  41. struct meson_pinctrl *priv = dev_get_priv(dev);
  42. struct meson_pmx_bank *bank;
  43. unsigned int offset;
  44. unsigned int reg;
  45. unsigned int tmp;
  46. int ret;
  47. ret = meson_axg_pmx_get_bank(dev, pin, &bank);
  48. if (ret)
  49. return ret;
  50. meson_axg_pmx_calc_reg_and_offset(bank, pin, &reg, &offset);
  51. tmp = readl(priv->reg_mux + (reg << 2));
  52. tmp &= ~(0xf << offset);
  53. tmp |= (func & 0xf) << offset;
  54. writel(tmp, priv->reg_mux + (reg << 2));
  55. return ret;
  56. }
  57. static int meson_axg_pinmux_group_set(struct udevice *dev,
  58. unsigned int group_selector,
  59. unsigned int func_selector)
  60. {
  61. struct meson_pinctrl *priv = dev_get_priv(dev);
  62. const struct meson_pmx_group *group;
  63. const struct meson_pmx_func *func;
  64. struct meson_pmx_axg_data *pmx_data;
  65. int i, ret;
  66. group = &priv->data->groups[group_selector];
  67. pmx_data = (struct meson_pmx_axg_data *)group->data;
  68. func = &priv->data->funcs[func_selector];
  69. debug("pinmux: set group %s func %s\n", group->name, func->name);
  70. for (i = 0; i < group->num_pins; i++) {
  71. ret = meson_axg_pmx_update_function(dev, group->pins[i],
  72. pmx_data->func);
  73. if (ret)
  74. return ret;
  75. }
  76. return 0;
  77. }
  78. static int meson_axg_pinmux_get(struct udevice *dev, unsigned int selector,
  79. char *buf, int size)
  80. {
  81. struct meson_pinctrl *priv = dev_get_priv(dev);
  82. struct meson_pmx_axg_data *pmx_data;
  83. struct meson_pmx_group *group;
  84. struct meson_pmx_bank *bank;
  85. unsigned int offset;
  86. unsigned int func;
  87. unsigned int reg;
  88. int ret, i, j;
  89. selector += priv->data->pin_base;
  90. ret = meson_axg_pmx_get_bank(dev, selector, &bank);
  91. if (ret) {
  92. snprintf(buf, size, "Unhandled");
  93. return 0;
  94. }
  95. meson_axg_pmx_calc_reg_and_offset(bank, selector, &reg, &offset);
  96. func = (readl(priv->reg_mux + (reg << 2)) >> offset) & 0xf;
  97. for (i = 0; i < priv->data->num_groups; i++) {
  98. group = &priv->data->groups[i];
  99. pmx_data = (struct meson_pmx_axg_data *)group->data;
  100. if (pmx_data->func != func)
  101. continue;
  102. for (j = 0; j < group->num_pins; j++) {
  103. if (group->pins[j] == selector) {
  104. snprintf(buf, size, "%s (%x)",
  105. group->name, func);
  106. return 0;
  107. }
  108. }
  109. }
  110. snprintf(buf, size, "Unknown (%x)", func);
  111. return 0;
  112. }
  113. const struct pinconf_param meson_axg_pinconf_params[] = {
  114. { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
  115. { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
  116. { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
  117. { "drive-strength-microamp", PIN_CONFIG_DRIVE_STRENGTH_UA, 0 },
  118. };
  119. const struct pinctrl_ops meson_axg_pinctrl_ops = {
  120. .get_groups_count = meson_pinctrl_get_groups_count,
  121. .get_group_name = meson_pinctrl_get_group_name,
  122. .get_functions_count = meson_pinmux_get_functions_count,
  123. .get_function_name = meson_pinmux_get_function_name,
  124. .pinmux_group_set = meson_axg_pinmux_group_set,
  125. .set_state = pinctrl_generic_set_state,
  126. .pinconf_params = meson_axg_pinconf_params,
  127. .pinconf_num_params = ARRAY_SIZE(meson_axg_pinconf_params),
  128. .pinconf_set = meson_pinconf_set,
  129. .pinconf_group_set = meson_pinconf_group_set,
  130. .get_pin_name = meson_pinctrl_get_pin_name,
  131. .get_pins_count = meson_pinctrl_get_pins_count,
  132. .get_pin_muxing = meson_axg_pinmux_get,
  133. };
  134. static int meson_axg_gpio_request(struct udevice *dev,
  135. unsigned int offset, const char *label)
  136. {
  137. struct meson_pinctrl *priv = dev_get_priv(dev->parent);
  138. return meson_axg_pmx_update_function(dev->parent,
  139. offset + priv->data->pin_base, 0);
  140. }
  141. static const struct dm_gpio_ops meson_axg_gpio_ops = {
  142. .request = meson_axg_gpio_request,
  143. .set_value = meson_gpio_set,
  144. .get_value = meson_gpio_get,
  145. .get_function = meson_gpio_get_direction,
  146. .direction_input = meson_gpio_direction_input,
  147. .direction_output = meson_gpio_direction_output,
  148. };
  149. const struct driver meson_axg_gpio_driver = {
  150. .name = "meson-axg-gpio",
  151. .id = UCLASS_GPIO,
  152. .probe = meson_gpio_probe,
  153. .ops = &meson_axg_gpio_ops,
  154. };