meson-sm1-khadas-vim3l.dts 3.6 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2019 BayLibre, SAS
  4. * Author: Neil Armstrong <narmstrong@baylibre.com>
  5. */
  6. /dts-v1/;
  7. #include "meson-sm1.dtsi"
  8. #include "meson-khadas-vim3.dtsi"
  9. #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
  10. / {
  11. compatible = "khadas,vim3l", "amlogic,sm1";
  12. model = "Khadas VIM3L";
  13. vddcpu: regulator-vddcpu {
  14. /*
  15. * Silergy SY8030DEC Regulator.
  16. */
  17. compatible = "pwm-regulator";
  18. regulator-name = "VDDCPU";
  19. regulator-min-microvolt = <690000>;
  20. regulator-max-microvolt = <1050000>;
  21. vin-supply = <&vsys_3v3>;
  22. pwms = <&pwm_AO_cd 1 1250 0>;
  23. pwm-dutycycle-range = <100 0>;
  24. regulator-boot-on;
  25. regulator-always-on;
  26. };
  27. sound {
  28. compatible = "amlogic,axg-sound-card";
  29. model = "SM1-KHADAS-VIM3L";
  30. audio-aux-devs = <&tdmout_a>;
  31. audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
  32. "TDMOUT_A IN 1", "FRDDR_B OUT 0",
  33. "TDMOUT_A IN 2", "FRDDR_C OUT 0",
  34. "TDM_A Playback", "TDMOUT_A OUT";
  35. assigned-clocks = <&clkc CLKID_MPLL2>,
  36. <&clkc CLKID_MPLL0>,
  37. <&clkc CLKID_MPLL1>;
  38. assigned-clock-parents = <0>, <0>, <0>;
  39. assigned-clock-rates = <294912000>,
  40. <270950400>,
  41. <393216000>;
  42. status = "okay";
  43. dai-link-0 {
  44. sound-dai = <&frddr_a>;
  45. };
  46. dai-link-1 {
  47. sound-dai = <&frddr_b>;
  48. };
  49. dai-link-2 {
  50. sound-dai = <&frddr_c>;
  51. };
  52. /* 8ch hdmi interface */
  53. dai-link-3 {
  54. sound-dai = <&tdmif_a>;
  55. dai-format = "i2s";
  56. dai-tdm-slot-tx-mask-0 = <1 1>;
  57. dai-tdm-slot-tx-mask-1 = <1 1>;
  58. dai-tdm-slot-tx-mask-2 = <1 1>;
  59. dai-tdm-slot-tx-mask-3 = <1 1>;
  60. mclk-fs = <256>;
  61. codec {
  62. sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
  63. };
  64. };
  65. /* hdmi glue */
  66. dai-link-4 {
  67. sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
  68. codec {
  69. sound-dai = <&hdmi_tx>;
  70. };
  71. };
  72. };
  73. };
  74. &arb {
  75. status = "okay";
  76. };
  77. &clkc_audio {
  78. status = "okay";
  79. };
  80. &cpu0 {
  81. cpu-supply = <&vddcpu>;
  82. operating-points-v2 = <&cpu_opp_table>;
  83. clocks = <&clkc CLKID_CPU_CLK>;
  84. clock-latency = <50000>;
  85. };
  86. &cpu1 {
  87. cpu-supply = <&vddcpu>;
  88. operating-points-v2 = <&cpu_opp_table>;
  89. clocks = <&clkc CLKID_CPU1_CLK>;
  90. clock-latency = <50000>;
  91. };
  92. &cpu2 {
  93. cpu-supply = <&vddcpu>;
  94. operating-points-v2 = <&cpu_opp_table>;
  95. clocks = <&clkc CLKID_CPU2_CLK>;
  96. clock-latency = <50000>;
  97. };
  98. &cpu3 {
  99. cpu-supply = <&vddcpu>;
  100. operating-points-v2 = <&cpu_opp_table>;
  101. clocks = <&clkc CLKID_CPU3_CLK>;
  102. clock-latency = <50000>;
  103. };
  104. &frddr_a {
  105. status = "okay";
  106. };
  107. &frddr_b {
  108. status = "okay";
  109. };
  110. &frddr_c {
  111. status = "okay";
  112. };
  113. &pwm_AO_cd {
  114. pinctrl-0 = <&pwm_ao_d_e_pins>;
  115. pinctrl-names = "default";
  116. clocks = <&xtal>;
  117. clock-names = "clkin1";
  118. status = "okay";
  119. };
  120. /*
  121. * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
  122. * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
  123. * an USB3.0 Type A connector and a M.2 Key M slot.
  124. * The PHY driving these differential lines is shared between
  125. * the USB3.0 controller and the PCIe Controller, thus only
  126. * a single controller can use it.
  127. * If the MCU is configured to mux the PCIe/USB3.0 differential lines
  128. * to the M.2 Key M slot, uncomment the following block to disable
  129. * USB3.0 from the USB Complex and enable the PCIe controller.
  130. * The End User is not expected to uncomment the following except for
  131. * testing purposes, but instead rely on the firmware/bootloader to
  132. * update these nodes accordingly if PCIe mode is selected by the MCU.
  133. */
  134. /*
  135. &pcie {
  136. status = "okay";
  137. };
  138. &sd_emmc_a {
  139. sd-uhs-sdr50;
  140. };
  141. &usb {
  142. phys = <&usb2_phy0>, <&usb2_phy1>;
  143. phy-names = "usb2-phy0", "usb2-phy1";
  144. };
  145. */
  146. &tdmif_a {
  147. status = "okay";
  148. };
  149. &tdmout_a {
  150. status = "okay";
  151. };
  152. &tohdmitx {
  153. status = "okay";
  154. };