meson-gxm.dtsi 4.0 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2016 Endless Computers, Inc.
  4. * Author: Carlo Caione <carlo@endlessm.com>
  5. */
  6. #include "meson-gxl.dtsi"
  7. / {
  8. compatible = "amlogic,meson-gxm";
  9. cpus {
  10. cpu-map {
  11. cluster0 {
  12. core0 {
  13. cpu = <&cpu0>;
  14. };
  15. core1 {
  16. cpu = <&cpu1>;
  17. };
  18. core2 {
  19. cpu = <&cpu2>;
  20. };
  21. core3 {
  22. cpu = <&cpu3>;
  23. };
  24. };
  25. cluster1 {
  26. core0 {
  27. cpu = <&cpu4>;
  28. };
  29. core1 {
  30. cpu = <&cpu5>;
  31. };
  32. core2 {
  33. cpu = <&cpu6>;
  34. };
  35. core3 {
  36. cpu = <&cpu7>;
  37. };
  38. };
  39. };
  40. cpu4: cpu@100 {
  41. device_type = "cpu";
  42. compatible = "arm,cortex-a53";
  43. reg = <0x0 0x100>;
  44. enable-method = "psci";
  45. next-level-cache = <&l2>;
  46. clocks = <&scpi_dvfs 1>;
  47. #cooling-cells = <2>;
  48. };
  49. cpu5: cpu@101 {
  50. device_type = "cpu";
  51. compatible = "arm,cortex-a53";
  52. reg = <0x0 0x101>;
  53. enable-method = "psci";
  54. next-level-cache = <&l2>;
  55. clocks = <&scpi_dvfs 1>;
  56. #cooling-cells = <2>;
  57. };
  58. cpu6: cpu@102 {
  59. device_type = "cpu";
  60. compatible = "arm,cortex-a53";
  61. reg = <0x0 0x102>;
  62. enable-method = "psci";
  63. next-level-cache = <&l2>;
  64. clocks = <&scpi_dvfs 1>;
  65. #cooling-cells = <2>;
  66. };
  67. cpu7: cpu@103 {
  68. device_type = "cpu";
  69. compatible = "arm,cortex-a53";
  70. reg = <0x0 0x103>;
  71. enable-method = "psci";
  72. next-level-cache = <&l2>;
  73. clocks = <&scpi_dvfs 1>;
  74. #cooling-cells = <2>;
  75. };
  76. };
  77. };
  78. &apb {
  79. usb2_phy2: phy@78040 {
  80. compatible = "amlogic,meson-gxl-usb2-phy";
  81. #phy-cells = <0>;
  82. reg = <0x0 0x78040 0x0 0x20>;
  83. clocks = <&clkc CLKID_USB>;
  84. clock-names = "phy";
  85. resets = <&reset RESET_USB_OTG>;
  86. reset-names = "phy";
  87. status = "okay";
  88. };
  89. mali: gpu@c0000 {
  90. compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
  91. reg = <0x0 0xc0000 0x0 0x40000>;
  92. interrupt-parent = <&gic>;
  93. interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
  94. <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
  95. <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
  96. interrupt-names = "job", "mmu", "gpu";
  97. clocks = <&clkc CLKID_MALI>;
  98. resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
  99. /*
  100. * Mali clocking is provided by two identical clock paths
  101. * MALI_0 and MALI_1 muxed to a single clock by a glitch
  102. * free mux to safely change frequency while running.
  103. */
  104. assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
  105. <&clkc CLKID_MALI_0>,
  106. <&clkc CLKID_MALI>; /* Glitch free mux */
  107. assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
  108. <0>, /* Do Nothing */
  109. <&clkc CLKID_MALI_0>;
  110. assigned-clock-rates = <0>, /* Do Nothing */
  111. <666666666>,
  112. <0>; /* Do Nothing */
  113. };
  114. };
  115. &clkc_AO {
  116. compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
  117. };
  118. &cpu_cooling_maps {
  119. map0 {
  120. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  121. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  122. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  123. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  124. <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  125. <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  126. <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  127. <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  128. };
  129. map1 {
  130. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  131. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  132. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  133. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  134. <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  135. <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  136. <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  137. <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  138. };
  139. };
  140. &saradc {
  141. compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
  142. };
  143. &scpi_dvfs {
  144. clock-indices = <0 1>;
  145. clock-output-names = "vbig", "vlittle";
  146. };
  147. &vpu {
  148. compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
  149. };
  150. &hdmi_tx {
  151. compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
  152. };
  153. &usb {
  154. compatible = "amlogic,meson-gxm-usb-ctrl";
  155. phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2";
  156. phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
  157. };
  158. &vdec {
  159. compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
  160. };