cache.c 1.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007 Michal Simek
  4. *
  5. * Michal SIMEK <monstr@monstr.eu>
  6. */
  7. #include <common.h>
  8. #include <cpu_func.h>
  9. #include <asm/asm.h>
  10. #include <asm/cache.h>
  11. int dcache_status(void)
  12. {
  13. int i = 0;
  14. int mask = 0x80;
  15. __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
  16. /* i&=0x80 */
  17. __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
  18. return i;
  19. }
  20. int icache_status(void)
  21. {
  22. int i = 0;
  23. int mask = 0x20;
  24. __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
  25. /* i&=0x20 */
  26. __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
  27. return i;
  28. }
  29. void icache_enable(void)
  30. {
  31. MSRSET(0x20);
  32. }
  33. void icache_disable(void)
  34. {
  35. /* we are not generate ICACHE size -> flush whole cache */
  36. flush_cache(0, 32768);
  37. MSRCLR(0x20);
  38. }
  39. void dcache_enable(void)
  40. {
  41. MSRSET(0x80);
  42. }
  43. void dcache_disable(void)
  44. {
  45. #ifdef XILINX_USE_DCACHE
  46. flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
  47. #endif
  48. MSRCLR(0x80);
  49. }
  50. void flush_cache(ulong addr, ulong size)
  51. {
  52. int i;
  53. for (i = 0; i < size; i += 4)
  54. asm volatile (
  55. #ifdef CONFIG_ICACHE
  56. "wic %0, r0;"
  57. #endif
  58. "nop;"
  59. #ifdef CONFIG_DCACHE
  60. "wdc.flush %0, r0;"
  61. #endif
  62. "nop;"
  63. :
  64. : "r" (addr + i)
  65. : "memory");
  66. }