cpu.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <asm/cache.h>
  8. #include <asm/io.h>
  9. #include <asm/system.h>
  10. #include <asm/armv8/mmu.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/mc_me_regs.h>
  13. #include "cpu.h"
  14. u32 cpu_mask(void)
  15. {
  16. return readl(MC_ME_CS);
  17. }
  18. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  19. #define S32V234_IRAM_BASE 0x3e800000UL
  20. #define S32V234_IRAM_SIZE 0x800000UL
  21. #define S32V234_DRAM_BASE1 0x80000000UL
  22. #define S32V234_DRAM_SIZE1 0x40000000UL
  23. #define S32V234_DRAM_BASE2 0xC0000000UL
  24. #define S32V234_DRAM_SIZE2 0x20000000UL
  25. #define S32V234_PERIPH_BASE 0x40000000UL
  26. #define S32V234_PERIPH_SIZE 0x40000000UL
  27. static struct mm_region s32v234_mem_map[] = {
  28. {
  29. .virt = S32V234_IRAM_BASE,
  30. .phys = S32V234_IRAM_BASE,
  31. .size = S32V234_IRAM_SIZE,
  32. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  33. PTE_BLOCK_OUTER_SHARE
  34. }, {
  35. .virt = S32V234_DRAM_BASE1,
  36. .phys = S32V234_DRAM_BASE1,
  37. .size = S32V234_DRAM_SIZE1,
  38. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  39. PTE_BLOCK_OUTER_SHARE
  40. }, {
  41. .virt = S32V234_PERIPH_BASE,
  42. .phys = S32V234_PERIPH_BASE,
  43. .size = S32V234_PERIPH_SIZE,
  44. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  45. PTE_BLOCK_NON_SHARE
  46. /* TODO: Do we need these? */
  47. /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
  48. }, {
  49. .virt = S32V234_DRAM_BASE2,
  50. .phys = S32V234_DRAM_BASE2,
  51. .size = S32V234_DRAM_SIZE2,
  52. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
  53. PTE_BLOCK_OUTER_SHARE
  54. }, {
  55. /* List terminator */
  56. 0,
  57. }
  58. };
  59. struct mm_region *mem_map = s32v234_mem_map;
  60. #endif
  61. /*
  62. * Return the number of cores on this SOC.
  63. */
  64. int cpu_numcores(void)
  65. {
  66. int numcores;
  67. u32 mask;
  68. mask = cpu_mask();
  69. numcores = hweight32(cpu_mask());
  70. /* Verify if M4 is deactivated */
  71. if (mask & 0x1)
  72. numcores--;
  73. return numcores;
  74. }
  75. #if defined(CONFIG_ARCH_EARLY_INIT_R)
  76. int arch_early_init_r(void)
  77. {
  78. int rv;
  79. asm volatile ("dsb sy");
  80. rv = fsl_s32v234_wake_seconday_cores();
  81. if (rv)
  82. printf("Did not wake secondary cores\n");
  83. asm volatile ("sev");
  84. return 0;
  85. }
  86. #endif /* CONFIG_ARCH_EARLY_INIT_R */