pll_defs.h 2.8 KB

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  1. /*
  2. * Copyright (C) 2011
  3. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef _DV_PLL_DEFS_H_
  24. #define _DV_PLL_DEFS_H_
  25. struct dv_pll_regs {
  26. unsigned int pid; /* 0x00 */
  27. unsigned char rsvd0[224]; /* 0x04 */
  28. unsigned int rstype; /* 0xe4 */
  29. unsigned char rsvd1[24]; /* 0xe8 */
  30. unsigned int pllctl; /* 0x100 */
  31. unsigned char rsvd2[4]; /* 0x104 */
  32. unsigned int secctl; /* 0x108 */
  33. unsigned int rv; /* 0x10c */
  34. unsigned int pllm; /* 0x110 */
  35. unsigned int prediv; /* 0x114 */
  36. unsigned int plldiv1; /* 0x118 */
  37. unsigned int plldiv2; /* 0x11c */
  38. unsigned int plldiv3; /* 0x120 */
  39. unsigned int oscdiv1; /* 0x124 */
  40. unsigned int postdiv; /* 0x128 */
  41. unsigned int bpdiv; /* 0x12c */
  42. unsigned char rsvd5[8]; /* 0x130 */
  43. unsigned int pllcmd; /* 0x138 */
  44. unsigned int pllstat; /* 0x13c */
  45. unsigned int alnctl; /* 0x140 */
  46. unsigned int dchange; /* 0x144 */
  47. unsigned int cken; /* 0x148 */
  48. unsigned int ckstat; /* 0x14c */
  49. unsigned int systat; /* 0x150 */
  50. unsigned char rsvd6[12]; /* 0x154 */
  51. unsigned int plldiv4; /* 0x160 */
  52. unsigned int plldiv5; /* 0x164 */
  53. unsigned int plldiv6; /* 0x168 */
  54. unsigned int plldiv7; /* 0x16C */
  55. unsigned int plldiv8; /* 0x170 */
  56. unsigned int plldiv9; /* 0x174 */
  57. };
  58. #define PLLCTL_PLLEN (1 << 0)
  59. #define PLLCTL_PLLPWRDN (1 << 1)
  60. #define PLLCTL_PLLRST (1 << 3)
  61. #define PLLCTL_PLLENSRC (1 << 5)
  62. #define PLLCTL_RES_9 (1 << 8)
  63. #define PLLSECCTL_TINITZ (1 << 16)
  64. #define PLLSECCTL_TENABLE (1 << 17)
  65. #define PLLSECCTL_TENABLEDIV (1 << 18)
  66. #define PLLSECCTL_STOPMODE (1 << 22)
  67. #define PLLCMD_GOSET (1 << 0)
  68. #define PLL0_LOCK 0x07000000
  69. #define PLL1_LOCK 0x07000000
  70. #define dv_pll0_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL0_BASE)
  71. #define dv_pll1_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL1_BASE)
  72. #define ARM_PLLDIV (offsetof(struct dv_pll_regs, plldiv2))
  73. #define DDR_PLLDIV (offsetof(struct dv_pll_regs, plldiv7))
  74. #define SPI_PLLDIV (offsetof(struct dv_pll_regs, plldiv4))
  75. unsigned int davinci_clk_get(unsigned int div);
  76. #endif /* _DV_PLL_DEFS_H_ */