fdtdec.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <dm/of_extra.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <fdt_support.h>
  13. #include <inttypes.h>
  14. #include <linux/libfdt.h>
  15. #include <serial.h>
  16. #include <asm/sections.h>
  17. #include <linux/ctype.h>
  18. #include <linux/lzo.h>
  19. DECLARE_GLOBAL_DATA_PTR;
  20. /*
  21. * Here are the type we know about. One day we might allow drivers to
  22. * register. For now we just put them here. The COMPAT macro allows us to
  23. * turn this into a sparse list later, and keeps the ID with the name.
  24. *
  25. * NOTE: This list is basically a TODO list for things that need to be
  26. * converted to driver model. So don't add new things here unless there is a
  27. * good reason why driver-model conversion is infeasible. Examples include
  28. * things which are used before driver model is available.
  29. */
  30. #define COMPAT(id, name) name
  31. static const char * const compat_names[COMPAT_COUNT] = {
  32. COMPAT(UNKNOWN, "<none>"),
  33. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  34. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  35. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  36. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  37. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  38. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  39. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  40. COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
  41. COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
  42. COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
  43. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  44. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  45. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  46. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  47. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  48. COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
  49. COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
  50. COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
  51. COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
  52. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  53. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  54. COMPAT(AMS_AS3722, "ams,as3722"),
  55. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  56. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  57. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  58. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  59. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  60. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  61. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  62. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  63. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  64. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  65. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  72. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  73. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  74. };
  75. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  76. {
  77. /* We allow reading of the 'unknown' ID for testing purposes */
  78. assert(id >= 0 && id < COMPAT_COUNT);
  79. return compat_names[id];
  80. }
  81. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  82. const char *prop_name, int index, int na,
  83. int ns, fdt_size_t *sizep,
  84. bool translate)
  85. {
  86. const fdt32_t *prop, *prop_end;
  87. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  88. int len;
  89. fdt_addr_t addr;
  90. debug("%s: %s: ", __func__, prop_name);
  91. if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
  92. debug("(na too large for fdt_addr_t type)\n");
  93. return FDT_ADDR_T_NONE;
  94. }
  95. if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
  96. debug("(ns too large for fdt_size_t type)\n");
  97. return FDT_ADDR_T_NONE;
  98. }
  99. prop = fdt_getprop(blob, node, prop_name, &len);
  100. if (!prop) {
  101. debug("(not found)\n");
  102. return FDT_ADDR_T_NONE;
  103. }
  104. prop_end = prop + (len / sizeof(*prop));
  105. prop_addr = prop + (index * (na + ns));
  106. prop_size = prop_addr + na;
  107. prop_after_size = prop_size + ns;
  108. if (prop_after_size > prop_end) {
  109. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  110. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  111. return FDT_ADDR_T_NONE;
  112. }
  113. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  114. if (translate)
  115. addr = fdt_translate_address(blob, node, prop_addr);
  116. else
  117. #endif
  118. addr = fdtdec_get_number(prop_addr, na);
  119. if (sizep) {
  120. *sizep = fdtdec_get_number(prop_size, ns);
  121. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  122. (unsigned long long)*sizep);
  123. } else {
  124. debug("addr=%08llx\n", (unsigned long long)addr);
  125. }
  126. return addr;
  127. }
  128. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  129. int node, const char *prop_name,
  130. int index, fdt_size_t *sizep,
  131. bool translate)
  132. {
  133. int na, ns;
  134. debug("%s: ", __func__);
  135. na = fdt_address_cells(blob, parent);
  136. if (na < 1) {
  137. debug("(bad #address-cells)\n");
  138. return FDT_ADDR_T_NONE;
  139. }
  140. ns = fdt_size_cells(blob, parent);
  141. if (ns < 0) {
  142. debug("(bad #size-cells)\n");
  143. return FDT_ADDR_T_NONE;
  144. }
  145. debug("na=%d, ns=%d, ", na, ns);
  146. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  147. ns, sizep, translate);
  148. }
  149. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  150. const char *prop_name, int index,
  151. fdt_size_t *sizep,
  152. bool translate)
  153. {
  154. int parent;
  155. debug("%s: ", __func__);
  156. parent = fdt_parent_offset(blob, node);
  157. if (parent < 0) {
  158. debug("(no parent found)\n");
  159. return FDT_ADDR_T_NONE;
  160. }
  161. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  162. index, sizep, translate);
  163. }
  164. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  165. const char *prop_name, fdt_size_t *sizep)
  166. {
  167. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  168. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  169. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  170. ns, sizep, false);
  171. }
  172. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  173. {
  174. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  175. }
  176. #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
  177. int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
  178. const char *prop_name, struct fdt_pci_addr *addr)
  179. {
  180. const u32 *cell;
  181. int len;
  182. int ret = -ENOENT;
  183. debug("%s: %s: ", __func__, prop_name);
  184. /*
  185. * If we follow the pci bus bindings strictly, we should check
  186. * the value of the node's parent node's #address-cells and
  187. * #size-cells. They need to be 3 and 2 accordingly. However,
  188. * for simplicity we skip the check here.
  189. */
  190. cell = fdt_getprop(blob, node, prop_name, &len);
  191. if (!cell)
  192. goto fail;
  193. if ((len % FDT_PCI_REG_SIZE) == 0) {
  194. int num = len / FDT_PCI_REG_SIZE;
  195. int i;
  196. for (i = 0; i < num; i++) {
  197. debug("pci address #%d: %08lx %08lx %08lx\n", i,
  198. (ulong)fdt32_to_cpu(cell[0]),
  199. (ulong)fdt32_to_cpu(cell[1]),
  200. (ulong)fdt32_to_cpu(cell[2]));
  201. if ((fdt32_to_cpu(*cell) & type) == type) {
  202. addr->phys_hi = fdt32_to_cpu(cell[0]);
  203. addr->phys_mid = fdt32_to_cpu(cell[1]);
  204. addr->phys_lo = fdt32_to_cpu(cell[1]);
  205. break;
  206. }
  207. cell += (FDT_PCI_ADDR_CELLS +
  208. FDT_PCI_SIZE_CELLS);
  209. }
  210. if (i == num) {
  211. ret = -ENXIO;
  212. goto fail;
  213. }
  214. return 0;
  215. }
  216. ret = -EINVAL;
  217. fail:
  218. debug("(not found)\n");
  219. return ret;
  220. }
  221. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  222. {
  223. const char *list, *end;
  224. int len;
  225. list = fdt_getprop(blob, node, "compatible", &len);
  226. if (!list)
  227. return -ENOENT;
  228. end = list + len;
  229. while (list < end) {
  230. len = strlen(list);
  231. if (len >= strlen("pciVVVV,DDDD")) {
  232. char *s = strstr(list, "pci");
  233. /*
  234. * check if the string is something like pciVVVV,DDDD.RR
  235. * or just pciVVVV,DDDD
  236. */
  237. if (s && s[7] == ',' &&
  238. (s[12] == '.' || s[12] == 0)) {
  239. s += 3;
  240. *vendor = simple_strtol(s, NULL, 16);
  241. s += 5;
  242. *device = simple_strtol(s, NULL, 16);
  243. return 0;
  244. }
  245. }
  246. list += (len + 1);
  247. }
  248. return -ENOENT;
  249. }
  250. int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
  251. u32 *bar)
  252. {
  253. int barnum;
  254. /* extract the bar number from fdt_pci_addr */
  255. barnum = addr->phys_hi & 0xff;
  256. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  257. return -EINVAL;
  258. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  259. *bar = dm_pci_read_bar32(dev, barnum);
  260. return 0;
  261. }
  262. #endif
  263. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  264. uint64_t default_val)
  265. {
  266. const uint64_t *cell64;
  267. int length;
  268. cell64 = fdt_getprop(blob, node, prop_name, &length);
  269. if (!cell64 || length < sizeof(*cell64))
  270. return default_val;
  271. return fdt64_to_cpu(*cell64);
  272. }
  273. int fdtdec_get_is_enabled(const void *blob, int node)
  274. {
  275. const char *cell;
  276. /*
  277. * It should say "okay", so only allow that. Some fdts use "ok" but
  278. * this is a bug. Please fix your device tree source file. See here
  279. * for discussion:
  280. *
  281. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  282. */
  283. cell = fdt_getprop(blob, node, "status", NULL);
  284. if (cell)
  285. return strcmp(cell, "okay") == 0;
  286. return 1;
  287. }
  288. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  289. {
  290. enum fdt_compat_id id;
  291. /* Search our drivers */
  292. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  293. if (fdt_node_check_compatible(blob, node,
  294. compat_names[id]) == 0)
  295. return id;
  296. return COMPAT_UNKNOWN;
  297. }
  298. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  299. {
  300. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  301. }
  302. int fdtdec_next_compatible_subnode(const void *blob, int node,
  303. enum fdt_compat_id id, int *depthp)
  304. {
  305. do {
  306. node = fdt_next_node(blob, node, depthp);
  307. } while (*depthp > 1);
  308. /* If this is a direct subnode, and compatible, return it */
  309. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  310. blob, node, compat_names[id]))
  311. return node;
  312. return -FDT_ERR_NOTFOUND;
  313. }
  314. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  315. int *upto)
  316. {
  317. #define MAX_STR_LEN 20
  318. char str[MAX_STR_LEN + 20];
  319. int node, err;
  320. /* snprintf() is not available */
  321. assert(strlen(name) < MAX_STR_LEN);
  322. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  323. node = fdt_path_offset(blob, str);
  324. if (node < 0)
  325. return node;
  326. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  327. if (err < 0)
  328. return err;
  329. if (err)
  330. return -FDT_ERR_NOTFOUND;
  331. (*upto)++;
  332. return node;
  333. }
  334. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  335. enum fdt_compat_id id, int *node_list,
  336. int maxcount)
  337. {
  338. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  339. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  340. }
  341. /* TODO: Can we tighten this code up a little? */
  342. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  343. enum fdt_compat_id id, int *node_list,
  344. int maxcount)
  345. {
  346. int name_len = strlen(name);
  347. int nodes[maxcount];
  348. int num_found = 0;
  349. int offset, node;
  350. int alias_node;
  351. int count;
  352. int i, j;
  353. /* find the alias node if present */
  354. alias_node = fdt_path_offset(blob, "/aliases");
  355. /*
  356. * start with nothing, and we can assume that the root node can't
  357. * match
  358. */
  359. memset(nodes, '\0', sizeof(nodes));
  360. /* First find all the compatible nodes */
  361. for (node = count = 0; node >= 0 && count < maxcount;) {
  362. node = fdtdec_next_compatible(blob, node, id);
  363. if (node >= 0)
  364. nodes[count++] = node;
  365. }
  366. if (node >= 0)
  367. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  368. __func__, name);
  369. /* Now find all the aliases */
  370. for (offset = fdt_first_property_offset(blob, alias_node);
  371. offset > 0;
  372. offset = fdt_next_property_offset(blob, offset)) {
  373. const struct fdt_property *prop;
  374. const char *path;
  375. int number;
  376. int found;
  377. node = 0;
  378. prop = fdt_get_property_by_offset(blob, offset, NULL);
  379. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  380. if (prop->len && 0 == strncmp(path, name, name_len))
  381. node = fdt_path_offset(blob, prop->data);
  382. if (node <= 0)
  383. continue;
  384. /* Get the alias number */
  385. number = simple_strtoul(path + name_len, NULL, 10);
  386. if (number < 0 || number >= maxcount) {
  387. debug("%s: warning: alias '%s' is out of range\n",
  388. __func__, path);
  389. continue;
  390. }
  391. /* Make sure the node we found is actually in our list! */
  392. found = -1;
  393. for (j = 0; j < count; j++)
  394. if (nodes[j] == node) {
  395. found = j;
  396. break;
  397. }
  398. if (found == -1) {
  399. debug("%s: warning: alias '%s' points to a node "
  400. "'%s' that is missing or is not compatible "
  401. " with '%s'\n", __func__, path,
  402. fdt_get_name(blob, node, NULL),
  403. compat_names[id]);
  404. continue;
  405. }
  406. /*
  407. * Add this node to our list in the right place, and mark
  408. * it as done.
  409. */
  410. if (fdtdec_get_is_enabled(blob, node)) {
  411. if (node_list[number]) {
  412. debug("%s: warning: alias '%s' requires that "
  413. "a node be placed in the list in a "
  414. "position which is already filled by "
  415. "node '%s'\n", __func__, path,
  416. fdt_get_name(blob, node, NULL));
  417. continue;
  418. }
  419. node_list[number] = node;
  420. if (number >= num_found)
  421. num_found = number + 1;
  422. }
  423. nodes[found] = 0;
  424. }
  425. /* Add any nodes not mentioned by an alias */
  426. for (i = j = 0; i < maxcount; i++) {
  427. if (!node_list[i]) {
  428. for (; j < maxcount; j++)
  429. if (nodes[j] &&
  430. fdtdec_get_is_enabled(blob, nodes[j]))
  431. break;
  432. /* Have we run out of nodes to add? */
  433. if (j == maxcount)
  434. break;
  435. assert(!node_list[i]);
  436. node_list[i] = nodes[j++];
  437. if (i >= num_found)
  438. num_found = i + 1;
  439. }
  440. }
  441. return num_found;
  442. }
  443. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  444. int *seqp)
  445. {
  446. int base_len = strlen(base);
  447. const char *find_name;
  448. int find_namelen;
  449. int prop_offset;
  450. int aliases;
  451. find_name = fdt_get_name(blob, offset, &find_namelen);
  452. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  453. aliases = fdt_path_offset(blob, "/aliases");
  454. for (prop_offset = fdt_first_property_offset(blob, aliases);
  455. prop_offset > 0;
  456. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  457. const char *prop;
  458. const char *name;
  459. const char *slash;
  460. int len, val;
  461. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  462. debug(" - %s, %s\n", name, prop);
  463. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  464. strncmp(name, base, base_len))
  465. continue;
  466. slash = strrchr(prop, '/');
  467. if (strcmp(slash + 1, find_name))
  468. continue;
  469. val = trailing_strtol(name);
  470. if (val != -1) {
  471. *seqp = val;
  472. debug("Found seq %d\n", *seqp);
  473. return 0;
  474. }
  475. }
  476. debug("Not found\n");
  477. return -ENOENT;
  478. }
  479. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  480. {
  481. int chosen_node;
  482. if (!blob)
  483. return NULL;
  484. chosen_node = fdt_path_offset(blob, "/chosen");
  485. return fdt_getprop(blob, chosen_node, name, NULL);
  486. }
  487. int fdtdec_get_chosen_node(const void *blob, const char *name)
  488. {
  489. const char *prop;
  490. prop = fdtdec_get_chosen_prop(blob, name);
  491. if (!prop)
  492. return -FDT_ERR_NOTFOUND;
  493. return fdt_path_offset(blob, prop);
  494. }
  495. int fdtdec_check_fdt(void)
  496. {
  497. /*
  498. * We must have an FDT, but we cannot panic() yet since the console
  499. * is not ready. So for now, just assert(). Boards which need an early
  500. * FDT (prior to console ready) will need to make their own
  501. * arrangements and do their own checks.
  502. */
  503. assert(!fdtdec_prepare_fdt());
  504. return 0;
  505. }
  506. /*
  507. * This function is a little odd in that it accesses global data. At some
  508. * point if the architecture board.c files merge this will make more sense.
  509. * Even now, it is common code.
  510. */
  511. int fdtdec_prepare_fdt(void)
  512. {
  513. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  514. fdt_check_header(gd->fdt_blob)) {
  515. #ifdef CONFIG_SPL_BUILD
  516. puts("Missing DTB\n");
  517. #else
  518. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  519. # ifdef DEBUG
  520. if (gd->fdt_blob) {
  521. printf("fdt_blob=%p\n", gd->fdt_blob);
  522. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  523. 32, 0);
  524. }
  525. # endif
  526. #endif
  527. return -1;
  528. }
  529. return 0;
  530. }
  531. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  532. {
  533. const u32 *phandle;
  534. int lookup;
  535. debug("%s: %s\n", __func__, prop_name);
  536. phandle = fdt_getprop(blob, node, prop_name, NULL);
  537. if (!phandle)
  538. return -FDT_ERR_NOTFOUND;
  539. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  540. return lookup;
  541. }
  542. /**
  543. * Look up a property in a node and check that it has a minimum length.
  544. *
  545. * @param blob FDT blob
  546. * @param node node to examine
  547. * @param prop_name name of property to find
  548. * @param min_len minimum property length in bytes
  549. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  550. found, or -FDT_ERR_BADLAYOUT if not enough data
  551. * @return pointer to cell, which is only valid if err == 0
  552. */
  553. static const void *get_prop_check_min_len(const void *blob, int node,
  554. const char *prop_name, int min_len,
  555. int *err)
  556. {
  557. const void *cell;
  558. int len;
  559. debug("%s: %s\n", __func__, prop_name);
  560. cell = fdt_getprop(blob, node, prop_name, &len);
  561. if (!cell)
  562. *err = -FDT_ERR_NOTFOUND;
  563. else if (len < min_len)
  564. *err = -FDT_ERR_BADLAYOUT;
  565. else
  566. *err = 0;
  567. return cell;
  568. }
  569. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  570. u32 *array, int count)
  571. {
  572. const u32 *cell;
  573. int err = 0;
  574. debug("%s: %s\n", __func__, prop_name);
  575. cell = get_prop_check_min_len(blob, node, prop_name,
  576. sizeof(u32) * count, &err);
  577. if (!err) {
  578. int i;
  579. for (i = 0; i < count; i++)
  580. array[i] = fdt32_to_cpu(cell[i]);
  581. }
  582. return err;
  583. }
  584. int fdtdec_get_int_array_count(const void *blob, int node,
  585. const char *prop_name, u32 *array, int count)
  586. {
  587. const u32 *cell;
  588. int len, elems;
  589. int i;
  590. debug("%s: %s\n", __func__, prop_name);
  591. cell = fdt_getprop(blob, node, prop_name, &len);
  592. if (!cell)
  593. return -FDT_ERR_NOTFOUND;
  594. elems = len / sizeof(u32);
  595. if (count > elems)
  596. count = elems;
  597. for (i = 0; i < count; i++)
  598. array[i] = fdt32_to_cpu(cell[i]);
  599. return count;
  600. }
  601. const u32 *fdtdec_locate_array(const void *blob, int node,
  602. const char *prop_name, int count)
  603. {
  604. const u32 *cell;
  605. int err;
  606. cell = get_prop_check_min_len(blob, node, prop_name,
  607. sizeof(u32) * count, &err);
  608. return err ? NULL : cell;
  609. }
  610. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  611. {
  612. const s32 *cell;
  613. int len;
  614. debug("%s: %s\n", __func__, prop_name);
  615. cell = fdt_getprop(blob, node, prop_name, &len);
  616. return cell != NULL;
  617. }
  618. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  619. const char *list_name,
  620. const char *cells_name,
  621. int cell_count, int index,
  622. struct fdtdec_phandle_args *out_args)
  623. {
  624. const __be32 *list, *list_end;
  625. int rc = 0, size, cur_index = 0;
  626. uint32_t count = 0;
  627. int node = -1;
  628. int phandle;
  629. /* Retrieve the phandle list property */
  630. list = fdt_getprop(blob, src_node, list_name, &size);
  631. if (!list)
  632. return -ENOENT;
  633. list_end = list + size / sizeof(*list);
  634. /* Loop over the phandles until all the requested entry is found */
  635. while (list < list_end) {
  636. rc = -EINVAL;
  637. count = 0;
  638. /*
  639. * If phandle is 0, then it is an empty entry with no
  640. * arguments. Skip forward to the next entry.
  641. */
  642. phandle = be32_to_cpup(list++);
  643. if (phandle) {
  644. /*
  645. * Find the provider node and parse the #*-cells
  646. * property to determine the argument length.
  647. *
  648. * This is not needed if the cell count is hard-coded
  649. * (i.e. cells_name not set, but cell_count is set),
  650. * except when we're going to return the found node
  651. * below.
  652. */
  653. if (cells_name || cur_index == index) {
  654. node = fdt_node_offset_by_phandle(blob,
  655. phandle);
  656. if (!node) {
  657. debug("%s: could not find phandle\n",
  658. fdt_get_name(blob, src_node,
  659. NULL));
  660. goto err;
  661. }
  662. }
  663. if (cells_name) {
  664. count = fdtdec_get_int(blob, node, cells_name,
  665. -1);
  666. if (count == -1) {
  667. debug("%s: could not get %s for %s\n",
  668. fdt_get_name(blob, src_node,
  669. NULL),
  670. cells_name,
  671. fdt_get_name(blob, node,
  672. NULL));
  673. goto err;
  674. }
  675. } else {
  676. count = cell_count;
  677. }
  678. /*
  679. * Make sure that the arguments actually fit in the
  680. * remaining property data length
  681. */
  682. if (list + count > list_end) {
  683. debug("%s: arguments longer than property\n",
  684. fdt_get_name(blob, src_node, NULL));
  685. goto err;
  686. }
  687. }
  688. /*
  689. * All of the error cases above bail out of the loop, so at
  690. * this point, the parsing is successful. If the requested
  691. * index matches, then fill the out_args structure and return,
  692. * or return -ENOENT for an empty entry.
  693. */
  694. rc = -ENOENT;
  695. if (cur_index == index) {
  696. if (!phandle)
  697. goto err;
  698. if (out_args) {
  699. int i;
  700. if (count > MAX_PHANDLE_ARGS) {
  701. debug("%s: too many arguments %d\n",
  702. fdt_get_name(blob, src_node,
  703. NULL), count);
  704. count = MAX_PHANDLE_ARGS;
  705. }
  706. out_args->node = node;
  707. out_args->args_count = count;
  708. for (i = 0; i < count; i++) {
  709. out_args->args[i] =
  710. be32_to_cpup(list++);
  711. }
  712. }
  713. /* Found it! return success */
  714. return 0;
  715. }
  716. node = -1;
  717. list += count;
  718. cur_index++;
  719. }
  720. /*
  721. * Result will be one of:
  722. * -ENOENT : index is for empty phandle
  723. * -EINVAL : parsing error on data
  724. * [1..n] : Number of phandle (count mode; when index = -1)
  725. */
  726. rc = index < 0 ? cur_index : -ENOENT;
  727. err:
  728. return rc;
  729. }
  730. int fdtdec_get_child_count(const void *blob, int node)
  731. {
  732. int subnode;
  733. int num = 0;
  734. fdt_for_each_subnode(subnode, blob, node)
  735. num++;
  736. return num;
  737. }
  738. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  739. u8 *array, int count)
  740. {
  741. const u8 *cell;
  742. int err;
  743. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  744. if (!err)
  745. memcpy(array, cell, count);
  746. return err;
  747. }
  748. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  749. const char *prop_name, int count)
  750. {
  751. const u8 *cell;
  752. int err;
  753. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  754. if (err)
  755. return NULL;
  756. return cell;
  757. }
  758. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  759. int default_val)
  760. {
  761. int config_node;
  762. debug("%s: %s\n", __func__, prop_name);
  763. config_node = fdt_path_offset(blob, "/config");
  764. if (config_node < 0)
  765. return default_val;
  766. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  767. }
  768. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  769. {
  770. int config_node;
  771. const void *prop;
  772. debug("%s: %s\n", __func__, prop_name);
  773. config_node = fdt_path_offset(blob, "/config");
  774. if (config_node < 0)
  775. return 0;
  776. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  777. return prop != NULL;
  778. }
  779. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  780. {
  781. const char *nodep;
  782. int nodeoffset;
  783. int len;
  784. debug("%s: %s\n", __func__, prop_name);
  785. nodeoffset = fdt_path_offset(blob, "/config");
  786. if (nodeoffset < 0)
  787. return NULL;
  788. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  789. if (!nodep)
  790. return NULL;
  791. return (char *)nodep;
  792. }
  793. int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
  794. fdt_addr_t *basep, fdt_size_t *sizep)
  795. {
  796. const fdt_addr_t *cell;
  797. int len;
  798. debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
  799. prop_name);
  800. cell = fdt_getprop(blob, node, prop_name, &len);
  801. if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
  802. debug("cell=%p, len=%d\n", cell, len);
  803. return -1;
  804. }
  805. *basep = fdt_addr_to_cpu(*cell);
  806. *sizep = fdt_size_to_cpu(cell[1]);
  807. debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
  808. (ulong)*sizep);
  809. return 0;
  810. }
  811. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  812. {
  813. u64 number = 0;
  814. while (cells--)
  815. number = (number << 32) | fdt32_to_cpu(*ptr++);
  816. return number;
  817. }
  818. int fdt_get_resource(const void *fdt, int node, const char *property,
  819. unsigned int index, struct fdt_resource *res)
  820. {
  821. const fdt32_t *ptr, *end;
  822. int na, ns, len, parent;
  823. unsigned int i = 0;
  824. parent = fdt_parent_offset(fdt, node);
  825. if (parent < 0)
  826. return parent;
  827. na = fdt_address_cells(fdt, parent);
  828. ns = fdt_size_cells(fdt, parent);
  829. ptr = fdt_getprop(fdt, node, property, &len);
  830. if (!ptr)
  831. return len;
  832. end = ptr + len / sizeof(*ptr);
  833. while (ptr + na + ns <= end) {
  834. if (i == index) {
  835. res->start = fdtdec_get_number(ptr, na);
  836. res->end = res->start;
  837. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  838. return 0;
  839. }
  840. ptr += na + ns;
  841. i++;
  842. }
  843. return -FDT_ERR_NOTFOUND;
  844. }
  845. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  846. const char *prop_names, const char *name,
  847. struct fdt_resource *res)
  848. {
  849. int index;
  850. index = fdt_stringlist_search(fdt, node, prop_names, name);
  851. if (index < 0)
  852. return index;
  853. return fdt_get_resource(fdt, node, property, index, res);
  854. }
  855. int fdtdec_decode_memory_region(const void *blob, int config_node,
  856. const char *mem_type, const char *suffix,
  857. fdt_addr_t *basep, fdt_size_t *sizep)
  858. {
  859. char prop_name[50];
  860. const char *mem;
  861. fdt_size_t size, offset_size;
  862. fdt_addr_t base, offset;
  863. int node;
  864. if (config_node == -1) {
  865. config_node = fdt_path_offset(blob, "/config");
  866. if (config_node < 0) {
  867. debug("%s: Cannot find /config node\n", __func__);
  868. return -ENOENT;
  869. }
  870. }
  871. if (!suffix)
  872. suffix = "";
  873. snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
  874. suffix);
  875. mem = fdt_getprop(blob, config_node, prop_name, NULL);
  876. if (!mem) {
  877. debug("%s: No memory type for '%s', using /memory\n", __func__,
  878. prop_name);
  879. mem = "/memory";
  880. }
  881. node = fdt_path_offset(blob, mem);
  882. if (node < 0) {
  883. debug("%s: Failed to find node '%s': %s\n", __func__, mem,
  884. fdt_strerror(node));
  885. return -ENOENT;
  886. }
  887. /*
  888. * Not strictly correct - the memory may have multiple banks. We just
  889. * use the first
  890. */
  891. if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
  892. debug("%s: Failed to decode memory region %s\n", __func__,
  893. mem);
  894. return -EINVAL;
  895. }
  896. snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
  897. suffix);
  898. if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
  899. &offset_size)) {
  900. debug("%s: Failed to decode memory region '%s'\n", __func__,
  901. prop_name);
  902. return -EINVAL;
  903. }
  904. *basep = base + offset;
  905. *sizep = offset_size;
  906. return 0;
  907. }
  908. static int decode_timing_property(const void *blob, int node, const char *name,
  909. struct timing_entry *result)
  910. {
  911. int length, ret = 0;
  912. const u32 *prop;
  913. prop = fdt_getprop(blob, node, name, &length);
  914. if (!prop) {
  915. debug("%s: could not find property %s\n",
  916. fdt_get_name(blob, node, NULL), name);
  917. return length;
  918. }
  919. if (length == sizeof(u32)) {
  920. result->typ = fdtdec_get_int(blob, node, name, 0);
  921. result->min = result->typ;
  922. result->max = result->typ;
  923. } else {
  924. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  925. }
  926. return ret;
  927. }
  928. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  929. struct display_timing *dt)
  930. {
  931. int i, node, timings_node;
  932. u32 val = 0;
  933. int ret = 0;
  934. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  935. if (timings_node < 0)
  936. return timings_node;
  937. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  938. node > 0 && i != index;
  939. node = fdt_next_subnode(blob, node))
  940. i++;
  941. if (node < 0)
  942. return node;
  943. memset(dt, 0, sizeof(*dt));
  944. ret |= decode_timing_property(blob, node, "hback-porch",
  945. &dt->hback_porch);
  946. ret |= decode_timing_property(blob, node, "hfront-porch",
  947. &dt->hfront_porch);
  948. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  949. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  950. ret |= decode_timing_property(blob, node, "vback-porch",
  951. &dt->vback_porch);
  952. ret |= decode_timing_property(blob, node, "vfront-porch",
  953. &dt->vfront_porch);
  954. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  955. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  956. ret |= decode_timing_property(blob, node, "clock-frequency",
  957. &dt->pixelclock);
  958. dt->flags = 0;
  959. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  960. if (val != -1) {
  961. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  962. DISPLAY_FLAGS_VSYNC_LOW;
  963. }
  964. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  965. if (val != -1) {
  966. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  967. DISPLAY_FLAGS_HSYNC_LOW;
  968. }
  969. val = fdtdec_get_int(blob, node, "de-active", -1);
  970. if (val != -1) {
  971. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  972. DISPLAY_FLAGS_DE_LOW;
  973. }
  974. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  975. if (val != -1) {
  976. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  977. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  978. }
  979. if (fdtdec_get_bool(blob, node, "interlaced"))
  980. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  981. if (fdtdec_get_bool(blob, node, "doublescan"))
  982. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  983. if (fdtdec_get_bool(blob, node, "doubleclk"))
  984. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  985. return ret;
  986. }
  987. int fdtdec_setup_memory_size(void)
  988. {
  989. int ret, mem;
  990. struct fdt_resource res;
  991. mem = fdt_path_offset(gd->fdt_blob, "/memory");
  992. if (mem < 0) {
  993. debug("%s: Missing /memory node\n", __func__);
  994. return -EINVAL;
  995. }
  996. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
  997. if (ret != 0) {
  998. debug("%s: Unable to decode first memory bank\n", __func__);
  999. return -EINVAL;
  1000. }
  1001. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  1002. debug("%s: Initial DRAM size %llx\n", __func__,
  1003. (unsigned long long)gd->ram_size);
  1004. return 0;
  1005. }
  1006. #if defined(CONFIG_NR_DRAM_BANKS)
  1007. int fdtdec_setup_memory_banksize(void)
  1008. {
  1009. int bank, ret, mem, reg = 0;
  1010. struct fdt_resource res;
  1011. mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
  1012. "memory", 7);
  1013. if (mem < 0) {
  1014. debug("%s: Missing /memory node\n", __func__);
  1015. return -EINVAL;
  1016. }
  1017. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1018. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
  1019. if (ret == -FDT_ERR_NOTFOUND) {
  1020. reg = 0;
  1021. mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
  1022. "device_type",
  1023. "memory", 7);
  1024. if (mem == -FDT_ERR_NOTFOUND)
  1025. break;
  1026. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
  1027. if (ret == -FDT_ERR_NOTFOUND)
  1028. break;
  1029. }
  1030. if (ret != 0) {
  1031. return -EINVAL;
  1032. }
  1033. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  1034. gd->bd->bi_dram[bank].size =
  1035. (phys_size_t)(res.end - res.start + 1);
  1036. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  1037. __func__, bank,
  1038. (unsigned long long)gd->bd->bi_dram[bank].start,
  1039. (unsigned long long)gd->bd->bi_dram[bank].size);
  1040. }
  1041. return 0;
  1042. }
  1043. #endif
  1044. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1045. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1046. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1047. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1048. {
  1049. size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
  1050. ulong sz_in = sz_src;
  1051. void *dst;
  1052. int rc;
  1053. if (CONFIG_IS_ENABLED(GZIP))
  1054. if (gzip_parse_header(src, sz_in) < 0)
  1055. return -1;
  1056. if (CONFIG_IS_ENABLED(LZO))
  1057. if (!lzop_is_valid_header(src))
  1058. return -EBADMSG;
  1059. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1060. dst = malloc(sz_out);
  1061. if (!dst) {
  1062. puts("uncompress_blob: Unable to allocate memory\n");
  1063. return -ENOMEM;
  1064. }
  1065. } else {
  1066. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1067. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1068. # else
  1069. return -ENOTSUPP;
  1070. # endif
  1071. }
  1072. if (CONFIG_IS_ENABLED(GZIP))
  1073. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1074. else if (CONFIG_IS_ENABLED(LZO))
  1075. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1076. if (rc < 0) {
  1077. /* not a valid compressed blob */
  1078. puts("uncompress_blob: Unable to uncompress\n");
  1079. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1080. free(dst);
  1081. return -EBADMSG;
  1082. }
  1083. *dstp = dst;
  1084. return 0;
  1085. }
  1086. # else
  1087. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1088. {
  1089. return -ENOTSUPP;
  1090. }
  1091. # endif
  1092. #endif
  1093. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1094. /*
  1095. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1096. * provide and/or fixup the fdt.
  1097. */
  1098. __weak void *board_fdt_blob_setup(void)
  1099. {
  1100. void *fdt_blob = NULL;
  1101. #ifdef CONFIG_SPL_BUILD
  1102. /* FDT is at end of BSS unless it is in a different memory region */
  1103. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1104. fdt_blob = (ulong *)&_image_binary_end;
  1105. else
  1106. fdt_blob = (ulong *)&__bss_end;
  1107. #else
  1108. /* FDT is at end of image */
  1109. fdt_blob = (ulong *)&_end;
  1110. #endif
  1111. return fdt_blob;
  1112. }
  1113. #endif
  1114. int fdtdec_setup(void)
  1115. {
  1116. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1117. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1118. void *fdt_blob;
  1119. # endif
  1120. # ifdef CONFIG_OF_EMBED
  1121. /* Get a pointer to the FDT */
  1122. # ifdef CONFIG_SPL_BUILD
  1123. gd->fdt_blob = __dtb_dt_spl_begin;
  1124. # else
  1125. gd->fdt_blob = __dtb_dt_begin;
  1126. # endif
  1127. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1128. /* Allow the board to override the fdt address. */
  1129. gd->fdt_blob = board_fdt_blob_setup();
  1130. # elif defined(CONFIG_OF_HOSTFILE)
  1131. if (sandbox_read_fdt_from_file()) {
  1132. puts("Failed to read control FDT\n");
  1133. return -1;
  1134. }
  1135. # endif
  1136. # ifndef CONFIG_SPL_BUILD
  1137. /* Allow the early environment to override the fdt address */
  1138. # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
  1139. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1140. # else
  1141. gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
  1142. (uintptr_t)gd->fdt_blob);
  1143. # endif
  1144. # endif
  1145. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1146. /*
  1147. * Try and uncompress the blob.
  1148. * Unfortunately there is no way to know how big the input blob really
  1149. * is. So let us set the maximum input size arbitrarily high. 16MB
  1150. * ought to be more than enough for packed DTBs.
  1151. */
  1152. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1153. gd->fdt_blob = fdt_blob;
  1154. /*
  1155. * Check if blob is a FIT images containings DTBs.
  1156. * If so, pick the most relevant
  1157. */
  1158. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1159. if (fdt_blob)
  1160. gd->fdt_blob = fdt_blob;
  1161. # endif
  1162. #endif
  1163. return fdtdec_prepare_fdt();
  1164. }
  1165. #ifdef CONFIG_NR_DRAM_BANKS
  1166. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1167. phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
  1168. {
  1169. int addr_cells, size_cells;
  1170. const u32 *cell, *end;
  1171. u64 total_size, size, addr;
  1172. int node, child;
  1173. bool auto_size;
  1174. int bank;
  1175. int len;
  1176. debug("%s: board_id=%d\n", __func__, board_id);
  1177. if (!area)
  1178. area = "/memory";
  1179. node = fdt_path_offset(blob, area);
  1180. if (node < 0) {
  1181. debug("No %s node found\n", area);
  1182. return -ENOENT;
  1183. }
  1184. cell = fdt_getprop(blob, node, "reg", &len);
  1185. if (!cell) {
  1186. debug("No reg property found\n");
  1187. return -ENOENT;
  1188. }
  1189. addr_cells = fdt_address_cells(blob, node);
  1190. size_cells = fdt_size_cells(blob, node);
  1191. /* Check the board id and mask */
  1192. for (child = fdt_first_subnode(blob, node);
  1193. child >= 0;
  1194. child = fdt_next_subnode(blob, child)) {
  1195. int match_mask, match_value;
  1196. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1197. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1198. if (match_value >= 0 &&
  1199. ((board_id & match_mask) == match_value)) {
  1200. /* Found matching mask */
  1201. debug("Found matching mask %d\n", match_mask);
  1202. node = child;
  1203. cell = fdt_getprop(blob, node, "reg", &len);
  1204. if (!cell) {
  1205. debug("No memory-banks property found\n");
  1206. return -EINVAL;
  1207. }
  1208. break;
  1209. }
  1210. }
  1211. /* Note: if no matching subnode was found we use the parent node */
  1212. if (bd) {
  1213. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1214. CONFIG_NR_DRAM_BANKS);
  1215. }
  1216. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1217. total_size = 0;
  1218. end = cell + len / 4 - addr_cells - size_cells;
  1219. debug("cell at %p, end %p\n", cell, end);
  1220. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1221. if (cell > end)
  1222. break;
  1223. addr = 0;
  1224. if (addr_cells == 2)
  1225. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1226. addr += fdt32_to_cpu(*cell++);
  1227. if (bd)
  1228. bd->bi_dram[bank].start = addr;
  1229. if (basep && !bank)
  1230. *basep = (phys_addr_t)addr;
  1231. size = 0;
  1232. if (size_cells == 2)
  1233. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1234. size += fdt32_to_cpu(*cell++);
  1235. if (auto_size) {
  1236. u64 new_size;
  1237. debug("Auto-sizing %" PRIx64 ", size %" PRIx64 ": ",
  1238. addr, size);
  1239. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1240. if (new_size == size) {
  1241. debug("OK\n");
  1242. } else {
  1243. debug("sized to %" PRIx64 "\n", new_size);
  1244. size = new_size;
  1245. }
  1246. }
  1247. if (bd)
  1248. bd->bi_dram[bank].size = size;
  1249. total_size += size;
  1250. }
  1251. debug("Memory size %" PRIu64 "\n", total_size);
  1252. if (sizep)
  1253. *sizep = (phys_size_t)total_size;
  1254. return 0;
  1255. }
  1256. #endif /* CONFIG_NR_DRAM_BANKS */
  1257. #endif /* !USE_HOSTCC */