aria.c 2.3 KB

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  1. /*
  2. * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
  3. * (C) Copyright 2009 Dave Srl www.dave.eu
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <asm/bitops.h>
  9. #include <command.h>
  10. #include <asm/io.h>
  11. #include <asm/processor.h>
  12. #include <asm/mpc512x.h>
  13. #include <fdt_support.h>
  14. #ifdef CONFIG_MISC_INIT_R
  15. #include <i2c.h>
  16. #endif
  17. DECLARE_GLOBAL_DATA_PTR;
  18. int dram_init(void)
  19. {
  20. gd->ram_size = fixed_sdram(NULL, NULL, 0);
  21. return 0;
  22. }
  23. int misc_init_r(void)
  24. {
  25. u32 tmp;
  26. tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
  27. printf("FPGA: %u-%u.%u.%u\n",
  28. (tmp & 0xFF000000) >> 24,
  29. (tmp & 0x00FF0000) >> 16,
  30. (tmp & 0x0000FF00) >> 8,
  31. tmp & 0x000000FF
  32. );
  33. return 0;
  34. }
  35. static iopin_t ioregs_init[] = {
  36. /*
  37. * FEC
  38. */
  39. /* FEC on PSCx_x*/
  40. {
  41. offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0,
  42. IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  43. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  44. },
  45. {
  46. offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0,
  47. IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  48. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  49. },
  50. {
  51. offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
  52. IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  53. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  54. },
  55. /*
  56. * DIU
  57. */
  58. /* FUNC2=DIU CLK */
  59. {
  60. offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0,
  61. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  62. IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
  63. },
  64. /* FUNC2=DIU_HSYNC */
  65. {
  66. offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0,
  67. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  68. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  69. },
  70. /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
  71. {
  72. offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0,
  73. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  74. IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  75. },
  76. /*
  77. * On board SRAM
  78. */
  79. /* FUNC2=/LPC CS6 */
  80. {
  81. offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0,
  82. IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  83. IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
  84. },
  85. };
  86. int checkboard (void)
  87. {
  88. puts("Board: ARIA\n");
  89. /* initialize function mux & slew rate IO inter alia on IO Pins */
  90. iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
  91. return 0;
  92. }
  93. #ifdef CONFIG_OF_BOARD_SETUP
  94. int ft_board_setup(void *blob, bd_t *bd)
  95. {
  96. ft_cpu_setup(blob, bd);
  97. return 0;
  98. }
  99. #endif /* CONFIG_OF_BOARD_SETUP */