dm9161.h 4.8 KB

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  1. /*
  2. * NOTE: DAVICOM ethernet Physical layer
  3. *
  4. * Version: @(#)DM9161.h 1.0.0 01/10/2001
  5. *
  6. * Authors: ATMEL Rousset
  7. *
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. */
  11. /* DAVICOM PHYSICAL LAYER TRANSCEIVER DM9161 */
  12. #define DM9161_BMCR 0 /* Basic Mode Control Register */
  13. #define DM9161_BMSR 1 /* Basic Mode Status Register */
  14. #define DM9161_PHYID1 2 /* PHY Idendifier Register 1 */
  15. #define DM9161_PHYID2 3 /* PHY Idendifier Register 2 */
  16. #define DM9161_ANAR 4 /* Auto_Negotiation Advertisement Register */
  17. #define DM9161_ANLPAR 5 /* Auto_negotiation Link Partner Ability Register */
  18. #define DM9161_ANER 6 /* Auto-negotiation Expansion Register */
  19. #define DM9161_DSCR 16 /* Specified Configuration Register */
  20. #define DM9161_DSCSR 17 /* Specified Configuration and Status Register */
  21. #define DM9161_10BTCSR 18 /* 10BASE-T Configuration and Satus Register */
  22. #define DM9161_MDINTR 21 /* Specified Interrupt Register */
  23. #define DM9161_RECR 22 /* Specified Receive Error Counter Register */
  24. #define DM9161_DISCR 23 /* Specified Disconnect Counter Register */
  25. #define DM9161_RLSR 24 /* Hardware Reset Latch State Register */
  26. /* --Bit definitions: DM9161_BMCR */
  27. #define DM9161_RESET (1 << 15) /* 1= Software Reset; 0=Normal Operation */
  28. #define DM9161_LOOPBACK (1 << 14) /* 1=loopback Enabled; 0=Normal Operation */
  29. #define DM9161_SPEED_SELECT (1 << 13) /* 1=100Mbps; 0=10Mbps */
  30. #define DM9161_AUTONEG (1 << 12)
  31. #define DM9161_POWER_DOWN (1 << 11)
  32. #define DM9161_ISOLATE (1 << 10)
  33. #define DM9161_RESTART_AUTONEG (1 << 9)
  34. #define DM9161_DUPLEX_MODE (1 << 8)
  35. #define DM9161_COLLISION_TEST (1 << 7)
  36. /*--Bit definitions: DM9161_BMSR */
  37. #define DM9161_100BASE_TX (1 << 15)
  38. #define DM9161_100BASE_TX_FD (1 << 14)
  39. #define DM9161_100BASE_TX_HD (1 << 13)
  40. #define DM9161_10BASE_T_FD (1 << 12)
  41. #define DM9161_10BASE_T_HD (1 << 11)
  42. #define DM9161_MF_PREAMB_SUPPR (1 << 6)
  43. #define DM9161_AUTONEG_COMP (1 << 5)
  44. #define DM9161_REMOTE_FAULT (1 << 4)
  45. #define DM9161_AUTONEG_ABILITY (1 << 3)
  46. #define DM9161_LINK_STATUS (1 << 2)
  47. #define DM9161_JABBER_DETECT (1 << 1)
  48. #define DM9161_EXTEND_CAPAB (1 << 0)
  49. /*--definitions: DM9161_PHYID1 */
  50. #define DM9161_PHYID1_OUI 0x606E
  51. #define DM9161_LSB_MASK 0x3F
  52. /*--Bit definitions: DM9161_ANAR, DM9161_ANLPAR */
  53. #define DM9161_NP (1 << 15)
  54. #define DM9161_ACK (1 << 14)
  55. #define DM9161_RF (1 << 13)
  56. #define DM9161_FCS (1 << 10)
  57. #define DM9161_T4 (1 << 9)
  58. #define DM9161_TX_FDX (1 << 8)
  59. #define DM9161_TX_HDX (1 << 7)
  60. #define DM9161_10_FDX (1 << 6)
  61. #define DM9161_10_HDX (1 << 5)
  62. #define DM9161_AN_IEEE_802_3 0x0001
  63. /*--Bit definitions: DM9161_ANER */
  64. #define DM9161_PDF (1 << 4)
  65. #define DM9161_LP_NP_ABLE (1 << 3)
  66. #define DM9161_NP_ABLE (1 << 2)
  67. #define DM9161_PAGE_RX (1 << 1)
  68. #define DM9161_LP_AN_ABLE (1 << 0)
  69. /*--Bit definitions: DM9161_DSCR */
  70. #define DM9161_BP4B5B (1 << 15)
  71. #define DM9161_BP_SCR (1 << 14)
  72. #define DM9161_BP_ALIGN (1 << 13)
  73. #define DM9161_BP_ADPOK (1 << 12)
  74. #define DM9161_REPEATER (1 << 11)
  75. #define DM9161_TX (1 << 10)
  76. #define DM9161_RMII_ENABLE (1 << 8)
  77. #define DM9161_F_LINK_100 (1 << 7)
  78. #define DM9161_SPLED_CTL (1 << 6)
  79. #define DM9161_COLLED_CTL (1 << 5)
  80. #define DM9161_RPDCTR_EN (1 << 4)
  81. #define DM9161_SM_RST (1 << 3)
  82. #define DM9161_MFP SC (1 << 2)
  83. #define DM9161_SLEEP (1 << 1)
  84. #define DM9161_RLOUT (1 << 0)
  85. /*--Bit definitions: DM9161_DSCSR */
  86. #define DM9161_100FDX (1 << 15)
  87. #define DM9161_100HDX (1 << 14)
  88. #define DM9161_10FDX (1 << 13)
  89. #define DM9161_10HDX (1 << 12)
  90. /*--Bit definitions: DM9161_10BTCSR */
  91. #define DM9161_LP_EN (1 << 14)
  92. #define DM9161_HBE (1 << 13)
  93. #define DM9161_SQUELCH (1 << 12)
  94. #define DM9161_JABEN (1 << 11)
  95. #define DM9161_10BT_SER (1 << 10)
  96. #define DM9161_POLR (1 << 0)
  97. /*--Bit definitions: DM9161_MDINTR */
  98. #define DM9161_INTR_PEND (1 << 15)
  99. #define DM9161_FDX_MASK (1 << 11)
  100. #define DM9161_SPD_MASK (1 << 10)
  101. #define DM9161_LINK_MASK (1 << 9)
  102. #define DM9161_INTR_MASK (1 << 8)
  103. #define DM9161_FDX_CHANGE (1 << 4)
  104. #define DM9161_SPD_CHANGE (1 << 3)
  105. #define DM9161_LINK_CHANGE (1 << 2)
  106. #define DM9161_INTR_STATUS (1 << 0)
  107. /****************** function prototypes **********************/
  108. unsigned int dm9161_IsPhyConnected(AT91PS_EMAC p_mac);
  109. unsigned char dm9161_GetLinkSpeed(AT91PS_EMAC p_mac);
  110. unsigned char dm9161_AutoNegotiate(AT91PS_EMAC p_mac, int *status);
  111. unsigned char dm9161_InitPhy(AT91PS_EMAC p_mac);