walnut.h 7.6 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /*
  8. * board/config.h - configuration options, board specific
  9. */
  10. #ifndef __CONFIG_H
  11. #define __CONFIG_H
  12. /*
  13. * High Level Configuration Options
  14. * (easy to change)
  15. */
  16. #define CONFIG_405GP 1 /* This is a PPC405 CPU */
  17. #define CONFIG_4xx 1 /* ...member of PPC4xx family */
  18. #define CONFIG_WALNUT 1 /* ...on a WALNUT board */
  19. /* ...or on a SYCAMORE board */
  20. #define CONFIG_SYS_TEXT_BASE 0xFFFC0000
  21. /*
  22. * Include common defines/options for all AMCC eval boards
  23. */
  24. #define CONFIG_HOSTNAME walnut
  25. #include "amcc-common.h"
  26. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
  27. #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
  28. /*
  29. * Default environment variables
  30. */
  31. #define CONFIG_EXTRA_ENV_SETTINGS \
  32. CONFIG_AMCC_DEF_ENV \
  33. CONFIG_AMCC_DEF_ENV_POWERPC \
  34. CONFIG_AMCC_DEF_ENV_PPC_OLD \
  35. CONFIG_AMCC_DEF_ENV_NOR_UPD \
  36. "kernel_addr=fff80000\0" \
  37. "ramdisk_addr=fff80000\0" \
  38. ""
  39. #define CONFIG_PHY_ADDR 1 /* PHY address */
  40. #define CONFIG_HAS_ETH0 1
  41. #define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */
  42. /*
  43. * Commands additional to the ones defined in amcc-common.h
  44. */
  45. #define CONFIG_CMD_DATE
  46. #define CONFIG_CMD_PCI
  47. #define CONFIG_CMD_SDRAM
  48. #define CONFIG_CMD_SNTP
  49. #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
  50. /*
  51. * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
  52. * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
  53. * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
  54. * The Linux BASE_BAUD define should match this configuration.
  55. * baseBaud = cpuClock/(uartDivisor*16)
  56. * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  57. * set Linux BASE_BAUD to 403200.
  58. */
  59. #define CONFIG_CONS_INDEX 1 /* Use UART0 */
  60. #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
  61. #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
  62. #define CONFIG_SYS_BASE_BAUD 691200
  63. /*-----------------------------------------------------------------------
  64. * I2C stuff
  65. *-----------------------------------------------------------------------
  66. */
  67. #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  68. #define CONFIG_SYS_I2C_MULTI_EEPROMS
  69. #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
  70. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  71. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
  72. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
  73. /*-----------------------------------------------------------------------
  74. * PCI stuff
  75. *-----------------------------------------------------------------------
  76. */
  77. #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
  78. #define PCI_HOST_FORCE 1 /* configure as pci host */
  79. #define PCI_HOST_AUTO 2 /* detected via arbiter enable */
  80. #define CONFIG_PCI /* include pci support */
  81. #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
  82. #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
  83. #define CONFIG_PCI_PNP /* do pci plug-and-play */
  84. /* resource configuration */
  85. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  86. #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
  87. #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
  88. #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
  89. #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
  90. #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
  91. #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
  92. #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
  93. #define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
  94. /*-----------------------------------------------------------------------
  95. * Start addresses for the final memory configuration
  96. * (Set up by the startup code)
  97. */
  98. #define CONFIG_SYS_FLASH_BASE 0xFFF80000
  99. /*
  100. * Define here the location of the environment variables (FLASH or NVRAM).
  101. * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
  102. * supported for backward compatibility.
  103. */
  104. #if 1
  105. #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  106. #else
  107. #define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
  108. #endif
  109. /*-----------------------------------------------------------------------
  110. * FLASH organization
  111. */
  112. #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
  113. #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
  114. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  115. #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
  116. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  117. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  118. #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  119. #define CONFIG_SYS_FLASH_ADDR0 0x5555
  120. #define CONFIG_SYS_FLASH_ADDR1 0x2aaa
  121. #define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
  122. #ifdef CONFIG_ENV_IS_IN_FLASH
  123. #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
  124. #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
  125. #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
  126. /* Address and size of Redundant Environment Sector */
  127. #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
  128. #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
  129. #endif /* CONFIG_ENV_IS_IN_FLASH */
  130. /*-----------------------------------------------------------------------
  131. * NVRAM organization
  132. */
  133. #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
  134. #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
  135. #ifdef CONFIG_ENV_IS_IN_NVRAM
  136. #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
  137. #define CONFIG_ENV_ADDR \
  138. (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
  139. #endif
  140. /*-----------------------------------------------------------------------
  141. * External Bus Controller (EBC) Setup
  142. */
  143. /* Memory Bank 0 (Flash Bank 0) initialization */
  144. #define CONFIG_SYS_EBC_PB0AP 0x9B015480
  145. #define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
  146. #define CONFIG_SYS_EBC_PB1AP 0x02815480
  147. #define CONFIG_SYS_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
  148. #define CONFIG_SYS_EBC_PB2AP 0x04815A80
  149. #define CONFIG_SYS_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
  150. #define CONFIG_SYS_EBC_PB3AP 0x01815280
  151. #define CONFIG_SYS_EBC_PB3CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */
  152. #define CONFIG_SYS_EBC_PB7AP 0x01815280
  153. #define CONFIG_SYS_EBC_PB7CR 0xF0318000 /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit */
  154. /*-----------------------------------------------------------------------
  155. * External peripheral base address
  156. *-----------------------------------------------------------------------
  157. */
  158. #define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000
  159. #define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000
  160. #define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000
  161. /*-----------------------------------------------------------------------
  162. * Definitions for initial stack pointer and data area
  163. */
  164. #define CONFIG_SYS_INIT_DCACHE_CS 4 /* use cs # 4 for data cache memory */
  165. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* inside of SDRAM */
  166. #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
  167. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  168. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  169. /*-----------------------------------------------------------------------
  170. * Definitions for Serial Presence Detect EEPROM address
  171. * (to get SDRAM settings)
  172. */
  173. #define SPD_EEPROM_ADDRESS 0x50
  174. #endif /* __CONFIG_H */