t4240rdb.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <fdt_support.h>
  9. #include <i2c.h>
  10. #include <init.h>
  11. #include <netdev.h>
  12. #include <linux/compiler.h>
  13. #include <asm/mmu.h>
  14. #include <asm/processor.h>
  15. #include <asm/cache.h>
  16. #include <asm/immap_85xx.h>
  17. #include <asm/fsl_law.h>
  18. #include <asm/fsl_serdes.h>
  19. #include <asm/fsl_liodn.h>
  20. #include <fm_eth.h>
  21. #include "t4rdb.h"
  22. #include "cpld.h"
  23. #include "../common/vid.h"
  24. DECLARE_GLOBAL_DATA_PTR;
  25. int checkboard(void)
  26. {
  27. struct cpu_type *cpu = gd->arch.cpu;
  28. u8 sw;
  29. printf("Board: %sRDB, ", cpu->name);
  30. printf("Board rev: 0x%02x CPLD ver: 0x%02x%02x, ",
  31. CPLD_READ(hw_ver), CPLD_READ(sw_maj_ver), CPLD_READ(sw_min_ver));
  32. sw = CPLD_READ(vbank);
  33. sw = sw & CPLD_BANK_SEL_MASK;
  34. if (sw <= 7)
  35. printf("vBank: %d\n", sw);
  36. else
  37. printf("Unsupported Bank=%x\n", sw);
  38. puts("SERDES Reference Clocks:\n");
  39. printf(" SERDES1=100MHz SERDES2=156.25MHz\n"
  40. " SERDES3=100MHz SERDES4=100MHz\n");
  41. return 0;
  42. }
  43. int board_early_init_r(void)
  44. {
  45. const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  46. int flash_esel = find_tlb_idx((void *)flashbase, 1);
  47. /*
  48. * Remap Boot flash + PROMJET region to caching-inhibited
  49. * so that flash can be erased properly.
  50. */
  51. /* Flush d-cache and invalidate i-cache of any FLASH data */
  52. flush_dcache();
  53. invalidate_icache();
  54. if (flash_esel == -1) {
  55. /* very unlikely unless something is messed up */
  56. puts("Error: Could not find TLB for FLASH BASE\n");
  57. flash_esel = 2; /* give our best effort to continue */
  58. } else {
  59. /* invalidate existing TLB entry for flash + promjet */
  60. disable_tlb(flash_esel);
  61. }
  62. set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  63. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  64. 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  65. /*
  66. * Adjust core voltage according to voltage ID
  67. * This function changes I2C mux to channel 2.
  68. */
  69. if (adjust_vdd(0))
  70. printf("Warning: Adjusting core voltage failed.\n");
  71. return 0;
  72. }
  73. int misc_init_r(void)
  74. {
  75. return 0;
  76. }
  77. int ft_board_setup(void *blob, bd_t *bd)
  78. {
  79. phys_addr_t base;
  80. phys_size_t size;
  81. ft_cpu_setup(blob, bd);
  82. base = env_get_bootm_low();
  83. size = env_get_bootm_size();
  84. fdt_fixup_memory(blob, (u64)base, (u64)size);
  85. #ifdef CONFIG_PCI
  86. pci_of_setup(blob, bd);
  87. #endif
  88. fdt_fixup_liodn(blob);
  89. fsl_fdt_fixup_dr_usb(blob, bd);
  90. #ifdef CONFIG_SYS_DPAA_FMAN
  91. fdt_fixup_fman_ethernet(blob);
  92. fdt_fixup_board_enet(blob);
  93. #endif
  94. return 0;
  95. }
  96. /*
  97. * This function is called by bdinfo to print detail board information.
  98. * As an exmaple for future board, we organize the messages into
  99. * several sections. If applicable, the message is in the format of
  100. * <name> = <value>
  101. * It should aligned with normal output of bdinfo command.
  102. *
  103. * Voltage: Core, DDR and another configurable voltages
  104. * Clock : Critical clocks which are not printed already
  105. * RCW : RCW source if not printed already
  106. * Misc : Other important information not in above catagories
  107. */
  108. void board_detail(void)
  109. {
  110. int rcwsrc;
  111. /* RCW section SW3[4] */
  112. rcwsrc = 0x0;
  113. puts("RCW source = ");
  114. switch (rcwsrc & 0x1) {
  115. case 0x1:
  116. puts("SDHC/eMMC\n");
  117. break;
  118. default:
  119. puts("I2C normal addressing\n");
  120. break;
  121. }
  122. }