t104xrdb.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2013 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <fdt_support.h>
  9. #include <hwconfig.h>
  10. #include <init.h>
  11. #include <netdev.h>
  12. #include <linux/compiler.h>
  13. #include <asm/mmu.h>
  14. #include <asm/processor.h>
  15. #include <asm/cache.h>
  16. #include <asm/immap_85xx.h>
  17. #include <asm/fsl_fdt.h>
  18. #include <asm/fsl_law.h>
  19. #include <asm/fsl_serdes.h>
  20. #include <asm/fsl_liodn.h>
  21. #include <fm_eth.h>
  22. #include "../common/sleep.h"
  23. #include "t104xrdb.h"
  24. #include "cpld.h"
  25. DECLARE_GLOBAL_DATA_PTR;
  26. int checkboard(void)
  27. {
  28. struct cpu_type *cpu = gd->arch.cpu;
  29. u8 sw;
  30. #if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
  31. printf("Board: %sD4RDB\n", cpu->name);
  32. #else
  33. printf("Board: %sRDB\n", cpu->name);
  34. #endif
  35. printf("Board rev: 0x%02x CPLD ver: 0x%02x, ",
  36. CPLD_READ(hw_ver), CPLD_READ(sw_ver));
  37. sw = CPLD_READ(flash_ctl_status);
  38. sw = ((sw & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
  39. printf("vBank: %d\n", sw);
  40. return 0;
  41. }
  42. int board_early_init_f(void)
  43. {
  44. #if defined(CONFIG_DEEP_SLEEP)
  45. if (is_warm_boot())
  46. fsl_dp_disable_console();
  47. #endif
  48. return 0;
  49. }
  50. int board_early_init_r(void)
  51. {
  52. #ifdef CONFIG_SYS_FLASH_BASE
  53. const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  54. int flash_esel = find_tlb_idx((void *)flashbase, 1);
  55. /*
  56. * Remap Boot flash region to caching-inhibited
  57. * so that flash can be erased properly.
  58. */
  59. /* Flush d-cache and invalidate i-cache of any FLASH data */
  60. flush_dcache();
  61. invalidate_icache();
  62. if (flash_esel == -1) {
  63. /* very unlikely unless something is messed up */
  64. puts("Error: Could not find TLB for FLASH BASE\n");
  65. flash_esel = 2; /* give our best effort to continue */
  66. } else {
  67. /* invalidate existing TLB entry for flash */
  68. disable_tlb(flash_esel);
  69. }
  70. set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  71. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  72. 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  73. #endif
  74. return 0;
  75. }
  76. int misc_init_r(void)
  77. {
  78. ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  79. u32 srds_s1;
  80. srds_s1 = in_be32(&gur->rcwsr[4]) >> 24;
  81. printf("SERDES Reference : 0x%X\n", srds_s1);
  82. /* select SGMII*/
  83. if (srds_s1 == 0x86)
  84. CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
  85. MISC_CTL_SG_SEL);
  86. /* select SGMII and Aurora*/
  87. if (srds_s1 == 0x8E)
  88. CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
  89. MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL);
  90. #if defined(CONFIG_TARGET_T1040D4RDB)
  91. if (hwconfig("qe-tdm")) {
  92. CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) |
  93. MISC_MUX_QE_TDM);
  94. printf("QECSR : 0x%02x, mux to qe-tdm\n",
  95. CPLD_READ(sfp_ctl_status));
  96. }
  97. /* Mask all CPLD interrupt sources, except QSGMII interrupts */
  98. if (CPLD_READ(sw_ver) < 0x03) {
  99. debug("CPLD SW version 0x%02x doesn't support int_mask\n",
  100. CPLD_READ(sw_ver));
  101. } else {
  102. CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL &
  103. ~(CPLD_INT_MASK_QSGMII1 | CPLD_INT_MASK_QSGMII2));
  104. }
  105. #endif
  106. return 0;
  107. }
  108. int ft_board_setup(void *blob, bd_t *bd)
  109. {
  110. phys_addr_t base;
  111. phys_size_t size;
  112. ft_cpu_setup(blob, bd);
  113. base = env_get_bootm_low();
  114. size = env_get_bootm_size();
  115. fdt_fixup_memory(blob, (u64)base, (u64)size);
  116. #ifdef CONFIG_PCI
  117. pci_of_setup(blob, bd);
  118. #endif
  119. fdt_fixup_liodn(blob);
  120. #ifdef CONFIG_HAS_FSL_DR_USB
  121. fsl_fdt_fixup_dr_usb(blob, bd);
  122. #endif
  123. #ifdef CONFIG_SYS_DPAA_FMAN
  124. fdt_fixup_fman_ethernet(blob);
  125. #endif
  126. if (hwconfig("qe-tdm"))
  127. fdt_del_diu(blob);
  128. return 0;
  129. }