ls1012afrdm.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017-2018 NXP
  4. */
  5. #include <common.h>
  6. #include <fdt_support.h>
  7. #include <i2c.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/clock.h>
  10. #include <asm/arch/fsl_serdes.h>
  11. #ifdef CONFIG_FSL_LS_PPA
  12. #include <asm/arch/ppa.h>
  13. #endif
  14. #include <asm/arch/mmu.h>
  15. #include <asm/arch/soc.h>
  16. #include <fsl_esdhc.h>
  17. #include <hwconfig.h>
  18. #include <env_internal.h>
  19. #include <fsl_mmdc.h>
  20. #include <netdev.h>
  21. #include <fsl_sec.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. static inline int get_board_version(void)
  24. {
  25. uint32_t val;
  26. #ifdef CONFIG_TARGET_LS1012AFRDM
  27. val = 0;
  28. #else
  29. struct ccsr_gpio *pgpio = (void *)(GPIO2_BASE_ADDR);
  30. val = in_be32(&pgpio->gpdat) & BOARD_REV_MASK;/*Get GPIO2 11,12,14*/
  31. #endif
  32. return val;
  33. }
  34. int checkboard(void)
  35. {
  36. #ifdef CONFIG_TARGET_LS1012AFRDM
  37. puts("Board: LS1012AFRDM ");
  38. #else
  39. int rev;
  40. rev = get_board_version();
  41. puts("Board: FRWY-LS1012A ");
  42. puts("Version");
  43. switch (rev) {
  44. case BOARD_REV_A_B:
  45. puts(": RevA/B ");
  46. break;
  47. case BOARD_REV_C:
  48. puts(": RevC ");
  49. break;
  50. default:
  51. puts(": unknown");
  52. break;
  53. }
  54. #endif
  55. return 0;
  56. }
  57. #ifdef CONFIG_TARGET_LS1012AFRWY
  58. int esdhc_status_fixup(void *blob, const char *compat)
  59. {
  60. char esdhc0_path[] = "/soc/esdhc@1560000";
  61. char esdhc1_path[] = "/soc/esdhc@1580000";
  62. do_fixup_by_path(blob, esdhc0_path, "status", "okay",
  63. sizeof("okay"), 1);
  64. do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
  65. sizeof("disabled"), 1);
  66. return 0;
  67. }
  68. #endif
  69. #ifdef CONFIG_TFABOOT
  70. int dram_init(void)
  71. {
  72. #ifdef CONFIG_TARGET_LS1012AFRWY
  73. int board_rev;
  74. #endif
  75. gd->ram_size = tfa_get_dram_size();
  76. if (!gd->ram_size) {
  77. #ifdef CONFIG_TARGET_LS1012AFRWY
  78. board_rev = get_board_version();
  79. if (board_rev & BOARD_REV_C)
  80. gd->ram_size = SYS_SDRAM_SIZE_1024;
  81. else
  82. gd->ram_size = SYS_SDRAM_SIZE_512;
  83. #else
  84. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  85. #endif
  86. }
  87. return 0;
  88. }
  89. #else
  90. int dram_init(void)
  91. {
  92. #ifdef CONFIG_TARGET_LS1012AFRWY
  93. int board_rev;
  94. #endif
  95. struct fsl_mmdc_info mparam = {
  96. 0x04180000, /* mdctl */
  97. 0x00030035, /* mdpdc */
  98. 0x12554000, /* mdotc */
  99. 0xbabf7954, /* mdcfg0 */
  100. 0xdb328f64, /* mdcfg1 */
  101. 0x01ff00db, /* mdcfg2 */
  102. 0x00001680, /* mdmisc */
  103. 0x0f3c8000, /* mdref */
  104. 0x00002000, /* mdrwd */
  105. 0x00bf1023, /* mdor */
  106. 0x0000003f, /* mdasp */
  107. 0x0000022a, /* mpodtctrl */
  108. 0xa1390003, /* mpzqhwctrl */
  109. };
  110. #ifdef CONFIG_TARGET_LS1012AFRWY
  111. board_rev = get_board_version();
  112. if (board_rev == BOARD_REV_C) {
  113. mparam.mdctl = 0x05180000;
  114. gd->ram_size = SYS_SDRAM_SIZE_1024;
  115. } else {
  116. gd->ram_size = SYS_SDRAM_SIZE_512;
  117. }
  118. #else
  119. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  120. #endif
  121. mmdc_init(&mparam);
  122. #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
  123. /* This will break-before-make MMU for DDR */
  124. update_early_mmu_table();
  125. #endif
  126. return 0;
  127. }
  128. #endif
  129. int board_early_init_f(void)
  130. {
  131. fsl_lsch2_early_init_f();
  132. return 0;
  133. }
  134. int board_init(void)
  135. {
  136. struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
  137. CONFIG_SYS_CCI400_OFFSET);
  138. /*
  139. * Set CCI-400 control override register to enable barrier
  140. * transaction
  141. */
  142. if (current_el() == 3)
  143. out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
  144. #ifdef CONFIG_ENV_IS_NOWHERE
  145. gd->env_addr = (ulong)&default_environment[0];
  146. #endif
  147. #ifdef CONFIG_FSL_CAAM
  148. sec_init();
  149. #endif
  150. #ifdef CONFIG_FSL_LS_PPA
  151. ppa_init();
  152. #endif
  153. return 0;
  154. }
  155. int ft_board_setup(void *blob, bd_t *bd)
  156. {
  157. arch_fixup_fdt(blob);
  158. ft_cpu_setup(blob, bd);
  159. return 0;
  160. }