mmc.c 42 KB

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  1. /*
  2. * Copyright 2008, Freescale Semiconductor, Inc
  3. * Andy Fleming
  4. *
  5. * Based vaguely on the Linux code
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <config.h>
  10. #include <common.h>
  11. #include <command.h>
  12. #include <dm.h>
  13. #include <dm/device-internal.h>
  14. #include <errno.h>
  15. #include <mmc.h>
  16. #include <part.h>
  17. #include <malloc.h>
  18. #include <memalign.h>
  19. #include <linux/list.h>
  20. #include <div64.h>
  21. #include "mmc_private.h"
  22. static struct list_head mmc_devices;
  23. static int cur_dev_num = -1;
  24. __weak int board_mmc_getwp(struct mmc *mmc)
  25. {
  26. return -1;
  27. }
  28. int mmc_getwp(struct mmc *mmc)
  29. {
  30. int wp;
  31. wp = board_mmc_getwp(mmc);
  32. if (wp < 0) {
  33. if (mmc->cfg->ops->getwp)
  34. wp = mmc->cfg->ops->getwp(mmc);
  35. else
  36. wp = 0;
  37. }
  38. return wp;
  39. }
  40. __weak int board_mmc_getcd(struct mmc *mmc)
  41. {
  42. return -1;
  43. }
  44. int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
  45. {
  46. int ret;
  47. #ifdef CONFIG_MMC_TRACE
  48. int i;
  49. u8 *ptr;
  50. printf("CMD_SEND:%d\n", cmd->cmdidx);
  51. printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  52. ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  53. switch (cmd->resp_type) {
  54. case MMC_RSP_NONE:
  55. printf("\t\tMMC_RSP_NONE\n");
  56. break;
  57. case MMC_RSP_R1:
  58. printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
  59. cmd->response[0]);
  60. break;
  61. case MMC_RSP_R1b:
  62. printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
  63. cmd->response[0]);
  64. break;
  65. case MMC_RSP_R2:
  66. printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
  67. cmd->response[0]);
  68. printf("\t\t \t\t 0x%08X \n",
  69. cmd->response[1]);
  70. printf("\t\t \t\t 0x%08X \n",
  71. cmd->response[2]);
  72. printf("\t\t \t\t 0x%08X \n",
  73. cmd->response[3]);
  74. printf("\n");
  75. printf("\t\t\t\t\tDUMPING DATA\n");
  76. for (i = 0; i < 4; i++) {
  77. int j;
  78. printf("\t\t\t\t\t%03d - ", i*4);
  79. ptr = (u8 *)&cmd->response[i];
  80. ptr += 3;
  81. for (j = 0; j < 4; j++)
  82. printf("%02X ", *ptr--);
  83. printf("\n");
  84. }
  85. break;
  86. case MMC_RSP_R3:
  87. printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
  88. cmd->response[0]);
  89. break;
  90. default:
  91. printf("\t\tERROR MMC rsp not supported\n");
  92. break;
  93. }
  94. #else
  95. ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  96. #endif
  97. return ret;
  98. }
  99. int mmc_send_status(struct mmc *mmc, int timeout)
  100. {
  101. struct mmc_cmd cmd;
  102. int err, retries = 5;
  103. #ifdef CONFIG_MMC_TRACE
  104. int status;
  105. #endif
  106. cmd.cmdidx = MMC_CMD_SEND_STATUS;
  107. cmd.resp_type = MMC_RSP_R1;
  108. if (!mmc_host_is_spi(mmc))
  109. cmd.cmdarg = mmc->rca << 16;
  110. while (1) {
  111. err = mmc_send_cmd(mmc, &cmd, NULL);
  112. if (!err) {
  113. if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
  114. (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
  115. MMC_STATE_PRG)
  116. break;
  117. else if (cmd.response[0] & MMC_STATUS_MASK) {
  118. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  119. printf("Status Error: 0x%08X\n",
  120. cmd.response[0]);
  121. #endif
  122. return COMM_ERR;
  123. }
  124. } else if (--retries < 0)
  125. return err;
  126. if (timeout-- <= 0)
  127. break;
  128. udelay(1000);
  129. }
  130. #ifdef CONFIG_MMC_TRACE
  131. status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
  132. printf("CURR STATE:%d\n", status);
  133. #endif
  134. if (timeout <= 0) {
  135. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  136. printf("Timeout waiting card ready\n");
  137. #endif
  138. return TIMEOUT;
  139. }
  140. if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
  141. return SWITCH_ERR;
  142. return 0;
  143. }
  144. int mmc_set_blocklen(struct mmc *mmc, int len)
  145. {
  146. struct mmc_cmd cmd;
  147. if (mmc->ddr_mode)
  148. return 0;
  149. cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
  150. cmd.resp_type = MMC_RSP_R1;
  151. cmd.cmdarg = len;
  152. return mmc_send_cmd(mmc, &cmd, NULL);
  153. }
  154. struct mmc *find_mmc_device(int dev_num)
  155. {
  156. struct mmc *m;
  157. struct list_head *entry;
  158. list_for_each(entry, &mmc_devices) {
  159. m = list_entry(entry, struct mmc, link);
  160. if (m->block_dev.dev == dev_num)
  161. return m;
  162. }
  163. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  164. printf("MMC Device %d not found\n", dev_num);
  165. #endif
  166. return NULL;
  167. }
  168. static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
  169. lbaint_t blkcnt)
  170. {
  171. struct mmc_cmd cmd;
  172. struct mmc_data data;
  173. if (blkcnt > 1)
  174. cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
  175. else
  176. cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
  177. if (mmc->high_capacity)
  178. cmd.cmdarg = start;
  179. else
  180. cmd.cmdarg = start * mmc->read_bl_len;
  181. cmd.resp_type = MMC_RSP_R1;
  182. data.dest = dst;
  183. data.blocks = blkcnt;
  184. data.blocksize = mmc->read_bl_len;
  185. data.flags = MMC_DATA_READ;
  186. if (mmc_send_cmd(mmc, &cmd, &data))
  187. return 0;
  188. if (blkcnt > 1) {
  189. cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
  190. cmd.cmdarg = 0;
  191. cmd.resp_type = MMC_RSP_R1b;
  192. if (mmc_send_cmd(mmc, &cmd, NULL)) {
  193. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  194. printf("mmc fail to send stop cmd\n");
  195. #endif
  196. return 0;
  197. }
  198. }
  199. return blkcnt;
  200. }
  201. static ulong mmc_bread(block_dev_desc_t *block_dev, lbaint_t start,
  202. lbaint_t blkcnt, void *dst)
  203. {
  204. int dev_num = block_dev->dev;
  205. lbaint_t cur, blocks_todo = blkcnt;
  206. if (blkcnt == 0)
  207. return 0;
  208. struct mmc *mmc = find_mmc_device(dev_num);
  209. if (!mmc)
  210. return 0;
  211. if ((start + blkcnt) > mmc->block_dev.lba) {
  212. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  213. printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
  214. start + blkcnt, mmc->block_dev.lba);
  215. #endif
  216. return 0;
  217. }
  218. if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
  219. debug("%s: Failed to set blocklen\n", __func__);
  220. return 0;
  221. }
  222. do {
  223. cur = (blocks_todo > mmc->cfg->b_max) ?
  224. mmc->cfg->b_max : blocks_todo;
  225. if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
  226. debug("%s: Failed to read blocks\n", __func__);
  227. return 0;
  228. }
  229. blocks_todo -= cur;
  230. start += cur;
  231. dst += cur * mmc->read_bl_len;
  232. } while (blocks_todo > 0);
  233. return blkcnt;
  234. }
  235. static int mmc_go_idle(struct mmc *mmc)
  236. {
  237. struct mmc_cmd cmd;
  238. int err;
  239. udelay(1000);
  240. cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
  241. cmd.cmdarg = 0;
  242. cmd.resp_type = MMC_RSP_NONE;
  243. err = mmc_send_cmd(mmc, &cmd, NULL);
  244. if (err)
  245. return err;
  246. udelay(2000);
  247. return 0;
  248. }
  249. static int sd_send_op_cond(struct mmc *mmc)
  250. {
  251. int timeout = 1000;
  252. int err;
  253. struct mmc_cmd cmd;
  254. while (1) {
  255. cmd.cmdidx = MMC_CMD_APP_CMD;
  256. cmd.resp_type = MMC_RSP_R1;
  257. cmd.cmdarg = 0;
  258. err = mmc_send_cmd(mmc, &cmd, NULL);
  259. if (err)
  260. return err;
  261. cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
  262. cmd.resp_type = MMC_RSP_R3;
  263. /*
  264. * Most cards do not answer if some reserved bits
  265. * in the ocr are set. However, Some controller
  266. * can set bit 7 (reserved for low voltages), but
  267. * how to manage low voltages SD card is not yet
  268. * specified.
  269. */
  270. cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
  271. (mmc->cfg->voltages & 0xff8000);
  272. if (mmc->version == SD_VERSION_2)
  273. cmd.cmdarg |= OCR_HCS;
  274. err = mmc_send_cmd(mmc, &cmd, NULL);
  275. if (err)
  276. return err;
  277. if (cmd.response[0] & OCR_BUSY)
  278. break;
  279. if (timeout-- <= 0)
  280. return UNUSABLE_ERR;
  281. udelay(1000);
  282. }
  283. if (mmc->version != SD_VERSION_2)
  284. mmc->version = SD_VERSION_1_0;
  285. if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
  286. cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
  287. cmd.resp_type = MMC_RSP_R3;
  288. cmd.cmdarg = 0;
  289. err = mmc_send_cmd(mmc, &cmd, NULL);
  290. if (err)
  291. return err;
  292. }
  293. mmc->ocr = cmd.response[0];
  294. mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
  295. mmc->rca = 0;
  296. return 0;
  297. }
  298. static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
  299. {
  300. struct mmc_cmd cmd;
  301. int err;
  302. cmd.cmdidx = MMC_CMD_SEND_OP_COND;
  303. cmd.resp_type = MMC_RSP_R3;
  304. cmd.cmdarg = 0;
  305. if (use_arg && !mmc_host_is_spi(mmc))
  306. cmd.cmdarg = OCR_HCS |
  307. (mmc->cfg->voltages &
  308. (mmc->ocr & OCR_VOLTAGE_MASK)) |
  309. (mmc->ocr & OCR_ACCESS_MODE);
  310. err = mmc_send_cmd(mmc, &cmd, NULL);
  311. if (err)
  312. return err;
  313. mmc->ocr = cmd.response[0];
  314. return 0;
  315. }
  316. static int mmc_send_op_cond(struct mmc *mmc)
  317. {
  318. int err, i;
  319. /* Some cards seem to need this */
  320. mmc_go_idle(mmc);
  321. /* Asking to the card its capabilities */
  322. for (i = 0; i < 2; i++) {
  323. err = mmc_send_op_cond_iter(mmc, i != 0);
  324. if (err)
  325. return err;
  326. /* exit if not busy (flag seems to be inverted) */
  327. if (mmc->ocr & OCR_BUSY)
  328. break;
  329. }
  330. mmc->op_cond_pending = 1;
  331. return 0;
  332. }
  333. static int mmc_complete_op_cond(struct mmc *mmc)
  334. {
  335. struct mmc_cmd cmd;
  336. int timeout = 1000;
  337. uint start;
  338. int err;
  339. mmc->op_cond_pending = 0;
  340. if (!(mmc->ocr & OCR_BUSY)) {
  341. start = get_timer(0);
  342. while (1) {
  343. err = mmc_send_op_cond_iter(mmc, 1);
  344. if (err)
  345. return err;
  346. if (mmc->ocr & OCR_BUSY)
  347. break;
  348. if (get_timer(start) > timeout)
  349. return UNUSABLE_ERR;
  350. udelay(100);
  351. }
  352. }
  353. if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
  354. cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
  355. cmd.resp_type = MMC_RSP_R3;
  356. cmd.cmdarg = 0;
  357. err = mmc_send_cmd(mmc, &cmd, NULL);
  358. if (err)
  359. return err;
  360. mmc->ocr = cmd.response[0];
  361. }
  362. mmc->version = MMC_VERSION_UNKNOWN;
  363. mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
  364. mmc->rca = 1;
  365. return 0;
  366. }
  367. static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
  368. {
  369. struct mmc_cmd cmd;
  370. struct mmc_data data;
  371. int err;
  372. /* Get the Card Status Register */
  373. cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
  374. cmd.resp_type = MMC_RSP_R1;
  375. cmd.cmdarg = 0;
  376. data.dest = (char *)ext_csd;
  377. data.blocks = 1;
  378. data.blocksize = MMC_MAX_BLOCK_LEN;
  379. data.flags = MMC_DATA_READ;
  380. err = mmc_send_cmd(mmc, &cmd, &data);
  381. return err;
  382. }
  383. static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
  384. {
  385. struct mmc_cmd cmd;
  386. int timeout = 1000;
  387. int ret;
  388. cmd.cmdidx = MMC_CMD_SWITCH;
  389. cmd.resp_type = MMC_RSP_R1b;
  390. cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
  391. (index << 16) |
  392. (value << 8);
  393. ret = mmc_send_cmd(mmc, &cmd, NULL);
  394. /* Waiting for the ready status */
  395. if (!ret)
  396. ret = mmc_send_status(mmc, timeout);
  397. return ret;
  398. }
  399. static int mmc_change_freq(struct mmc *mmc)
  400. {
  401. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  402. char cardtype;
  403. int err;
  404. mmc->card_caps = 0;
  405. if (mmc_host_is_spi(mmc))
  406. return 0;
  407. /* Only version 4 supports high-speed */
  408. if (mmc->version < MMC_VERSION_4)
  409. return 0;
  410. mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
  411. err = mmc_send_ext_csd(mmc, ext_csd);
  412. if (err)
  413. return err;
  414. cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
  415. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
  416. if (err)
  417. return err == SWITCH_ERR ? 0 : err;
  418. /* Now check to see that it worked */
  419. err = mmc_send_ext_csd(mmc, ext_csd);
  420. if (err)
  421. return err;
  422. /* No high-speed support */
  423. if (!ext_csd[EXT_CSD_HS_TIMING])
  424. return 0;
  425. /* High Speed is set, there are two types: 52MHz and 26MHz */
  426. if (cardtype & EXT_CSD_CARD_TYPE_52) {
  427. if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
  428. mmc->card_caps |= MMC_MODE_DDR_52MHz;
  429. mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
  430. } else {
  431. mmc->card_caps |= MMC_MODE_HS;
  432. }
  433. return 0;
  434. }
  435. static int mmc_set_capacity(struct mmc *mmc, int part_num)
  436. {
  437. switch (part_num) {
  438. case 0:
  439. mmc->capacity = mmc->capacity_user;
  440. break;
  441. case 1:
  442. case 2:
  443. mmc->capacity = mmc->capacity_boot;
  444. break;
  445. case 3:
  446. mmc->capacity = mmc->capacity_rpmb;
  447. break;
  448. case 4:
  449. case 5:
  450. case 6:
  451. case 7:
  452. mmc->capacity = mmc->capacity_gp[part_num - 4];
  453. break;
  454. default:
  455. return -1;
  456. }
  457. mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
  458. return 0;
  459. }
  460. int mmc_select_hwpart(int dev_num, int hwpart)
  461. {
  462. struct mmc *mmc = find_mmc_device(dev_num);
  463. int ret;
  464. if (!mmc)
  465. return -ENODEV;
  466. if (mmc->part_num == hwpart)
  467. return 0;
  468. if (mmc->part_config == MMCPART_NOAVAILABLE) {
  469. printf("Card doesn't support part_switch\n");
  470. return -EMEDIUMTYPE;
  471. }
  472. ret = mmc_switch_part(dev_num, hwpart);
  473. if (ret)
  474. return ret;
  475. mmc->part_num = hwpart;
  476. return 0;
  477. }
  478. int mmc_switch_part(int dev_num, unsigned int part_num)
  479. {
  480. struct mmc *mmc = find_mmc_device(dev_num);
  481. int ret;
  482. if (!mmc)
  483. return -1;
  484. ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
  485. (mmc->part_config & ~PART_ACCESS_MASK)
  486. | (part_num & PART_ACCESS_MASK));
  487. /*
  488. * Set the capacity if the switch succeeded or was intended
  489. * to return to representing the raw device.
  490. */
  491. if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
  492. ret = mmc_set_capacity(mmc, part_num);
  493. return ret;
  494. }
  495. int mmc_hwpart_config(struct mmc *mmc,
  496. const struct mmc_hwpart_conf *conf,
  497. enum mmc_hwpart_conf_mode mode)
  498. {
  499. u8 part_attrs = 0;
  500. u32 enh_size_mult;
  501. u32 enh_start_addr;
  502. u32 gp_size_mult[4];
  503. u32 max_enh_size_mult;
  504. u32 tot_enh_size_mult = 0;
  505. u8 wr_rel_set;
  506. int i, pidx, err;
  507. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  508. if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
  509. return -EINVAL;
  510. if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
  511. printf("eMMC >= 4.4 required for enhanced user data area\n");
  512. return -EMEDIUMTYPE;
  513. }
  514. if (!(mmc->part_support & PART_SUPPORT)) {
  515. printf("Card does not support partitioning\n");
  516. return -EMEDIUMTYPE;
  517. }
  518. if (!mmc->hc_wp_grp_size) {
  519. printf("Card does not define HC WP group size\n");
  520. return -EMEDIUMTYPE;
  521. }
  522. /* check partition alignment and total enhanced size */
  523. if (conf->user.enh_size) {
  524. if (conf->user.enh_size % mmc->hc_wp_grp_size ||
  525. conf->user.enh_start % mmc->hc_wp_grp_size) {
  526. printf("User data enhanced area not HC WP group "
  527. "size aligned\n");
  528. return -EINVAL;
  529. }
  530. part_attrs |= EXT_CSD_ENH_USR;
  531. enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
  532. if (mmc->high_capacity) {
  533. enh_start_addr = conf->user.enh_start;
  534. } else {
  535. enh_start_addr = (conf->user.enh_start << 9);
  536. }
  537. } else {
  538. enh_size_mult = 0;
  539. enh_start_addr = 0;
  540. }
  541. tot_enh_size_mult += enh_size_mult;
  542. for (pidx = 0; pidx < 4; pidx++) {
  543. if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
  544. printf("GP%i partition not HC WP group size "
  545. "aligned\n", pidx+1);
  546. return -EINVAL;
  547. }
  548. gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
  549. if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
  550. part_attrs |= EXT_CSD_ENH_GP(pidx);
  551. tot_enh_size_mult += gp_size_mult[pidx];
  552. }
  553. }
  554. if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
  555. printf("Card does not support enhanced attribute\n");
  556. return -EMEDIUMTYPE;
  557. }
  558. err = mmc_send_ext_csd(mmc, ext_csd);
  559. if (err)
  560. return err;
  561. max_enh_size_mult =
  562. (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
  563. (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
  564. ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
  565. if (tot_enh_size_mult > max_enh_size_mult) {
  566. printf("Total enhanced size exceeds maximum (%u > %u)\n",
  567. tot_enh_size_mult, max_enh_size_mult);
  568. return -EMEDIUMTYPE;
  569. }
  570. /* The default value of EXT_CSD_WR_REL_SET is device
  571. * dependent, the values can only be changed if the
  572. * EXT_CSD_HS_CTRL_REL bit is set. The values can be
  573. * changed only once and before partitioning is completed. */
  574. wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
  575. if (conf->user.wr_rel_change) {
  576. if (conf->user.wr_rel_set)
  577. wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
  578. else
  579. wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
  580. }
  581. for (pidx = 0; pidx < 4; pidx++) {
  582. if (conf->gp_part[pidx].wr_rel_change) {
  583. if (conf->gp_part[pidx].wr_rel_set)
  584. wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
  585. else
  586. wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
  587. }
  588. }
  589. if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
  590. !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
  591. puts("Card does not support host controlled partition write "
  592. "reliability settings\n");
  593. return -EMEDIUMTYPE;
  594. }
  595. if (ext_csd[EXT_CSD_PARTITION_SETTING] &
  596. EXT_CSD_PARTITION_SETTING_COMPLETED) {
  597. printf("Card already partitioned\n");
  598. return -EPERM;
  599. }
  600. if (mode == MMC_HWPART_CONF_CHECK)
  601. return 0;
  602. /* Partitioning requires high-capacity size definitions */
  603. if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
  604. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  605. EXT_CSD_ERASE_GROUP_DEF, 1);
  606. if (err)
  607. return err;
  608. ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
  609. /* update erase group size to be high-capacity */
  610. mmc->erase_grp_size =
  611. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
  612. }
  613. /* all OK, write the configuration */
  614. for (i = 0; i < 4; i++) {
  615. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  616. EXT_CSD_ENH_START_ADDR+i,
  617. (enh_start_addr >> (i*8)) & 0xFF);
  618. if (err)
  619. return err;
  620. }
  621. for (i = 0; i < 3; i++) {
  622. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  623. EXT_CSD_ENH_SIZE_MULT+i,
  624. (enh_size_mult >> (i*8)) & 0xFF);
  625. if (err)
  626. return err;
  627. }
  628. for (pidx = 0; pidx < 4; pidx++) {
  629. for (i = 0; i < 3; i++) {
  630. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  631. EXT_CSD_GP_SIZE_MULT+pidx*3+i,
  632. (gp_size_mult[pidx] >> (i*8)) & 0xFF);
  633. if (err)
  634. return err;
  635. }
  636. }
  637. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  638. EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
  639. if (err)
  640. return err;
  641. if (mode == MMC_HWPART_CONF_SET)
  642. return 0;
  643. /* The WR_REL_SET is a write-once register but shall be
  644. * written before setting PART_SETTING_COMPLETED. As it is
  645. * write-once we can only write it when completing the
  646. * partitioning. */
  647. if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
  648. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  649. EXT_CSD_WR_REL_SET, wr_rel_set);
  650. if (err)
  651. return err;
  652. }
  653. /* Setting PART_SETTING_COMPLETED confirms the partition
  654. * configuration but it only becomes effective after power
  655. * cycle, so we do not adjust the partition related settings
  656. * in the mmc struct. */
  657. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  658. EXT_CSD_PARTITION_SETTING,
  659. EXT_CSD_PARTITION_SETTING_COMPLETED);
  660. if (err)
  661. return err;
  662. return 0;
  663. }
  664. int mmc_getcd(struct mmc *mmc)
  665. {
  666. int cd;
  667. cd = board_mmc_getcd(mmc);
  668. if (cd < 0) {
  669. if (mmc->cfg->ops->getcd)
  670. cd = mmc->cfg->ops->getcd(mmc);
  671. else
  672. cd = 1;
  673. }
  674. return cd;
  675. }
  676. static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
  677. {
  678. struct mmc_cmd cmd;
  679. struct mmc_data data;
  680. /* Switch the frequency */
  681. cmd.cmdidx = SD_CMD_SWITCH_FUNC;
  682. cmd.resp_type = MMC_RSP_R1;
  683. cmd.cmdarg = (mode << 31) | 0xffffff;
  684. cmd.cmdarg &= ~(0xf << (group * 4));
  685. cmd.cmdarg |= value << (group * 4);
  686. data.dest = (char *)resp;
  687. data.blocksize = 64;
  688. data.blocks = 1;
  689. data.flags = MMC_DATA_READ;
  690. return mmc_send_cmd(mmc, &cmd, &data);
  691. }
  692. static int sd_change_freq(struct mmc *mmc)
  693. {
  694. int err;
  695. struct mmc_cmd cmd;
  696. ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
  697. ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
  698. struct mmc_data data;
  699. int timeout;
  700. mmc->card_caps = 0;
  701. if (mmc_host_is_spi(mmc))
  702. return 0;
  703. /* Read the SCR to find out if this card supports higher speeds */
  704. cmd.cmdidx = MMC_CMD_APP_CMD;
  705. cmd.resp_type = MMC_RSP_R1;
  706. cmd.cmdarg = mmc->rca << 16;
  707. err = mmc_send_cmd(mmc, &cmd, NULL);
  708. if (err)
  709. return err;
  710. cmd.cmdidx = SD_CMD_APP_SEND_SCR;
  711. cmd.resp_type = MMC_RSP_R1;
  712. cmd.cmdarg = 0;
  713. timeout = 3;
  714. retry_scr:
  715. data.dest = (char *)scr;
  716. data.blocksize = 8;
  717. data.blocks = 1;
  718. data.flags = MMC_DATA_READ;
  719. err = mmc_send_cmd(mmc, &cmd, &data);
  720. if (err) {
  721. if (timeout--)
  722. goto retry_scr;
  723. return err;
  724. }
  725. mmc->scr[0] = __be32_to_cpu(scr[0]);
  726. mmc->scr[1] = __be32_to_cpu(scr[1]);
  727. switch ((mmc->scr[0] >> 24) & 0xf) {
  728. case 0:
  729. mmc->version = SD_VERSION_1_0;
  730. break;
  731. case 1:
  732. mmc->version = SD_VERSION_1_10;
  733. break;
  734. case 2:
  735. mmc->version = SD_VERSION_2;
  736. if ((mmc->scr[0] >> 15) & 0x1)
  737. mmc->version = SD_VERSION_3;
  738. break;
  739. default:
  740. mmc->version = SD_VERSION_1_0;
  741. break;
  742. }
  743. if (mmc->scr[0] & SD_DATA_4BIT)
  744. mmc->card_caps |= MMC_MODE_4BIT;
  745. /* Version 1.0 doesn't support switching */
  746. if (mmc->version == SD_VERSION_1_0)
  747. return 0;
  748. timeout = 4;
  749. while (timeout--) {
  750. err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
  751. (u8 *)switch_status);
  752. if (err)
  753. return err;
  754. /* The high-speed function is busy. Try again */
  755. if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
  756. break;
  757. }
  758. /* If high-speed isn't supported, we return */
  759. if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
  760. return 0;
  761. /*
  762. * If the host doesn't support SD_HIGHSPEED, do not switch card to
  763. * HIGHSPEED mode even if the card support SD_HIGHSPPED.
  764. * This can avoid furthur problem when the card runs in different
  765. * mode between the host.
  766. */
  767. if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
  768. (mmc->cfg->host_caps & MMC_MODE_HS)))
  769. return 0;
  770. err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
  771. if (err)
  772. return err;
  773. if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
  774. mmc->card_caps |= MMC_MODE_HS;
  775. return 0;
  776. }
  777. /* frequency bases */
  778. /* divided by 10 to be nice to platforms without floating point */
  779. static const int fbase[] = {
  780. 10000,
  781. 100000,
  782. 1000000,
  783. 10000000,
  784. };
  785. /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
  786. * to platforms without floating point.
  787. */
  788. static const int multipliers[] = {
  789. 0, /* reserved */
  790. 10,
  791. 12,
  792. 13,
  793. 15,
  794. 20,
  795. 25,
  796. 30,
  797. 35,
  798. 40,
  799. 45,
  800. 50,
  801. 55,
  802. 60,
  803. 70,
  804. 80,
  805. };
  806. static void mmc_set_ios(struct mmc *mmc)
  807. {
  808. if (mmc->cfg->ops->set_ios)
  809. mmc->cfg->ops->set_ios(mmc);
  810. }
  811. void mmc_set_clock(struct mmc *mmc, uint clock)
  812. {
  813. if (clock > mmc->cfg->f_max)
  814. clock = mmc->cfg->f_max;
  815. if (clock < mmc->cfg->f_min)
  816. clock = mmc->cfg->f_min;
  817. mmc->clock = clock;
  818. mmc_set_ios(mmc);
  819. }
  820. static void mmc_set_bus_width(struct mmc *mmc, uint width)
  821. {
  822. mmc->bus_width = width;
  823. mmc_set_ios(mmc);
  824. }
  825. static int mmc_startup(struct mmc *mmc)
  826. {
  827. int err, i;
  828. uint mult, freq;
  829. u64 cmult, csize, capacity;
  830. struct mmc_cmd cmd;
  831. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  832. ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
  833. int timeout = 1000;
  834. bool has_parts = false;
  835. bool part_completed;
  836. #ifdef CONFIG_MMC_SPI_CRC_ON
  837. if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
  838. cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
  839. cmd.resp_type = MMC_RSP_R1;
  840. cmd.cmdarg = 1;
  841. err = mmc_send_cmd(mmc, &cmd, NULL);
  842. if (err)
  843. return err;
  844. }
  845. #endif
  846. /* Put the Card in Identify Mode */
  847. cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
  848. MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
  849. cmd.resp_type = MMC_RSP_R2;
  850. cmd.cmdarg = 0;
  851. err = mmc_send_cmd(mmc, &cmd, NULL);
  852. if (err)
  853. return err;
  854. memcpy(mmc->cid, cmd.response, 16);
  855. /*
  856. * For MMC cards, set the Relative Address.
  857. * For SD cards, get the Relatvie Address.
  858. * This also puts the cards into Standby State
  859. */
  860. if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
  861. cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
  862. cmd.cmdarg = mmc->rca << 16;
  863. cmd.resp_type = MMC_RSP_R6;
  864. err = mmc_send_cmd(mmc, &cmd, NULL);
  865. if (err)
  866. return err;
  867. if (IS_SD(mmc))
  868. mmc->rca = (cmd.response[0] >> 16) & 0xffff;
  869. }
  870. /* Get the Card-Specific Data */
  871. cmd.cmdidx = MMC_CMD_SEND_CSD;
  872. cmd.resp_type = MMC_RSP_R2;
  873. cmd.cmdarg = mmc->rca << 16;
  874. err = mmc_send_cmd(mmc, &cmd, NULL);
  875. /* Waiting for the ready status */
  876. mmc_send_status(mmc, timeout);
  877. if (err)
  878. return err;
  879. mmc->csd[0] = cmd.response[0];
  880. mmc->csd[1] = cmd.response[1];
  881. mmc->csd[2] = cmd.response[2];
  882. mmc->csd[3] = cmd.response[3];
  883. if (mmc->version == MMC_VERSION_UNKNOWN) {
  884. int version = (cmd.response[0] >> 26) & 0xf;
  885. switch (version) {
  886. case 0:
  887. mmc->version = MMC_VERSION_1_2;
  888. break;
  889. case 1:
  890. mmc->version = MMC_VERSION_1_4;
  891. break;
  892. case 2:
  893. mmc->version = MMC_VERSION_2_2;
  894. break;
  895. case 3:
  896. mmc->version = MMC_VERSION_3;
  897. break;
  898. case 4:
  899. mmc->version = MMC_VERSION_4;
  900. break;
  901. default:
  902. mmc->version = MMC_VERSION_1_2;
  903. break;
  904. }
  905. }
  906. /* divide frequency by 10, since the mults are 10x bigger */
  907. freq = fbase[(cmd.response[0] & 0x7)];
  908. mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
  909. mmc->tran_speed = freq * mult;
  910. mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
  911. mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
  912. if (IS_SD(mmc))
  913. mmc->write_bl_len = mmc->read_bl_len;
  914. else
  915. mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
  916. if (mmc->high_capacity) {
  917. csize = (mmc->csd[1] & 0x3f) << 16
  918. | (mmc->csd[2] & 0xffff0000) >> 16;
  919. cmult = 8;
  920. } else {
  921. csize = (mmc->csd[1] & 0x3ff) << 2
  922. | (mmc->csd[2] & 0xc0000000) >> 30;
  923. cmult = (mmc->csd[2] & 0x00038000) >> 15;
  924. }
  925. mmc->capacity_user = (csize + 1) << (cmult + 2);
  926. mmc->capacity_user *= mmc->read_bl_len;
  927. mmc->capacity_boot = 0;
  928. mmc->capacity_rpmb = 0;
  929. for (i = 0; i < 4; i++)
  930. mmc->capacity_gp[i] = 0;
  931. if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
  932. mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
  933. if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
  934. mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
  935. if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
  936. cmd.cmdidx = MMC_CMD_SET_DSR;
  937. cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
  938. cmd.resp_type = MMC_RSP_NONE;
  939. if (mmc_send_cmd(mmc, &cmd, NULL))
  940. printf("MMC: SET_DSR failed\n");
  941. }
  942. /* Select the card, and put it into Transfer Mode */
  943. if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
  944. cmd.cmdidx = MMC_CMD_SELECT_CARD;
  945. cmd.resp_type = MMC_RSP_R1;
  946. cmd.cmdarg = mmc->rca << 16;
  947. err = mmc_send_cmd(mmc, &cmd, NULL);
  948. if (err)
  949. return err;
  950. }
  951. /*
  952. * For SD, its erase group is always one sector
  953. */
  954. mmc->erase_grp_size = 1;
  955. mmc->part_config = MMCPART_NOAVAILABLE;
  956. if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
  957. /* check ext_csd version and capacity */
  958. err = mmc_send_ext_csd(mmc, ext_csd);
  959. if (err)
  960. return err;
  961. if (ext_csd[EXT_CSD_REV] >= 2) {
  962. /*
  963. * According to the JEDEC Standard, the value of
  964. * ext_csd's capacity is valid if the value is more
  965. * than 2GB
  966. */
  967. capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
  968. | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
  969. | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
  970. | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
  971. capacity *= MMC_MAX_BLOCK_LEN;
  972. if ((capacity >> 20) > 2 * 1024)
  973. mmc->capacity_user = capacity;
  974. }
  975. switch (ext_csd[EXT_CSD_REV]) {
  976. case 1:
  977. mmc->version = MMC_VERSION_4_1;
  978. break;
  979. case 2:
  980. mmc->version = MMC_VERSION_4_2;
  981. break;
  982. case 3:
  983. mmc->version = MMC_VERSION_4_3;
  984. break;
  985. case 5:
  986. mmc->version = MMC_VERSION_4_41;
  987. break;
  988. case 6:
  989. mmc->version = MMC_VERSION_4_5;
  990. break;
  991. case 7:
  992. mmc->version = MMC_VERSION_5_0;
  993. break;
  994. }
  995. /* The partition data may be non-zero but it is only
  996. * effective if PARTITION_SETTING_COMPLETED is set in
  997. * EXT_CSD, so ignore any data if this bit is not set,
  998. * except for enabling the high-capacity group size
  999. * definition (see below). */
  1000. part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
  1001. EXT_CSD_PARTITION_SETTING_COMPLETED);
  1002. /* store the partition info of emmc */
  1003. mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
  1004. if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
  1005. ext_csd[EXT_CSD_BOOT_MULT])
  1006. mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
  1007. if (part_completed &&
  1008. (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
  1009. mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
  1010. mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
  1011. mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
  1012. for (i = 0; i < 4; i++) {
  1013. int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
  1014. uint mult = (ext_csd[idx + 2] << 16) +
  1015. (ext_csd[idx + 1] << 8) + ext_csd[idx];
  1016. if (mult)
  1017. has_parts = true;
  1018. if (!part_completed)
  1019. continue;
  1020. mmc->capacity_gp[i] = mult;
  1021. mmc->capacity_gp[i] *=
  1022. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
  1023. mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1024. mmc->capacity_gp[i] <<= 19;
  1025. }
  1026. if (part_completed) {
  1027. mmc->enh_user_size =
  1028. (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
  1029. (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
  1030. ext_csd[EXT_CSD_ENH_SIZE_MULT];
  1031. mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
  1032. mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1033. mmc->enh_user_size <<= 19;
  1034. mmc->enh_user_start =
  1035. (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
  1036. (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
  1037. (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
  1038. ext_csd[EXT_CSD_ENH_START_ADDR];
  1039. if (mmc->high_capacity)
  1040. mmc->enh_user_start <<= 9;
  1041. }
  1042. /*
  1043. * Host needs to enable ERASE_GRP_DEF bit if device is
  1044. * partitioned. This bit will be lost every time after a reset
  1045. * or power off. This will affect erase size.
  1046. */
  1047. if (part_completed)
  1048. has_parts = true;
  1049. if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
  1050. (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
  1051. has_parts = true;
  1052. if (has_parts) {
  1053. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  1054. EXT_CSD_ERASE_GROUP_DEF, 1);
  1055. if (err)
  1056. return err;
  1057. else
  1058. ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
  1059. }
  1060. if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
  1061. /* Read out group size from ext_csd */
  1062. mmc->erase_grp_size =
  1063. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
  1064. /*
  1065. * if high capacity and partition setting completed
  1066. * SEC_COUNT is valid even if it is smaller than 2 GiB
  1067. * JEDEC Standard JESD84-B45, 6.2.4
  1068. */
  1069. if (mmc->high_capacity && part_completed) {
  1070. capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
  1071. (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
  1072. (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
  1073. (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
  1074. capacity *= MMC_MAX_BLOCK_LEN;
  1075. mmc->capacity_user = capacity;
  1076. }
  1077. } else {
  1078. /* Calculate the group size from the csd value. */
  1079. int erase_gsz, erase_gmul;
  1080. erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
  1081. erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
  1082. mmc->erase_grp_size = (erase_gsz + 1)
  1083. * (erase_gmul + 1);
  1084. }
  1085. mmc->hc_wp_grp_size = 1024
  1086. * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
  1087. * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1088. mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
  1089. }
  1090. err = mmc_set_capacity(mmc, mmc->part_num);
  1091. if (err)
  1092. return err;
  1093. if (IS_SD(mmc))
  1094. err = sd_change_freq(mmc);
  1095. else
  1096. err = mmc_change_freq(mmc);
  1097. if (err)
  1098. return err;
  1099. /* Restrict card's capabilities by what the host can do */
  1100. mmc->card_caps &= mmc->cfg->host_caps;
  1101. if (IS_SD(mmc)) {
  1102. if (mmc->card_caps & MMC_MODE_4BIT) {
  1103. cmd.cmdidx = MMC_CMD_APP_CMD;
  1104. cmd.resp_type = MMC_RSP_R1;
  1105. cmd.cmdarg = mmc->rca << 16;
  1106. err = mmc_send_cmd(mmc, &cmd, NULL);
  1107. if (err)
  1108. return err;
  1109. cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
  1110. cmd.resp_type = MMC_RSP_R1;
  1111. cmd.cmdarg = 2;
  1112. err = mmc_send_cmd(mmc, &cmd, NULL);
  1113. if (err)
  1114. return err;
  1115. mmc_set_bus_width(mmc, 4);
  1116. }
  1117. if (mmc->card_caps & MMC_MODE_HS)
  1118. mmc->tran_speed = 50000000;
  1119. else
  1120. mmc->tran_speed = 25000000;
  1121. } else if (mmc->version >= MMC_VERSION_4) {
  1122. /* Only version 4 of MMC supports wider bus widths */
  1123. int idx;
  1124. /* An array of possible bus widths in order of preference */
  1125. static unsigned ext_csd_bits[] = {
  1126. EXT_CSD_DDR_BUS_WIDTH_8,
  1127. EXT_CSD_DDR_BUS_WIDTH_4,
  1128. EXT_CSD_BUS_WIDTH_8,
  1129. EXT_CSD_BUS_WIDTH_4,
  1130. EXT_CSD_BUS_WIDTH_1,
  1131. };
  1132. /* An array to map CSD bus widths to host cap bits */
  1133. static unsigned ext_to_hostcaps[] = {
  1134. [EXT_CSD_DDR_BUS_WIDTH_4] =
  1135. MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
  1136. [EXT_CSD_DDR_BUS_WIDTH_8] =
  1137. MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
  1138. [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
  1139. [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
  1140. };
  1141. /* An array to map chosen bus width to an integer */
  1142. static unsigned widths[] = {
  1143. 8, 4, 8, 4, 1,
  1144. };
  1145. for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
  1146. unsigned int extw = ext_csd_bits[idx];
  1147. unsigned int caps = ext_to_hostcaps[extw];
  1148. /*
  1149. * If the bus width is still not changed,
  1150. * don't try to set the default again.
  1151. * Otherwise, recover from switch attempts
  1152. * by switching to 1-bit bus width.
  1153. */
  1154. if (extw == EXT_CSD_BUS_WIDTH_1 &&
  1155. mmc->bus_width == 1) {
  1156. err = 0;
  1157. break;
  1158. }
  1159. /*
  1160. * Check to make sure the card and controller support
  1161. * these capabilities
  1162. */
  1163. if ((mmc->card_caps & caps) != caps)
  1164. continue;
  1165. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  1166. EXT_CSD_BUS_WIDTH, extw);
  1167. if (err)
  1168. continue;
  1169. mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
  1170. mmc_set_bus_width(mmc, widths[idx]);
  1171. err = mmc_send_ext_csd(mmc, test_csd);
  1172. if (err)
  1173. continue;
  1174. /* Only compare read only fields */
  1175. if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
  1176. == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
  1177. ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
  1178. == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
  1179. ext_csd[EXT_CSD_REV]
  1180. == test_csd[EXT_CSD_REV] &&
  1181. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
  1182. == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
  1183. memcmp(&ext_csd[EXT_CSD_SEC_CNT],
  1184. &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
  1185. break;
  1186. else
  1187. err = SWITCH_ERR;
  1188. }
  1189. if (err)
  1190. return err;
  1191. if (mmc->card_caps & MMC_MODE_HS) {
  1192. if (mmc->card_caps & MMC_MODE_HS_52MHz)
  1193. mmc->tran_speed = 52000000;
  1194. else
  1195. mmc->tran_speed = 26000000;
  1196. }
  1197. }
  1198. mmc_set_clock(mmc, mmc->tran_speed);
  1199. /* Fix the block length for DDR mode */
  1200. if (mmc->ddr_mode) {
  1201. mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
  1202. mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
  1203. }
  1204. /* fill in device description */
  1205. mmc->block_dev.lun = 0;
  1206. mmc->block_dev.type = 0;
  1207. mmc->block_dev.blksz = mmc->read_bl_len;
  1208. mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
  1209. mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
  1210. #if !defined(CONFIG_SPL_BUILD) || \
  1211. (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
  1212. !defined(CONFIG_USE_TINY_PRINTF))
  1213. sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
  1214. mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
  1215. (mmc->cid[3] >> 16) & 0xffff);
  1216. sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
  1217. (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
  1218. (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
  1219. (mmc->cid[2] >> 24) & 0xff);
  1220. sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
  1221. (mmc->cid[2] >> 16) & 0xf);
  1222. #else
  1223. mmc->block_dev.vendor[0] = 0;
  1224. mmc->block_dev.product[0] = 0;
  1225. mmc->block_dev.revision[0] = 0;
  1226. #endif
  1227. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
  1228. init_part(&mmc->block_dev);
  1229. #endif
  1230. return 0;
  1231. }
  1232. static int mmc_send_if_cond(struct mmc *mmc)
  1233. {
  1234. struct mmc_cmd cmd;
  1235. int err;
  1236. cmd.cmdidx = SD_CMD_SEND_IF_COND;
  1237. /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
  1238. cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
  1239. cmd.resp_type = MMC_RSP_R7;
  1240. err = mmc_send_cmd(mmc, &cmd, NULL);
  1241. if (err)
  1242. return err;
  1243. if ((cmd.response[0] & 0xff) != 0xaa)
  1244. return UNUSABLE_ERR;
  1245. else
  1246. mmc->version = SD_VERSION_2;
  1247. return 0;
  1248. }
  1249. /* not used any more */
  1250. int __deprecated mmc_register(struct mmc *mmc)
  1251. {
  1252. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1253. printf("%s is deprecated! use mmc_create() instead.\n", __func__);
  1254. #endif
  1255. return -1;
  1256. }
  1257. struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
  1258. {
  1259. struct mmc *mmc;
  1260. /* quick validation */
  1261. if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
  1262. cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
  1263. return NULL;
  1264. mmc = calloc(1, sizeof(*mmc));
  1265. if (mmc == NULL)
  1266. return NULL;
  1267. mmc->cfg = cfg;
  1268. mmc->priv = priv;
  1269. /* the following chunk was mmc_register() */
  1270. /* Setup dsr related values */
  1271. mmc->dsr_imp = 0;
  1272. mmc->dsr = 0xffffffff;
  1273. /* Setup the universal parts of the block interface just once */
  1274. mmc->block_dev.if_type = IF_TYPE_MMC;
  1275. mmc->block_dev.dev = cur_dev_num++;
  1276. mmc->block_dev.removable = 1;
  1277. mmc->block_dev.block_read = mmc_bread;
  1278. mmc->block_dev.block_write = mmc_bwrite;
  1279. mmc->block_dev.block_erase = mmc_berase;
  1280. /* setup initial part type */
  1281. mmc->block_dev.part_type = mmc->cfg->part_type;
  1282. INIT_LIST_HEAD(&mmc->link);
  1283. list_add_tail(&mmc->link, &mmc_devices);
  1284. return mmc;
  1285. }
  1286. void mmc_destroy(struct mmc *mmc)
  1287. {
  1288. /* only freeing memory for now */
  1289. free(mmc);
  1290. }
  1291. #ifdef CONFIG_PARTITIONS
  1292. block_dev_desc_t *mmc_get_dev(int dev)
  1293. {
  1294. struct mmc *mmc = find_mmc_device(dev);
  1295. if (!mmc || mmc_init(mmc))
  1296. return NULL;
  1297. return &mmc->block_dev;
  1298. }
  1299. #endif
  1300. /* board-specific MMC power initializations. */
  1301. __weak void board_mmc_power_init(void)
  1302. {
  1303. }
  1304. int mmc_start_init(struct mmc *mmc)
  1305. {
  1306. int err;
  1307. /* we pretend there's no card when init is NULL */
  1308. if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
  1309. mmc->has_init = 0;
  1310. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1311. printf("MMC: no card present\n");
  1312. #endif
  1313. return NO_CARD_ERR;
  1314. }
  1315. if (mmc->has_init)
  1316. return 0;
  1317. #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  1318. mmc_adapter_card_type_ident();
  1319. #endif
  1320. board_mmc_power_init();
  1321. /* made sure it's not NULL earlier */
  1322. err = mmc->cfg->ops->init(mmc);
  1323. if (err)
  1324. return err;
  1325. mmc->ddr_mode = 0;
  1326. mmc_set_bus_width(mmc, 1);
  1327. mmc_set_clock(mmc, 1);
  1328. /* Reset the Card */
  1329. err = mmc_go_idle(mmc);
  1330. if (err)
  1331. return err;
  1332. /* The internal partition reset to user partition(0) at every CMD0*/
  1333. mmc->part_num = 0;
  1334. /* Test for SD version 2 */
  1335. err = mmc_send_if_cond(mmc);
  1336. /* Now try to get the SD card's operating condition */
  1337. err = sd_send_op_cond(mmc);
  1338. /* If the command timed out, we check for an MMC card */
  1339. if (err == TIMEOUT) {
  1340. err = mmc_send_op_cond(mmc);
  1341. if (err) {
  1342. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1343. printf("Card did not respond to voltage select!\n");
  1344. #endif
  1345. return UNUSABLE_ERR;
  1346. }
  1347. }
  1348. if (!err)
  1349. mmc->init_in_progress = 1;
  1350. return err;
  1351. }
  1352. static int mmc_complete_init(struct mmc *mmc)
  1353. {
  1354. int err = 0;
  1355. mmc->init_in_progress = 0;
  1356. if (mmc->op_cond_pending)
  1357. err = mmc_complete_op_cond(mmc);
  1358. if (!err)
  1359. err = mmc_startup(mmc);
  1360. if (err)
  1361. mmc->has_init = 0;
  1362. else
  1363. mmc->has_init = 1;
  1364. return err;
  1365. }
  1366. int mmc_init(struct mmc *mmc)
  1367. {
  1368. int err = 0;
  1369. unsigned start;
  1370. if (mmc->has_init)
  1371. return 0;
  1372. start = get_timer(0);
  1373. if (!mmc->init_in_progress)
  1374. err = mmc_start_init(mmc);
  1375. if (!err)
  1376. err = mmc_complete_init(mmc);
  1377. debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
  1378. return err;
  1379. }
  1380. int mmc_set_dsr(struct mmc *mmc, u16 val)
  1381. {
  1382. mmc->dsr = val;
  1383. return 0;
  1384. }
  1385. /* CPU-specific MMC initializations */
  1386. __weak int cpu_mmc_init(bd_t *bis)
  1387. {
  1388. return -1;
  1389. }
  1390. /* board-specific MMC initializations. */
  1391. __weak int board_mmc_init(bd_t *bis)
  1392. {
  1393. return -1;
  1394. }
  1395. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1396. void print_mmc_devices(char separator)
  1397. {
  1398. struct mmc *m;
  1399. struct list_head *entry;
  1400. char *mmc_type;
  1401. list_for_each(entry, &mmc_devices) {
  1402. m = list_entry(entry, struct mmc, link);
  1403. if (m->has_init)
  1404. mmc_type = IS_SD(m) ? "SD" : "eMMC";
  1405. else
  1406. mmc_type = NULL;
  1407. printf("%s: %d", m->cfg->name, m->block_dev.dev);
  1408. if (mmc_type)
  1409. printf(" (%s)", mmc_type);
  1410. if (entry->next != &mmc_devices) {
  1411. printf("%c", separator);
  1412. if (separator != '\n')
  1413. puts (" ");
  1414. }
  1415. }
  1416. printf("\n");
  1417. }
  1418. #else
  1419. void print_mmc_devices(char separator) { }
  1420. #endif
  1421. int get_mmc_num(void)
  1422. {
  1423. return cur_dev_num;
  1424. }
  1425. void mmc_set_preinit(struct mmc *mmc, int preinit)
  1426. {
  1427. mmc->preinit = preinit;
  1428. }
  1429. static void do_preinit(void)
  1430. {
  1431. struct mmc *m;
  1432. struct list_head *entry;
  1433. list_for_each(entry, &mmc_devices) {
  1434. m = list_entry(entry, struct mmc, link);
  1435. #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  1436. mmc_set_preinit(m, 1);
  1437. #endif
  1438. if (m->preinit)
  1439. mmc_start_init(m);
  1440. }
  1441. }
  1442. #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
  1443. static int mmc_probe(bd_t *bis)
  1444. {
  1445. return 0;
  1446. }
  1447. #elif defined(CONFIG_DM_MMC)
  1448. static int mmc_probe(bd_t *bis)
  1449. {
  1450. int ret;
  1451. struct uclass *uc;
  1452. struct udevice *m;
  1453. ret = uclass_get(UCLASS_MMC, &uc);
  1454. if (ret)
  1455. return ret;
  1456. uclass_foreach_dev(m, uc) {
  1457. ret = device_probe(m);
  1458. if (ret)
  1459. printf("%s - probe failed: %d\n", m->name, ret);
  1460. }
  1461. return 0;
  1462. }
  1463. #else
  1464. static int mmc_probe(bd_t *bis)
  1465. {
  1466. if (board_mmc_init(bis) < 0)
  1467. cpu_mmc_init(bis);
  1468. return 0;
  1469. }
  1470. #endif
  1471. int mmc_initialize(bd_t *bis)
  1472. {
  1473. static int initialized = 0;
  1474. int ret;
  1475. if (initialized) /* Avoid initializing mmc multiple times */
  1476. return 0;
  1477. initialized = 1;
  1478. INIT_LIST_HEAD (&mmc_devices);
  1479. cur_dev_num = 0;
  1480. ret = mmc_probe(bis);
  1481. if (ret)
  1482. return ret;
  1483. #ifndef CONFIG_SPL_BUILD
  1484. print_mmc_devices(',');
  1485. #endif
  1486. do_preinit();
  1487. return 0;
  1488. }
  1489. #ifdef CONFIG_SUPPORT_EMMC_BOOT
  1490. /*
  1491. * This function changes the size of boot partition and the size of rpmb
  1492. * partition present on EMMC devices.
  1493. *
  1494. * Input Parameters:
  1495. * struct *mmc: pointer for the mmc device strcuture
  1496. * bootsize: size of boot partition
  1497. * rpmbsize: size of rpmb partition
  1498. *
  1499. * Returns 0 on success.
  1500. */
  1501. int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
  1502. unsigned long rpmbsize)
  1503. {
  1504. int err;
  1505. struct mmc_cmd cmd;
  1506. /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
  1507. cmd.cmdidx = MMC_CMD_RES_MAN;
  1508. cmd.resp_type = MMC_RSP_R1b;
  1509. cmd.cmdarg = MMC_CMD62_ARG1;
  1510. err = mmc_send_cmd(mmc, &cmd, NULL);
  1511. if (err) {
  1512. debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
  1513. return err;
  1514. }
  1515. /* Boot partition changing mode */
  1516. cmd.cmdidx = MMC_CMD_RES_MAN;
  1517. cmd.resp_type = MMC_RSP_R1b;
  1518. cmd.cmdarg = MMC_CMD62_ARG2;
  1519. err = mmc_send_cmd(mmc, &cmd, NULL);
  1520. if (err) {
  1521. debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
  1522. return err;
  1523. }
  1524. /* boot partition size is multiple of 128KB */
  1525. bootsize = (bootsize * 1024) / 128;
  1526. /* Arg: boot partition size */
  1527. cmd.cmdidx = MMC_CMD_RES_MAN;
  1528. cmd.resp_type = MMC_RSP_R1b;
  1529. cmd.cmdarg = bootsize;
  1530. err = mmc_send_cmd(mmc, &cmd, NULL);
  1531. if (err) {
  1532. debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
  1533. return err;
  1534. }
  1535. /* RPMB partition size is multiple of 128KB */
  1536. rpmbsize = (rpmbsize * 1024) / 128;
  1537. /* Arg: RPMB partition size */
  1538. cmd.cmdidx = MMC_CMD_RES_MAN;
  1539. cmd.resp_type = MMC_RSP_R1b;
  1540. cmd.cmdarg = rpmbsize;
  1541. err = mmc_send_cmd(mmc, &cmd, NULL);
  1542. if (err) {
  1543. debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
  1544. return err;
  1545. }
  1546. return 0;
  1547. }
  1548. /*
  1549. * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
  1550. * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
  1551. * and BOOT_MODE.
  1552. *
  1553. * Returns 0 on success.
  1554. */
  1555. int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
  1556. {
  1557. int err;
  1558. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
  1559. EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
  1560. EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
  1561. EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
  1562. if (err)
  1563. return err;
  1564. return 0;
  1565. }
  1566. /*
  1567. * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
  1568. * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
  1569. * PARTITION_ACCESS.
  1570. *
  1571. * Returns 0 on success.
  1572. */
  1573. int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
  1574. {
  1575. int err;
  1576. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
  1577. EXT_CSD_BOOT_ACK(ack) |
  1578. EXT_CSD_BOOT_PART_NUM(part_num) |
  1579. EXT_CSD_PARTITION_ACCESS(access));
  1580. if (err)
  1581. return err;
  1582. return 0;
  1583. }
  1584. /*
  1585. * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
  1586. * for enable. Note that this is a write-once field for non-zero values.
  1587. *
  1588. * Returns 0 on success.
  1589. */
  1590. int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
  1591. {
  1592. return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
  1593. enable);
  1594. }
  1595. #endif