acpi_table.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Based on acpi.c from coreboot
  4. *
  5. * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
  6. * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
  7. */
  8. #include <common.h>
  9. #include <bloblist.h>
  10. #include <cpu.h>
  11. #include <dm.h>
  12. #include <log.h>
  13. #include <dm/uclass-internal.h>
  14. #include <mapmem.h>
  15. #include <serial.h>
  16. #include <version.h>
  17. #include <acpi/acpigen.h>
  18. #include <acpi/acpi_device.h>
  19. #include <acpi/acpi_table.h>
  20. #include <asm/acpi/global_nvs.h>
  21. #include <asm/ioapic.h>
  22. #include <asm/lapic.h>
  23. #include <asm/mpspec.h>
  24. #include <asm/tables.h>
  25. #include <asm/arch/global_nvs.h>
  26. #include <dm/acpi.h>
  27. #include <linux/err.h>
  28. /*
  29. * IASL compiles the dsdt entries and writes the hex values
  30. * to a C array AmlCode[] (see dsdt.c).
  31. */
  32. extern const unsigned char AmlCode[];
  33. /* ACPI RSDP address to be used in boot parameters */
  34. static ulong acpi_rsdp_addr;
  35. static void acpi_create_facs(struct acpi_facs *facs)
  36. {
  37. memset((void *)facs, 0, sizeof(struct acpi_facs));
  38. memcpy(facs->signature, "FACS", 4);
  39. facs->length = sizeof(struct acpi_facs);
  40. facs->hardware_signature = 0;
  41. facs->firmware_waking_vector = 0;
  42. facs->global_lock = 0;
  43. facs->flags = 0;
  44. facs->x_firmware_waking_vector_l = 0;
  45. facs->x_firmware_waking_vector_h = 0;
  46. facs->version = 1;
  47. }
  48. static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
  49. u8 cpu, u8 apic)
  50. {
  51. lapic->type = ACPI_APIC_LAPIC;
  52. lapic->length = sizeof(struct acpi_madt_lapic);
  53. lapic->flags = LOCAL_APIC_FLAG_ENABLED;
  54. lapic->processor_id = cpu;
  55. lapic->apic_id = apic;
  56. return lapic->length;
  57. }
  58. int acpi_create_madt_lapics(u32 current)
  59. {
  60. struct udevice *dev;
  61. int total_length = 0;
  62. int cpu_num = 0;
  63. for (uclass_find_first_device(UCLASS_CPU, &dev);
  64. dev;
  65. uclass_find_next_device(&dev)) {
  66. struct cpu_platdata *plat = dev_get_parent_platdata(dev);
  67. int length;
  68. length = acpi_create_madt_lapic(
  69. (struct acpi_madt_lapic *)current, cpu_num++,
  70. plat->cpu_id);
  71. current += length;
  72. total_length += length;
  73. }
  74. return total_length;
  75. }
  76. int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
  77. u32 addr, u32 gsi_base)
  78. {
  79. ioapic->type = ACPI_APIC_IOAPIC;
  80. ioapic->length = sizeof(struct acpi_madt_ioapic);
  81. ioapic->reserved = 0x00;
  82. ioapic->gsi_base = gsi_base;
  83. ioapic->ioapic_id = id;
  84. ioapic->ioapic_addr = addr;
  85. return ioapic->length;
  86. }
  87. int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
  88. u8 bus, u8 source, u32 gsirq, u16 flags)
  89. {
  90. irqoverride->type = ACPI_APIC_IRQ_SRC_OVERRIDE;
  91. irqoverride->length = sizeof(struct acpi_madt_irqoverride);
  92. irqoverride->bus = bus;
  93. irqoverride->source = source;
  94. irqoverride->gsirq = gsirq;
  95. irqoverride->flags = flags;
  96. return irqoverride->length;
  97. }
  98. int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
  99. u8 cpu, u16 flags, u8 lint)
  100. {
  101. lapic_nmi->type = ACPI_APIC_LAPIC_NMI;
  102. lapic_nmi->length = sizeof(struct acpi_madt_lapic_nmi);
  103. lapic_nmi->flags = flags;
  104. lapic_nmi->processor_id = cpu;
  105. lapic_nmi->lint = lint;
  106. return lapic_nmi->length;
  107. }
  108. static int acpi_create_madt_irq_overrides(u32 current)
  109. {
  110. struct acpi_madt_irqoverride *irqovr;
  111. u16 sci_flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH;
  112. int length = 0;
  113. irqovr = (void *)current;
  114. length += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
  115. irqovr = (void *)(current + length);
  116. length += acpi_create_madt_irqoverride(irqovr, 0, 9, 9, sci_flags);
  117. return length;
  118. }
  119. __weak u32 acpi_fill_madt(u32 current)
  120. {
  121. current += acpi_create_madt_lapics(current);
  122. current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current,
  123. io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0);
  124. current += acpi_create_madt_irq_overrides(current);
  125. return current;
  126. }
  127. static void acpi_create_madt(struct acpi_madt *madt)
  128. {
  129. struct acpi_table_header *header = &(madt->header);
  130. u32 current = (u32)madt + sizeof(struct acpi_madt);
  131. memset((void *)madt, 0, sizeof(struct acpi_madt));
  132. /* Fill out header fields */
  133. acpi_fill_header(header, "APIC");
  134. header->length = sizeof(struct acpi_madt);
  135. header->revision = ACPI_MADT_REV_ACPI_3_0;
  136. madt->lapic_addr = LAPIC_DEFAULT_BASE;
  137. madt->flags = ACPI_MADT_PCAT_COMPAT;
  138. current = acpi_fill_madt(current);
  139. /* (Re)calculate length and checksum */
  140. header->length = current - (u32)madt;
  141. header->checksum = table_compute_checksum((void *)madt, header->length);
  142. }
  143. int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
  144. u16 seg_nr, u8 start, u8 end)
  145. {
  146. memset(mmconfig, 0, sizeof(*mmconfig));
  147. mmconfig->base_address_l = base;
  148. mmconfig->base_address_h = 0;
  149. mmconfig->pci_segment_group_number = seg_nr;
  150. mmconfig->start_bus_number = start;
  151. mmconfig->end_bus_number = end;
  152. return sizeof(struct acpi_mcfg_mmconfig);
  153. }
  154. __weak u32 acpi_fill_mcfg(u32 current)
  155. {
  156. current += acpi_create_mcfg_mmconfig
  157. ((struct acpi_mcfg_mmconfig *)current,
  158. CONFIG_PCIE_ECAM_BASE, 0x0, 0x0, 255);
  159. return current;
  160. }
  161. /* MCFG is defined in the PCI Firmware Specification 3.0 */
  162. static void acpi_create_mcfg(struct acpi_mcfg *mcfg)
  163. {
  164. struct acpi_table_header *header = &(mcfg->header);
  165. u32 current = (u32)mcfg + sizeof(struct acpi_mcfg);
  166. memset((void *)mcfg, 0, sizeof(struct acpi_mcfg));
  167. /* Fill out header fields */
  168. acpi_fill_header(header, "MCFG");
  169. header->length = sizeof(struct acpi_mcfg);
  170. header->revision = 1;
  171. current = acpi_fill_mcfg(current);
  172. /* (Re)calculate length and checksum */
  173. header->length = current - (u32)mcfg;
  174. header->checksum = table_compute_checksum((void *)mcfg, header->length);
  175. }
  176. /**
  177. * acpi_create_tcpa() - Create a TCPA table
  178. *
  179. * @tcpa: Pointer to place to put table
  180. *
  181. * Trusted Computing Platform Alliance Capabilities Table
  182. * TCPA PC Specific Implementation SpecificationTCPA is defined in the PCI
  183. * Firmware Specification 3.0
  184. */
  185. static int acpi_create_tcpa(struct acpi_tcpa *tcpa)
  186. {
  187. struct acpi_table_header *header = &tcpa->header;
  188. u32 current = (u32)tcpa + sizeof(struct acpi_tcpa);
  189. int size = 0x10000; /* Use this as the default size */
  190. void *log;
  191. int ret;
  192. if (!CONFIG_IS_ENABLED(BLOBLIST))
  193. return -ENXIO;
  194. memset(tcpa, '\0', sizeof(struct acpi_tcpa));
  195. /* Fill out header fields */
  196. acpi_fill_header(header, "TCPA");
  197. header->length = sizeof(struct acpi_tcpa);
  198. header->revision = 1;
  199. ret = bloblist_ensure_size_ret(BLOBLISTT_TCPA_LOG, &size, &log);
  200. if (ret)
  201. return log_msg_ret("blob", ret);
  202. tcpa->platform_class = 0;
  203. tcpa->laml = size;
  204. tcpa->lasa = (ulong)log;
  205. /* (Re)calculate length and checksum */
  206. header->length = current - (u32)tcpa;
  207. header->checksum = table_compute_checksum((void *)tcpa, header->length);
  208. return 0;
  209. }
  210. static int get_tpm2_log(void **ptrp, int *sizep)
  211. {
  212. const int tpm2_default_log_len = 0x10000;
  213. int size;
  214. int ret;
  215. *sizep = 0;
  216. size = tpm2_default_log_len;
  217. ret = bloblist_ensure_size_ret(BLOBLISTT_TPM2_TCG_LOG, &size, ptrp);
  218. if (ret)
  219. return log_msg_ret("blob", ret);
  220. *sizep = size;
  221. return 0;
  222. }
  223. static int acpi_create_tpm2(struct acpi_tpm2 *tpm2)
  224. {
  225. struct acpi_table_header *header = &tpm2->header;
  226. int tpm2_log_len;
  227. void *lasa;
  228. int ret;
  229. memset((void *)tpm2, 0, sizeof(struct acpi_tpm2));
  230. /*
  231. * Some payloads like SeaBIOS depend on log area to use TPM2.
  232. * Get the memory size and address of TPM2 log area or initialize it.
  233. */
  234. ret = get_tpm2_log(&lasa, &tpm2_log_len);
  235. if (ret)
  236. return ret;
  237. /* Fill out header fields. */
  238. acpi_fill_header(header, "TPM2");
  239. memcpy(header->aslc_id, ASLC_ID, 4);
  240. header->length = sizeof(struct acpi_tpm2);
  241. header->revision = acpi_get_table_revision(ACPITAB_TPM2);
  242. /* Hard to detect for coreboot. Just set it to 0 */
  243. tpm2->platform_class = 0;
  244. /* Must be set to 0 for FIFO-interface support */
  245. tpm2->control_area = 0;
  246. tpm2->start_method = 6;
  247. memset(tpm2->msp, 0, sizeof(tpm2->msp));
  248. /* Fill the log area size and start address fields. */
  249. tpm2->laml = tpm2_log_len;
  250. tpm2->lasa = (uintptr_t)lasa;
  251. /* Calculate checksum. */
  252. header->checksum = table_compute_checksum((void *)tpm2, header->length);
  253. return 0;
  254. }
  255. __weak u32 acpi_fill_csrt(u32 current)
  256. {
  257. return 0;
  258. }
  259. static int acpi_create_csrt(struct acpi_csrt *csrt)
  260. {
  261. struct acpi_table_header *header = &(csrt->header);
  262. u32 current = (u32)csrt + sizeof(struct acpi_csrt);
  263. uint ptr;
  264. memset((void *)csrt, 0, sizeof(struct acpi_csrt));
  265. /* Fill out header fields */
  266. acpi_fill_header(header, "CSRT");
  267. header->length = sizeof(struct acpi_csrt);
  268. header->revision = 0;
  269. ptr = acpi_fill_csrt(current);
  270. if (!ptr)
  271. return -ENOENT;
  272. current = ptr;
  273. /* (Re)calculate length and checksum */
  274. header->length = current - (u32)csrt;
  275. header->checksum = table_compute_checksum((void *)csrt, header->length);
  276. return 0;
  277. }
  278. static void acpi_create_spcr(struct acpi_spcr *spcr)
  279. {
  280. struct acpi_table_header *header = &(spcr->header);
  281. struct serial_device_info serial_info = {0};
  282. ulong serial_address, serial_offset;
  283. struct udevice *dev;
  284. uint serial_config;
  285. uint serial_width;
  286. int access_size;
  287. int space_id;
  288. int ret = -ENODEV;
  289. memset((void *)spcr, 0, sizeof(struct acpi_spcr));
  290. /* Fill out header fields */
  291. acpi_fill_header(header, "SPCR");
  292. header->length = sizeof(struct acpi_spcr);
  293. header->revision = 2;
  294. /* Read the device once, here. It is reused below */
  295. dev = gd->cur_serial_dev;
  296. if (dev)
  297. ret = serial_getinfo(dev, &serial_info);
  298. if (ret)
  299. serial_info.type = SERIAL_CHIP_UNKNOWN;
  300. /* Encode chip type */
  301. switch (serial_info.type) {
  302. case SERIAL_CHIP_16550_COMPATIBLE:
  303. spcr->interface_type = ACPI_DBG2_16550_COMPATIBLE;
  304. break;
  305. case SERIAL_CHIP_UNKNOWN:
  306. default:
  307. spcr->interface_type = ACPI_DBG2_UNKNOWN;
  308. break;
  309. }
  310. /* Encode address space */
  311. switch (serial_info.addr_space) {
  312. case SERIAL_ADDRESS_SPACE_MEMORY:
  313. space_id = ACPI_ADDRESS_SPACE_MEMORY;
  314. break;
  315. case SERIAL_ADDRESS_SPACE_IO:
  316. default:
  317. space_id = ACPI_ADDRESS_SPACE_IO;
  318. break;
  319. }
  320. serial_width = serial_info.reg_width * 8;
  321. serial_offset = serial_info.reg_offset << serial_info.reg_shift;
  322. serial_address = serial_info.addr + serial_offset;
  323. /* Encode register access size */
  324. switch (serial_info.reg_shift) {
  325. case 0:
  326. access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
  327. break;
  328. case 1:
  329. access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
  330. break;
  331. case 2:
  332. access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
  333. break;
  334. case 3:
  335. access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS;
  336. break;
  337. default:
  338. access_size = ACPI_ACCESS_SIZE_UNDEFINED;
  339. break;
  340. }
  341. debug("UART type %u @ %lx\n", spcr->interface_type, serial_address);
  342. /* Fill GAS */
  343. spcr->serial_port.space_id = space_id;
  344. spcr->serial_port.bit_width = serial_width;
  345. spcr->serial_port.bit_offset = 0;
  346. spcr->serial_port.access_size = access_size;
  347. spcr->serial_port.addrl = lower_32_bits(serial_address);
  348. spcr->serial_port.addrh = upper_32_bits(serial_address);
  349. /* Encode baud rate */
  350. switch (serial_info.baudrate) {
  351. case 9600:
  352. spcr->baud_rate = 3;
  353. break;
  354. case 19200:
  355. spcr->baud_rate = 4;
  356. break;
  357. case 57600:
  358. spcr->baud_rate = 6;
  359. break;
  360. case 115200:
  361. spcr->baud_rate = 7;
  362. break;
  363. default:
  364. spcr->baud_rate = 0;
  365. break;
  366. }
  367. serial_config = SERIAL_DEFAULT_CONFIG;
  368. if (dev)
  369. ret = serial_getconfig(dev, &serial_config);
  370. spcr->parity = SERIAL_GET_PARITY(serial_config);
  371. spcr->stop_bits = SERIAL_GET_STOP(serial_config);
  372. /* No PCI devices for now */
  373. spcr->pci_device_id = 0xffff;
  374. spcr->pci_vendor_id = 0xffff;
  375. /*
  376. * SPCR has no clue if the UART base clock speed is different
  377. * to the default one. However, the SPCR 1.04 defines baud rate
  378. * 0 as a preconfigured state of UART and OS is supposed not
  379. * to touch the configuration of the serial device.
  380. */
  381. if (serial_info.clock != SERIAL_DEFAULT_CLOCK)
  382. spcr->baud_rate = 0;
  383. /* Fix checksum */
  384. header->checksum = table_compute_checksum((void *)spcr, header->length);
  385. }
  386. void acpi_create_ssdt(struct acpi_ctx *ctx, struct acpi_table_header *ssdt,
  387. const char *oem_table_id)
  388. {
  389. memset((void *)ssdt, '\0', sizeof(struct acpi_table_header));
  390. acpi_fill_header(ssdt, "SSDT");
  391. ssdt->revision = acpi_get_table_revision(ACPITAB_SSDT);
  392. ssdt->aslc_revision = 1;
  393. ssdt->length = sizeof(struct acpi_table_header);
  394. acpi_inc(ctx, sizeof(struct acpi_table_header));
  395. acpi_fill_ssdt(ctx);
  396. /* (Re)calculate length and checksum. */
  397. ssdt->length = ctx->current - (void *)ssdt;
  398. ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length);
  399. }
  400. /*
  401. * QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
  402. */
  403. ulong write_acpi_tables(ulong start_addr)
  404. {
  405. struct acpi_ctx sctx, *ctx = &sctx;
  406. struct acpi_facs *facs;
  407. struct acpi_table_header *dsdt;
  408. struct acpi_fadt *fadt;
  409. struct acpi_table_header *ssdt;
  410. struct acpi_mcfg *mcfg;
  411. struct acpi_tcpa *tcpa;
  412. struct acpi_madt *madt;
  413. struct acpi_csrt *csrt;
  414. struct acpi_spcr *spcr;
  415. void *start;
  416. ulong addr;
  417. int ret;
  418. int i;
  419. start = map_sysmem(start_addr, 0);
  420. debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
  421. acpi_setup_base_tables(ctx, start);
  422. debug("ACPI: * FACS\n");
  423. facs = ctx->current;
  424. acpi_inc_align(ctx, sizeof(struct acpi_facs));
  425. acpi_create_facs(facs);
  426. debug("ACPI: * DSDT\n");
  427. dsdt = ctx->current;
  428. /* Put the table header first */
  429. memcpy(dsdt, &AmlCode, sizeof(struct acpi_table_header));
  430. acpi_inc(ctx, sizeof(struct acpi_table_header));
  431. /* If the table is not empty, allow devices to inject things */
  432. if (dsdt->length >= sizeof(struct acpi_table_header))
  433. acpi_inject_dsdt(ctx);
  434. /* Copy in the AML code itself if any (after the header) */
  435. memcpy(ctx->current,
  436. (char *)&AmlCode + sizeof(struct acpi_table_header),
  437. dsdt->length - sizeof(struct acpi_table_header));
  438. acpi_inc(ctx, dsdt->length - sizeof(struct acpi_table_header));
  439. dsdt->length = ctx->current - (void *)dsdt;
  440. acpi_align(ctx);
  441. if (!IS_ENABLED(CONFIG_ACPI_GNVS_EXTERNAL)) {
  442. /* Pack GNVS into the ACPI table area */
  443. for (i = 0; i < dsdt->length; i++) {
  444. u32 *gnvs = (u32 *)((u32)dsdt + i);
  445. if (*gnvs == ACPI_GNVS_ADDR) {
  446. *gnvs = map_to_sysmem(ctx->current);
  447. debug("Fix up global NVS in DSDT to %#08x\n",
  448. *gnvs);
  449. break;
  450. }
  451. }
  452. /*
  453. * Fill in platform-specific global NVS variables. If this fails
  454. * we cannot return the error but this should only happen while
  455. * debugging.
  456. */
  457. addr = acpi_create_gnvs(ctx->current);
  458. if (IS_ERR_VALUE(addr))
  459. printf("Error: Gailed to create GNVS\n");
  460. acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
  461. }
  462. /*
  463. * Recalculate the length and update the DSDT checksum since we patched
  464. * the GNVS address. Set the checksum to zero since it is part of the
  465. * region being checksummed.
  466. */
  467. dsdt->checksum = 0;
  468. dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
  469. /*
  470. * Fill in platform-specific global NVS variables. If this fails we
  471. * cannot return the error but this should only happen while debugging.
  472. */
  473. addr = acpi_create_gnvs(ctx->current);
  474. if (IS_ERR_VALUE(addr))
  475. printf("Error: Failed to create GNVS\n");
  476. acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
  477. debug("ACPI: * FADT\n");
  478. fadt = ctx->current;
  479. acpi_inc_align(ctx, sizeof(struct acpi_fadt));
  480. acpi_create_fadt(fadt, facs, dsdt);
  481. acpi_add_table(ctx, fadt);
  482. debug("ACPI: * SSDT\n");
  483. ssdt = (struct acpi_table_header *)ctx->current;
  484. acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID);
  485. if (ssdt->length > sizeof(struct acpi_table_header)) {
  486. acpi_inc_align(ctx, ssdt->length);
  487. acpi_add_table(ctx, ssdt);
  488. }
  489. debug("ACPI: * MCFG\n");
  490. mcfg = ctx->current;
  491. acpi_create_mcfg(mcfg);
  492. acpi_inc_align(ctx, mcfg->header.length);
  493. acpi_add_table(ctx, mcfg);
  494. if (IS_ENABLED(CONFIG_TPM_V2)) {
  495. struct acpi_tpm2 *tpm2;
  496. debug("ACPI: * TPM2\n");
  497. tpm2 = (struct acpi_tpm2 *)ctx->current;
  498. ret = acpi_create_tpm2(tpm2);
  499. if (!ret) {
  500. acpi_inc_align(ctx, tpm2->header.length);
  501. acpi_add_table(ctx, tpm2);
  502. } else {
  503. log_warning("TPM2 table creation failed\n");
  504. }
  505. }
  506. debug("ACPI: * MADT\n");
  507. madt = ctx->current;
  508. acpi_create_madt(madt);
  509. acpi_inc_align(ctx, madt->header.length);
  510. acpi_add_table(ctx, madt);
  511. debug("ACPI: * TCPA\n");
  512. tcpa = (struct acpi_tcpa *)ctx->current;
  513. ret = acpi_create_tcpa(tcpa);
  514. if (ret) {
  515. log_warning("Failed to create TCPA table (err=%d)\n", ret);
  516. } else {
  517. acpi_inc_align(ctx, tcpa->header.length);
  518. acpi_add_table(ctx, tcpa);
  519. }
  520. debug("ACPI: * CSRT\n");
  521. csrt = ctx->current;
  522. if (!acpi_create_csrt(csrt)) {
  523. acpi_inc_align(ctx, csrt->header.length);
  524. acpi_add_table(ctx, csrt);
  525. }
  526. debug("ACPI: * SPCR\n");
  527. spcr = ctx->current;
  528. acpi_create_spcr(spcr);
  529. acpi_inc_align(ctx, spcr->header.length);
  530. acpi_add_table(ctx, spcr);
  531. acpi_write_dev_tables(ctx);
  532. addr = map_to_sysmem(ctx->current);
  533. debug("current = %lx\n", addr);
  534. acpi_rsdp_addr = (unsigned long)ctx->rsdp;
  535. debug("ACPI: done\n");
  536. return addr;
  537. }
  538. ulong acpi_get_rsdp_addr(void)
  539. {
  540. return acpi_rsdp_addr;
  541. }
  542. /**
  543. * acpi_write_hpet() - Write out a HPET table
  544. *
  545. * Write out the table for High-Precision Event Timers
  546. *
  547. * @hpet: Place to put HPET table
  548. */
  549. static int acpi_create_hpet(struct acpi_hpet *hpet)
  550. {
  551. struct acpi_table_header *header = &hpet->header;
  552. struct acpi_gen_regaddr *addr = &hpet->addr;
  553. /*
  554. * See IA-PC HPET (High Precision Event Timers) Specification v1.0a
  555. * https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/software-developers-hpet-spec-1-0a.pdf
  556. */
  557. memset((void *)hpet, '\0', sizeof(struct acpi_hpet));
  558. /* Fill out header fields. */
  559. acpi_fill_header(header, "HPET");
  560. header->aslc_revision = ASL_REVISION;
  561. header->length = sizeof(struct acpi_hpet);
  562. header->revision = acpi_get_table_revision(ACPITAB_HPET);
  563. /* Fill out HPET address */
  564. addr->space_id = 0; /* Memory */
  565. addr->bit_width = 64;
  566. addr->bit_offset = 0;
  567. addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff;
  568. addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32;
  569. hpet->id = *(u32 *)CONFIG_HPET_ADDRESS;
  570. hpet->number = 0;
  571. hpet->min_tick = 0; /* HPET_MIN_TICKS */
  572. header->checksum = table_compute_checksum(hpet,
  573. sizeof(struct acpi_hpet));
  574. return 0;
  575. }
  576. int acpi_write_hpet(struct acpi_ctx *ctx)
  577. {
  578. struct acpi_hpet *hpet;
  579. int ret;
  580. log_debug("ACPI: * HPET\n");
  581. hpet = ctx->current;
  582. acpi_inc_align(ctx, sizeof(struct acpi_hpet));
  583. acpi_create_hpet(hpet);
  584. ret = acpi_add_table(ctx, hpet);
  585. if (ret)
  586. return log_msg_ret("add", ret);
  587. return 0;
  588. }
  589. int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
  590. uint access_size)
  591. {
  592. struct acpi_dbg2_header *dbg2 = ctx->current;
  593. char path[ACPI_PATH_MAX];
  594. struct acpi_gen_regaddr address;
  595. phys_addr_t addr;
  596. int ret;
  597. if (!device_active(dev)) {
  598. log_info("Device not enabled\n");
  599. return -EACCES;
  600. }
  601. /*
  602. * PCI devices don't remember their resource allocation information in
  603. * U-Boot at present. We assume that MMIO is used for the UART and that
  604. * the address space is 32 bytes: ns16550 uses 8 registers of up to
  605. * 32-bits each. This is only for debugging so it is not a big deal.
  606. */
  607. addr = dm_pci_read_bar32(dev, 0);
  608. printf("UART addr %lx\n", (ulong)addr);
  609. memset(&address, '\0', sizeof(address));
  610. address.space_id = ACPI_ADDRESS_SPACE_MEMORY;
  611. address.addrl = (uint32_t)addr;
  612. address.addrh = (uint32_t)((addr >> 32) & 0xffffffff);
  613. address.access_size = access_size;
  614. ret = acpi_device_path(dev, path, sizeof(path));
  615. if (ret)
  616. return log_msg_ret("path", ret);
  617. acpi_create_dbg2(dbg2, ACPI_DBG2_SERIAL_PORT,
  618. ACPI_DBG2_16550_COMPATIBLE, &address, 0x1000, path);
  619. acpi_inc_align(ctx, dbg2->header.length);
  620. acpi_add_table(ctx, dbg2);
  621. return 0;
  622. }
  623. void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs,
  624. void *dsdt)
  625. {
  626. struct acpi_table_header *header = &fadt->header;
  627. memset((void *)fadt, '\0', sizeof(struct acpi_fadt));
  628. acpi_fill_header(header, "FACP");
  629. header->length = sizeof(struct acpi_fadt);
  630. header->revision = 4;
  631. memcpy(header->oem_id, OEM_ID, 6);
  632. memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
  633. memcpy(header->aslc_id, ASLC_ID, 4);
  634. header->aslc_revision = 1;
  635. fadt->firmware_ctrl = (unsigned long)facs;
  636. fadt->dsdt = (unsigned long)dsdt;
  637. fadt->x_firmware_ctl_l = (unsigned long)facs;
  638. fadt->x_firmware_ctl_h = 0;
  639. fadt->x_dsdt_l = (unsigned long)dsdt;
  640. fadt->x_dsdt_h = 0;
  641. fadt->preferred_pm_profile = ACPI_PM_MOBILE;
  642. /* Use ACPI 3.0 revision */
  643. fadt->header.revision = 4;
  644. }
  645. void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
  646. u64 bar)
  647. {
  648. struct dmar_entry *drhd = ctx->current;
  649. memset(drhd, '\0', sizeof(*drhd));
  650. drhd->type = DMAR_DRHD;
  651. drhd->length = sizeof(*drhd); /* will be fixed up later */
  652. drhd->flags = flags;
  653. drhd->segment = segment;
  654. drhd->bar = bar;
  655. acpi_inc(ctx, drhd->length);
  656. }
  657. void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
  658. u64 limit)
  659. {
  660. struct dmar_rmrr_entry *rmrr = ctx->current;
  661. memset(rmrr, '\0', sizeof(*rmrr));
  662. rmrr->type = DMAR_RMRR;
  663. rmrr->length = sizeof(*rmrr); /* will be fixed up later */
  664. rmrr->segment = segment;
  665. rmrr->bar = bar;
  666. rmrr->limit = limit;
  667. acpi_inc(ctx, rmrr->length);
  668. }
  669. void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base)
  670. {
  671. struct dmar_entry *drhd = base;
  672. drhd->length = ctx->current - base;
  673. }
  674. void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base)
  675. {
  676. struct dmar_rmrr_entry *rmrr = base;
  677. rmrr->length = ctx->current - base;
  678. }
  679. static int acpi_create_dmar_ds(struct acpi_ctx *ctx, enum dev_scope_type type,
  680. uint enumeration_id, pci_dev_t bdf)
  681. {
  682. /* we don't support longer paths yet */
  683. const size_t dev_scope_length = sizeof(struct dev_scope) + 2;
  684. struct dev_scope *ds = ctx->current;
  685. memset(ds, '\0', dev_scope_length);
  686. ds->type = type;
  687. ds->length = dev_scope_length;
  688. ds->enumeration = enumeration_id;
  689. ds->start_bus = PCI_BUS(bdf);
  690. ds->path[0].dev = PCI_DEV(bdf);
  691. ds->path[0].fn = PCI_FUNC(bdf);
  692. return ds->length;
  693. }
  694. int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf)
  695. {
  696. return acpi_create_dmar_ds(ctx, SCOPE_PCI_SUB, 0, bdf);
  697. }
  698. int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf)
  699. {
  700. return acpi_create_dmar_ds(ctx, SCOPE_PCI_ENDPOINT, 0, bdf);
  701. }
  702. int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
  703. pci_dev_t bdf)
  704. {
  705. return acpi_create_dmar_ds(ctx, SCOPE_IOAPIC, enumeration_id, bdf);
  706. }
  707. int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
  708. pci_dev_t bdf)
  709. {
  710. return acpi_create_dmar_ds(ctx, SCOPE_MSI_HPET, enumeration_id, bdf);
  711. }